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authorMatthew Gretton-Dann <matthew.gretton-dann@arm.com>2012-08-28 14:50:44 +0400
committerMatthew Gretton-Dann <matthew.gretton-dann@arm.com>2012-08-28 14:50:44 +0400
commitdc76e2d7ca4fa9e68e7b92cdc0fd20235bb46e3e (patch)
treefb0d2ff008c952bdc4731d072ff42185635b8f4a
parentd5d96ba56d2ee4ebb66670701253b0ad2cb8a310 (diff)
Apply mainline patches
bfd/: 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * elf32-arm.c (v8): New array. (tag_cpu_arch_combine): Add support for ARMv8 attributes. (elf32_arm_merge_eabi_attributes): Likewise. (VFP_VERSION_COUNT): New define. gas/: 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (ARM_ENC_TAB): Add sha1h and sha2op entries. (do_sha1h): New function. (do_sha1su1): Likewise. (do_sha256su0): Likewise. (insns): Add 2 operand SHA instructions. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (NEON_ENC_TAB): Add sha3op entry. (do_crypto_3op_1): New function. (do_sha1c): Likewise. (do_sha1p): Likewise. (do_sha1m): Likewise. (do_sha1su0): Likewise. (do_sha256h): Likewise. (do_sha256h2): Likewise. (do_sha256su1): Likewise. (insns): Add SHA 3 operand instructions. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (neon_type_mask): Add P64 type. (type_chk_of_el_type): Handle P64 type. (el_type_of_type_chk): Likewise. (do_neon_vmull): Handle VMULL.P64. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (NEON_ENC_TAB): Add aes entry. (neon_type_mask): Add N_UNT. (neon_check_type): Don't always decay typed to untyped sizes. (do_crypto_2op_1): New function. (do_aese): Likewise. (do_aesd): Likewise. (do_aesmc.8): Likewise. (do_aesimc.8): Likewise. (insns): Add AES instructions. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (el_type_type_check): Add handling for 16-bit floating point types. (do_neon_cvttb_2): New function. (do_neon_cvttb_1): Likewise. (do_neon_cvtb): Refactor to use do_neon_cvttb_1. (do_neon_cvtt): Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (NEON_ENC_TAB): Add vrint entries. (neon_cvt_mode): Add neon_cvt_mode_r. (do_vrint_1): New function. (do_vrint_x): Likewise. (do_vrint_z): Likewise. (do_vrint_r): Likewise. (do_vrint_a): Likewise. (do_vrint_n): Likewise. (do_vrint_p): Likewise. (do_vrint_m): Likewise. (insns): Add VRINT instructions. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (NEON_ENC_TAB): Add vcvta entry. (neon_cvt_mode): New enumeration. (do_vfp_nsyn_cvt_fpv8): New function. (do_neon_cvt_1): Add support for new conversions. (do_neon_cvtr): Use neon_cvt_mode enumerator. (do_neon_cvt): Likewise. (do_neon_cvta): New function. (do_neon_cvtn): Likewise. (do_neon_cvtp): Likewise. (do_neon_cvtm): Likewise. (insns): Add new VCVT instructions. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm> * config/tc-arm.c (CVT_FLAVOUR_VAR): New define. (CVT_VAR): New helper define. (neon_cvt_flavour): New enumeration, function renamed... (get_neon_cvt_flavour): ...to this. (do_vfp_nsyn_cvt): Update to use new neon_cvt_flavour. (do_vfp_nsyn_cvtz): Likewise. (do_neon_cvt_1): Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (NEON_ENC_TAB): Add vmaxnm, vminnm entries. (vfp_or_neon_is_neon_bits): Add NEON_CHECK_ARCH8 enumerator. (vfp_or_neon_is_neon): Add check for SIMD for ARMv8. (do_maxnm): New function. (insns): Add vmaxnm, vminnm entries. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (NEON_ENC_TAB): Add entries for VSEL. (NEON_ENC_FPV8_): New define. (do_vfp_nsyn_fpv8): New function. (do_vsel): Likewise. (insns): Add VSEL instructions. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (do_rm_rn): New function. (do_strlex): Likewise. (do_t_strlex): Likewise. (insns): Add support for LDRA/STRL instructions. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (do_t_bkpt_hlt1): New function. (do_t_hlt): New function. (do_t_bkpt): Use do_t_bkpt_hlt1. (insns): Add HLT. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (insns): Add DCPS instruction. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (T16_32_TAB): Add _sevl. (insns): Add SEVL. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (asm_barrier_opt): Add arch field. (mark_feature_used): New function. (parse_barrier): Check specified option is valid for the specified architecture. (UL_BARRIER): New macro. (barrier_opt_names): Update for new barrier options. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (do_setend): Warn on deprecated SETEND. (do_t_setend): Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (do_t_it): Fully initialise now_it. (new_automatic_it_block): Likewise. (handle_it_block): Record whether current instruction is conditionally executed. * config/tc-arm.c (depr_insn_mask): New structure. (depr_it_insns): New variable. (it_fsm_post_encode): Warn on deprecated uses. * config/tc-arm.h (current_it): Add new fields. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (deprecated_coproc_regs_s): New structure. (deprecated_coproc_regs): New variable. (deprecated_coproc_reg_count): Likewise. (do_co_reg): Error on obsolete & warn on deprecated registers. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.c (check_obsolete): New function. (do_rd_rm_rn): Check swp{b} for obsoletion. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * config/tc-arm.h (arm_ext_v8): New variable. (fpu_vfp_ext_armv8): Likewise. (fpu_neon_ext_armv8): Likewise. (fpu_crypto_ext_armv8): Likewise. (arm_archs): Add armv8-a. (arm_extensions): Add crypto, fp, and simd. (arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8. (cpu_arch_ver): Add support for ARMv8. (aeabi_set_public_sttributes): Likewise. * doc/c-arm.texi (ARM Options): Document new architecture and extension options for ARMv8. gas/testsuite/: 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a+crypto.s: Update testcase. * gas/arm/armv8-a+crypto.d: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a+crypto.d: Update testcase. * gas/arm/armv8-a+crypto.s: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a+crypto.d: Update testcase. * gas/arm/armv8-a+crypto.s: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a+crypto.d: New testcase. * gas/arm/armv8-a+crypto.s: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a+fp.d: Update testcase. * gas/arm/armv8-a+fp.s: Likewise. * gas/arm/half-prec-vfpv3.s: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a+fpv5.d: Update testcase. * gas/arm/armv8-a+fpv5.s: Likewise. * gas/arm/armv8-a+simdv3.d: Likewise. * gas/arm/armv8-a+simdv3.s: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a+fp.d: Update testcase. * gas/arm/armv8-a+fp.s: Likewise. * gas/arm/armv8-a+simd.d: Likewise. * gas/arm/armv8-a+simd.s: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/testsuite/gas/armv8-a+fp.d: Update testcase. * gas/testsuite/gas/armv8-a+fp.s: Likewise. * gas/testsuite/gas/armv8-a+simd.d: New testcase. * gas/testsuite/gas/armv8-a+simd.s: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a+fp.d: New testcase. * gas/arm/armv8-a+fp.s: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a-bad.l: Update testcase. * gas/arm/armv8-a-bad.s: Likewise. * gas/arm/armv8-a.d: Likewise. * gas/arm/armv8-a.s: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a-bad.l: Update for HLT. * gas/arm/armv8-a-bad.s: Likewise. * gas/arm/armv8-a.d: Likewise. * gas/arm/armv8-a.s: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a.d: Update. * gas/arm/armv8-a.s: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a.s: New testcase. * gas/arm/armv8-a.d: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a-barrier.s: New testcase. * gas/arm/armv8-a-barrier-arm.d: Likewise. * gas/arm/armv8-a-barrier-thumb.d: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a-bad.l: Update * gas/arm/armv8-a-bad.s: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a-it-bad.d: New testcase. * gas/arm/armv8-a-it-bad.l: Likewise. * gas/arm/armv8-a-it-bad.s: Likewise. * gas/arm/ldr-t-bad.s: Update testcase. * gas/arm/ldr-t.d: Likewise. * gas/arm/ldr-t.s: Likewise. * gas/arm/neon-cond-bad-inc.s: Likewise. * gas/arm/sp-pc-validations-bad-t: Likewise. * gas/arm/vfp-fma-inc.s: Likewise. * gas/arm/vfp-neon-syntax-inc.s: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a-bad.l: Update testcase. * gas/arm/armv8-a-bad.s: Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/armv8-a-bad.d: New testcase. * gas/arm/armv8-a-bad.l: Likewise. * gas/arm/armv8-a-bad.s: Likewise. * gas/arm/depr-swp.l: Update for change in expected output. * gas/arm/depr-swp.s: Add additional test. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * gas/arm/attr-march-all.d: Update for change in expected output. * gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/arm/attr-march-armv8-a+crypto.d: New testcase. * gas/arm/attr-march-armv8-a+fp.d: Likewise. * gas/arm/attr-march-armv8-a+simd.d: Likewise. * gas/arm/attr-march-armv8-a.d: Likewise. include/: 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * opcode/arm.h (ARM_CPU_IS_ANY): New define. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * elf/arm.h (TAG_CPU_ARCH_V8): New define. (MAX_TAG_CPU_ARCH): Update. * opcode/arm.h (ARM_EXT_V8): New define. (FPU_VFP_EXT_ARMV8): Likewise. (FPU_NEON_EXT_ARMV8): Likewise. (FPU_CRYPTO_EXT_ARMV8): Likewise. (ARM_AEXT_V8A): Likewise. (FPU_VFP_ARMV8): Likwise. (FPU_NEON_ARMV8): Likewise. (FPU_CRYPTO_ARMV8): Likewise. (FPU_ARCH_VFP_ARMV8): Likewise. (FPU_ARCH_NEON_VFP_ARMV8): Likewise. (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise. (ARM_ARCH_V8A): Likwise. (ARM_ARCH_V8A_FP): Likewise. (ARM_ARCH_V8A_SIMD): Likewise. (ARM_ARCH_V8A_CRYPTO): Likewise. ld/testsuite/: 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * ld-arm/arm-elf.exp: Add new testcases. * ld-arm/attr-merge-vfp-3.d: Update for change in expected output. * ld-arm/attr-merge-vfp-3r.d: Likewise. * ld-arm/attr-merge-vfp-4.d: Likewise. * ld-arm/attr-merge-vfp-4r.d: Likewise. * ld-arm/attr-merge-vfp-5.d: Likewise. * ld-arm/attr-merge-vfp-5r.d: Likewise. * ld-arm/attr-merge-vfp-7.d: New testcase. * ld-arm/attr-merge-vfp-7r.d: Likewise. * ld-arm/attr-merge-vfp-armv8-hard.s: Likewise. * ld-arm/attr-merge-vfp-armv8.s: Likewise. opcodes/ 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (neon_opcodes): Add 2 operand sha instructions. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (neon_opcodes): Add SHA 3-operand instructions. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (neon_opcodes): Handle VMULL.P64. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (neon_opcodes): Add support for AES instructions. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (coprocessor_opcodes): Add support for HP/DP conversions. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (coprocessor_opcodes): Add VRINT. (neon_opcodes): Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (coprocessor_opcodes): Add support for new VCVT variants. (neon_opcodes): Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM. (neon_opcodes): Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (coprocessor_opcodes): Add VSEL. (print_insn_coprocessor): Add new %<>c bitfield format specifier. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (arm_opcodes): Add LDRA/STRL instructions. (thumb32_opcodes): Likewise. (print_arm_insn): Add support for %<>T formatter. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (arm_opcodes): Add HLT. (thumb_opcodes): Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (thumb32_opcodes): Add DCPS instruction. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (arm_opcodes): Add SEVL. (thumb_opcodes): Likewise. (thumb32_opcodes): Likewise. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (data_barrier_option): New function. (print_insn_arm): Use data_barrier_option. (print_insn_thumb32): Use data_barrier_option. 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com * arm-dis.c (COND_UNCOND): New constant. (print_insn_coprocessor): Add support for %u format specifier. (print_insn_neon): Likewise.
-rw-r--r--include/ChangeLog25
-rw-r--r--include/elf/arm.h3
-rw-r--r--include/opcode/arm.h26
3 files changed, 53 insertions, 1 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index fc3469e6e..7b242645b 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,28 @@
+2012-08-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ Apply mainline patches
+ 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+ * opcode/arm.h (ARM_CPU_IS_ANY): New define.
+
+ 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+ * elf/arm.h (TAG_CPU_ARCH_V8): New define.
+ (MAX_TAG_CPU_ARCH): Update.
+ * opcode/arm.h (ARM_EXT_V8): New define.
+ (FPU_VFP_EXT_ARMV8): Likewise.
+ (FPU_NEON_EXT_ARMV8): Likewise.
+ (FPU_CRYPTO_EXT_ARMV8): Likewise.
+ (ARM_AEXT_V8A): Likewise.
+ (FPU_VFP_ARMV8): Likwise.
+ (FPU_NEON_ARMV8): Likewise.
+ (FPU_CRYPTO_ARMV8): Likewise.
+ (FPU_ARCH_VFP_ARMV8): Likewise.
+ (FPU_ARCH_NEON_VFP_ARMV8): Likewise.
+ (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise.
+ (ARM_ARCH_V8A): Likwise.
+ (ARM_ARCH_V8A_FP): Likewise.
+ (ARM_ARCH_V8A_SIMD): Likewise.
+ (ARM_ARCH_V8A_CRYPTO): Likewise.
+
2012-08-16 Ian Bolton <ian.bolton@arm.com>
Laurent Desnogues <laurent.desnogues@arm.com>
Jim MacArthur <jim.macarthur@arm.com>
diff --git a/include/elf/arm.h b/include/elf/arm.h
index 860fdf77a..8ea3fe881 100644
--- a/include/elf/arm.h
+++ b/include/elf/arm.h
@@ -101,7 +101,8 @@
#define TAG_CPU_ARCH_V6_M 11
#define TAG_CPU_ARCH_V6S_M 12
#define TAG_CPU_ARCH_V7E_M 13
-#define MAX_TAG_CPU_ARCH 13
+#define TAG_CPU_ARCH_V8 14
+#define MAX_TAG_CPU_ARCH 14
/* Pseudo-architecture to allow objects to be compatible with the subset of
armv4t and armv6-m. This value should never be stored in object files. */
#define TAG_CPU_ARCH_V4T_PLUS_V6_M (MAX_TAG_CPU_ARCH + 1)
diff --git a/include/opcode/arm.h b/include/opcode/arm.h
index 86e3d67db..1ac38a06f 100644
--- a/include/opcode/arm.h
+++ b/include/opcode/arm.h
@@ -34,6 +34,7 @@
#define ARM_EXT_V6 0x00001000 /* ARM V6. */
#define ARM_EXT_V6K 0x00002000 /* ARM V6K. */
/* 0x00004000 Was ARM V6Z. */
+#define ARM_EXT_V8 0x00004000 /* is now ARMv8. */
#define ARM_EXT_V6T2 0x00008000 /* Thumb-2. */
#define ARM_EXT_DIV 0x00010000 /* Integer division. */
/* The 'M' in Arm V7M stands for Microcontroller.
@@ -77,6 +78,9 @@
#define FPU_VFP_EXT_FP16 0x00100000 /* Half-precision extensions. */
#define FPU_NEON_EXT_FMA 0x00080000 /* Neon fused multiply-add */
#define FPU_VFP_EXT_FMA 0x00040000 /* VFP fused multiply-add */
+#define FPU_VFP_EXT_ARMV8 0x00020000 /* FP for ARMv8. */
+#define FPU_NEON_EXT_ARMV8 0x00010000 /* Neon for ARMv8. */
+#define FPU_CRYPTO_EXT_ARMV8 0x00008000 /* Crypto for ARMv8. */
/* Architectures are the sum of the base and extensions. The ARM ARM (rev E)
defines the following: ARMv3, ARMv3M, ARMv4xM, ARMv4, ARMv4TxM, ARMv4T,
@@ -126,6 +130,9 @@
#define ARM_AEXT_V7 (ARM_AEXT_V7A & ARM_AEXT_V7R & ARM_AEXT_V7M)
#define ARM_AEXT_V7EM \
(ARM_AEXT_V7M | ARM_EXT_V5ExP | ARM_EXT_V6_DSP)
+#define ARM_AEXT_V8A \
+ (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC | ARM_EXT_DIV | ARM_EXT_ADIV \
+ | ARM_EXT_VIRT | ARM_EXT_V8)
/* Processors with specific extensions in the co-processor space. */
#define ARM_ARCH_XSCALE ARM_FEATURE (ARM_AEXT_V5TE, ARM_CEXT_XSCALE)
@@ -143,6 +150,9 @@
#define FPU_VFP_V4D16 (FPU_VFP_V3D16 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
#define FPU_VFP_V4 (FPU_VFP_V3 | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
#define FPU_VFP_V4_SP_D16 (FPU_VFP_V3xD | FPU_VFP_EXT_FP16 | FPU_VFP_EXT_FMA)
+#define FPU_VFP_ARMV8 (FPU_VFP_V4 | FPU_VFP_EXT_ARMV8)
+#define FPU_NEON_ARMV8 (FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA | FPU_NEON_EXT_ARMV8)
+#define FPU_CRYPTO_ARMV8 (FPU_CRYPTO_EXT_ARMV8)
#define FPU_VFP_HARD (FPU_VFP_EXT_V1xD | FPU_VFP_EXT_V1 | FPU_VFP_EXT_V2 \
| FPU_VFP_EXT_V3xD | FPU_VFP_EXT_FMA | FPU_NEON_EXT_FMA \
| FPU_VFP_EXT_V3 | FPU_NEON_EXT_V1 | FPU_VFP_EXT_D32)
@@ -175,6 +185,10 @@
#define FPU_ARCH_VFP_V4_SP_D16 ARM_FEATURE(0, FPU_VFP_V4_SP_D16)
#define FPU_ARCH_NEON_VFP_V4 \
ARM_FEATURE(0, FPU_VFP_V4 | FPU_NEON_EXT_V1 | FPU_NEON_EXT_FMA)
+#define FPU_ARCH_VFP_ARMV8 ARM_FEATURE(0, FPU_VFP_ARMV8)
+#define FPU_ARCH_NEON_VFP_ARMV8 ARM_FEATURE(0, FPU_NEON_ARMV8 | FPU_VFP_ARMV8)
+#define FPU_ARCH_CRYPTO_NEON_VFP_ARMV8 \
+ ARM_FEATURE(0, FPU_CRYPTO_ARMV8 | FPU_NEON_ARMV8 | FPU_VFP_ARMV8)
#define FPU_ARCH_ENDIAN_PURE ARM_FEATURE (0, FPU_ENDIAN_PURE)
@@ -211,6 +225,7 @@
#define ARM_ARCH_V7R ARM_FEATURE (ARM_AEXT_V7R, 0)
#define ARM_ARCH_V7M ARM_FEATURE (ARM_AEXT_V7M, 0)
#define ARM_ARCH_V7EM ARM_FEATURE (ARM_AEXT_V7EM, 0)
+#define ARM_ARCH_V8A ARM_FEATURE (ARM_AEXT_V8A, 0)
/* Some useful combinations: */
#define ARM_ARCH_NONE ARM_FEATURE (0, 0)
@@ -233,6 +248,14 @@
#define ARM_ARCH_V7R_IDIV ARM_FEATURE (ARM_AEXT_V7R | ARM_EXT_ADIV, 0)
/* Features that are present in v6M and v6S-M but not other v6 cores. */
#define ARM_ARCH_V6M_ONLY ARM_FEATURE (ARM_AEXT_V6M_ONLY, 0)
+/* v8-a+fp. */
+#define ARM_ARCH_V8A_FP ARM_FEATURE (ARM_AEXT_V8A, FPU_ARCH_VFP_ARMV8)
+/* v8-a+simd (implies fp). */
+#define ARM_ARCH_V8A_SIMD ARM_FEATURE (ARM_AEXT_V8A, \
+ FPU_ARCH_NEON_VFP_ARMV8)
+/* v8-a+crypto (implies simd+fp). */
+#define ARM_ARCH_V8A_CRYPTOV1 ARM_FEATURE (ARM_AEXT_V8A, \
+ FPU_ARCH_CRYPTO_NEON_VFP_ARMV8)
/* There are too many feature bits to fit in a single word, so use a
structure. For simplicity we put all core features in one word and
@@ -246,6 +269,9 @@ typedef struct
#define ARM_CPU_HAS_FEATURE(CPU,FEAT) \
(((CPU).core & (FEAT).core) != 0 || ((CPU).coproc & (FEAT).coproc) != 0)
+#define ARM_CPU_IS_ANY(CPU) \
+ ((CPU).core == ((arm_feature_set)ARM_ANY).core)
+
#define ARM_MERGE_FEATURE_SETS(TARG,F1,F2) \
do { \
(TARG).core = (F1).core | (F2).core; \