diff options
author | cvs2svn <> | 1999-05-30 20:06:15 +0400 |
---|---|---|
committer | cvs2svn <> | 1999-05-30 20:06:15 +0400 |
commit | 89daeb83e06ecc20f9ccb78e85d8978cd0a30f76 (patch) | |
tree | e7e624cff8ec3d938f7c3d2a7f004208c2609454 | |
parent | a3acbf46947e52ff596461a4cf6f539884c9dbbd (diff) |
This commit was manufactured by cvs2svn to create tag 'binu_ss_19990602'.binu_ss_19990602
Sprout from cygnus 1999-05-03 07:29:06 UTC Richard Henderson <rth@redhat.com> '19990502 sourceware import'
Cherrypick from master 1999-05-30 16:06:14 UTC Richard Henderson <rth@redhat.com> 'Cort Dougan <cort@cs.nmt.edu>':
ChangeLog
config.guess
config.sub
include/coff/ChangeLog
include/coff/arm.h
include/coff/mcore.h
include/elf/ChangeLog
include/elf/common.h
include/elf/i960.h
include/elf/m68k.h
include/elf/mcore.h
include/elf/reloc-macros.h
include/opcode/ChangeLog
include/opcode/hppa.h
include/opcode/i386.h
include/opcode/m68k.h
include/opcode/ppc.h
-rw-r--r-- | ChangeLog | 8 | ||||
-rwxr-xr-x | config.guess | 2 | ||||
-rwxr-xr-x | config.sub | 313 | ||||
-rw-r--r-- | include/coff/ChangeLog | 10 | ||||
-rw-r--r-- | include/coff/arm.h | 19 | ||||
-rw-r--r-- | include/coff/mcore.h | 1 | ||||
-rw-r--r-- | include/elf/ChangeLog | 26 | ||||
-rw-r--r-- | include/elf/common.h | 1 | ||||
-rw-r--r-- | include/elf/i960.h | 37 | ||||
-rw-r--r-- | include/elf/m68k.h | 2 | ||||
-rw-r--r-- | include/elf/mcore.h | 4 | ||||
-rw-r--r-- | include/elf/reloc-macros.h | 4 | ||||
-rw-r--r-- | include/opcode/ChangeLog | 38 | ||||
-rw-r--r-- | include/opcode/hppa.h | 64 | ||||
-rw-r--r-- | include/opcode/i386.h | 360 | ||||
-rw-r--r-- | include/opcode/m68k.h | 33 | ||||
-rw-r--r-- | include/opcode/ppc.h | 3 |
17 files changed, 561 insertions, 364 deletions
@@ -1,3 +1,11 @@ +Sun May 30 16:03:16 1999 Cort Dougan <cort@cs.nmt.edu> + + * config.guess (ppc-*-linux-gnu): Also use ld emul elf32ppclinux. + +1999-05-24 Nick Clifton <nickc@cygnus.com> + + * config.sub: Updated to match latest EGCS version. + 1999-04-30 Tom Tromey <tromey@cygnus.com> * ltmain.sh: [mode link] Always use CC given by ltconfig. diff --git a/config.guess b/config.guess index 3c75a80de..885f66120 100755 --- a/config.guess +++ b/config.guess @@ -576,7 +576,7 @@ EOF sparclinux) echo "${UNAME_MACHINE}-unknown-linux-gnuaout" ; exit 0 ;; armlinux) echo "${UNAME_MACHINE}-unknown-linux-gnuaout" ; exit 0 ;; m68klinux) echo "${UNAME_MACHINE}-unknown-linux-gnuaout" ; exit 0 ;; - elf32ppc) + elf32ppc | elf32ppclinux) # Determine Lib Version cat >dummy.c <<EOF #include <features.h> diff --git a/config.sub b/config.sub index 3d4f5fd21..d996fe15e 100755 --- a/config.sub +++ b/config.sub @@ -64,18 +64,6 @@ case $1 in ;; esac -# CYGNUS LOCAL marketing-names -# Here we handle any "marketing" names - translating them to -# standard triplets -case $1 in - mips-tx39-elf) - set mipstx39-unknown-elf - ;; - *) - ;; -esac -# END CYGNUS LOCAL marketing-names - # Separate what the user gave into CPU-COMPANY and OS or KERNEL-OS (if any). # Here we must recognize all the valid KERNEL-OS combinations. maybe_os=`echo $1 | sed 's/^\(.*\)-\([^-]*-[^-]*\)$/\2/'` @@ -110,13 +98,13 @@ case $os in os= basic_machine=$1 ;; - -sim | -cisco | -oki | -wec | -winbond ) # EGCS LOCAL + -sim | -cisco | -oki | -wec | -winbond) os= basic_machine=$1 ;; - -scout) # EGCS LOCAL + -scout) ;; - -wrs) # EGCS LOCAL + -wrs) os=vxworks basic_machine=$1 ;; @@ -175,65 +163,18 @@ case $basic_machine in # Recognize the basic CPU types without company name. # Some are omitted here because they have special meanings below. tahoe | i860 | m32r | m68k | m68000 | m88k | ns32k | arc | arm \ - | arme[lb] | pyramid | mn10200 | mn10300 \ - | tron | a29k | 580 | i960 | h8300 \ + | arme[lb] | pyramid | mn10200 | mn10300 | tron | a29k \ + | 580 | i960 | h8300 \ | hppa | hppa1.0 | hppa1.1 | hppa2.0 | hppa2.0w | hppa2.0n \ - | alpha | alphaev[45678] | alphaev56 | alphapca5[67] \ + | alpha | alphaev[4-8] | alphaev56 | alphapca5[67] \ | we32k | ns16k | clipper | i370 | sh | powerpc | powerpcle \ - | 1750a | dsp16xx | pdp11 \ - | mips64 | mipsel | mips64el | mips64orion | mips64orionel \ - | mipstx39 | mipstx39el \ - | sparc | sparclet | sparclite | sparc64 | sparc86x | v850 \ - | c4x) - basic_machine=$basic_machine-unknown - ;; - m88110 | m680[012346]0 | m683?2 | m68360 | m5200 | z8k | v70 \ - | h8500 | w65 | fr30 | mcore) # CYGNUS / EGCS LOCAL - basic_machine=$basic_machine-unknown - ;; - strongarm) # CYGNUS LOCAL nickc/strongarm - basic_machine=$basic_machine-unknown - ;; - thumb) - basic_machine=$basic_machine-unknown - ;; - # CYGNUS LOCAL vr4111/gavin - mips64vr4111 | mips64vr4111el) - basic_machine=$basic_machine-unknown - ;; - # END CYGNUS LOCAL vr4111/gavin - mips64vr4300 | mips64vr4300el) # EGCS LOCAL jsmith/vr4300 - basic_machine=$basic_machine-unknown - ;; - mips64vr4100 | mips64vr4100el) # EGCS LOCAL jsmith/vr4100 - basic_machine=$basic_machine-unknown - ;; - mips64vr5000 | mips64vr5000el) # EGCS LOCAL ian/vr5000 - basic_machine=$basic_machine-unknown - ;; - mips16) - basic_machine=$basic_machine-unknown - ;; - tic30) # CYGNUS LOCAL ian/tic30 - basic_machine=$basic_machine-unknown - ;; - c30) # CYGNUS LOCAL ian/tic30 - basic_machine=tic30-unknown - ;; - - tic80) # CYGNUS LOCAL fnf/TIc80 - basic_machine=$basic_machine-unknown - ;; - v850e) # CYGNUS LOCAL jtc/v850 - basic_machine=$basic_machine-unknown - ;; - v850ea) # CYGNUS LOCAL jtc/v850 - basic_machine=$basic_machine-unknown - ;; - d10v) - basic_machine=$basic_machine-unknown - ;; - d30v) # CYGNUS LOCAL hunt/d30v + | 1750a | dsp16xx | pdp11 | mips16 | mips64 | mipsel | mips64el \ + | mips64orion | mips64orionel | mipstx39 | mipstx39el \ + | mips64vr4300 | mips64vr4300el | mips64vr4100 | mips64vr4100el \ + | mips64vr5000 | miprs64vr5000el \ + | m88110 | m680[012346]0 | m683?2 | m68360 | m5200 | z8k | v70 \ + | sparc | sparclet | sparclite | sparc64 | sparc86x | sparcv9 \ + | thumb | v850 | c4x | d10v | h8500 | w65) basic_machine=$basic_machine-unknown ;; # We use `pc' rather than `unknown' @@ -251,54 +192,24 @@ case $basic_machine in vax-* | tahoe-* | i[34567]86-* | i860-* | m32r-* | m68k-* | m68000-* \ | m88k-* | sparc-* | ns32k-* | fx80-* | arc-* | arm-* | c[123]* \ | mips-* | pyramid-* | tron-* | a29k-* | romp-* | rs6000-* \ - | power-* | none-* | 580-* | cray2-* | h8300-* | i960-* \ + | power-* | none-* | 580-* | cray2-* | h8300-* | h8500-* | i960-* \ | xmp-* | ymp-* \ - | hppa-* | hppa1.0-* | hppa1.1-* \ - | hppa2.0-* | hppa2.0w-* | hppa2.0n-* \ - | alpha-* | alphaev[45678]-* | alphaev56-* | alphapca5[67]-* \ - | we32k-* | cydra-* | ns16k-* | pn-* | np1-* \ - | xps100-* | clipper-* | orion-* \ + | hppa-* | hppa1.0-* | hppa1.1-* | hppa2.0-* | hppa2.0w-* | hppa2.0n-* \ + | alpha-* | alphaev[4-8]-* | alphaev56-* | alphapca5[67]-* \ + | we32k-* | cydra-* | ns16k-* | pn-* | np1-* | xps100-* \ + | clipper-* | orion-* \ | sparclite-* | pdp11-* | sh-* | powerpc-* | powerpcle-* \ - | sparc64-* | sparcv9-* | sparc86x-* | mips64-* | mipsel-* \ - | mips64el-* | mips64orion-* | mips64orionel-* \ + | sparc64-* | sparcv9-* | sparc86x-* | mips16-* | mips64-* | mipsel-* \ + | mips64el-* | mips64orion-* | mips64orionel-* \ + | mips64vr4100-* | mips64vr4100el-* | mips64vr4300-* | mips64vr4300el-* \ | mipstx39-* | mipstx39el-* \ - | f301-* | arm*-* \ - | fr30-* | mcore-*) # CYGNUS LOCAL - ;; - m88110-* | m680[01234]0-* | m683?2-* | m68360-* | z8k-* | h8500-* | d10v-*) # EGCS LOCAL - ;; - strongarm-*) # CYGNUS LOCAL nickc/strongarm - ;; - thumb-*) # EGCS LOCAL angela/thumb - ;; - v850-*) # EGCS LOCAL - ;; - v850e-*) # CYGNUS LOCAL - ;; - v850ea-*) # CYGNUS LOCAL - ;; - d30v-*) # EGCS LOCAL - ;; - # CYGNUS LOCAL vr4111/gavin - mips64vr4111-* | mips64vr4111el-*) - ;; - # END CYGNUS LOCAL vr4111/gavin - mips64vr4300-* | mips64vr4300el-*) # EGCS LOCAL jsmith/vr4300 - ;; - mips64vr4100-* | mips64vr4100el-*) # EGCS LOCAL jsmith/vr4100 - ;; - mips16-*) # EGCS LOCAL krk/mips16 - ;; - tic30-*) # EGCS LOCAL ian/tic30 - ;; - c30-*) # EGCS LOCAL ian/tic30 - basic_machine=tic30-unknown - ;; - tic80-*) # CYGNUS LOCAL fnf/TIc80 + | f301-* | arm*-* | t3e-* \ + | m88110-* | m680[01234]0-* | m683?2-* | m68360-* | z8k-* | d10v-* \ + | thumb-* | v850-* | d30v-* | tic30-* | c30-* ) ;; # Recognize the various machine names and aliases which stand # for a CPU type and a company and sometimes even an OS. - 386bsd) # EGCS LOCAL + 386bsd) basic_machine=i386-unknown os=-bsd ;; @@ -308,11 +219,11 @@ case $basic_machine in 3b*) basic_machine=we32k-att ;; - a29khif) # EGCS LOCAL + a29khif) basic_machine=a29k-amd os=-udi ;; - adobe68k) # EGCS LOCAL + adobe68k) basic_machine=m68010-adobe os=-scout ;; @@ -345,7 +256,7 @@ case $basic_machine in basic_machine=m68k-apollo os=-sysv ;; - apollo68bsd) # EGCS LOCAL + apollo68bsd) basic_machine=m68k-apollo os=-bsd ;; @@ -425,7 +336,7 @@ case $basic_machine in encore | umax | mmax) basic_machine=ns32k-encore ;; - es1800 | OSE68k | ose68k | ose | OSE) # EGCS LOCAL + es1800 | OSE68k | ose68k | ose | OSE) basic_machine=m68k-ericsson os=-ose ;; @@ -447,11 +358,11 @@ case $basic_machine in basic_machine=h8300-hitachi os=-hms ;; - h8300xray) # EGCS LOCAL + h8300xray) basic_machine=h8300-hitachi os=-xray ;; - h8500hms) # EGCS LOCAL + h8500hms) basic_machine=h8500-hitachi os=-hms ;; @@ -470,22 +381,6 @@ case $basic_machine in basic_machine=m68k-hp os=-hpux ;; - w89k-*) # EGCS LOCAL - basic_machine=hppa1.1-winbond - os=-proelf - ;; - op50n-*) # EGCS LOCAL - basic_machine=hppa1.1-oki - os=-proelf - ;; - op60c-*) # EGCS LOCAL - basic_machine=hppa1.1-oki - os=-proelf - ;; - hppro) # EGCS LOCAL - basic_machine=hppa1.1-hp - os=-proelf - ;; hp3k9[0-9][0-9] | hp9[0-9][0-9]) basic_machine=hppa1.0-hp ;; @@ -495,22 +390,21 @@ case $basic_machine in hp9k3[2-9][0-9]) basic_machine=m68k-hp ;; - hp9k6[0-9][0-9] | hp6[0-9][0-9] ) + hp9k6[0-9][0-9] | hp6[0-9][0-9]) basic_machine=hppa1.0-hp ;; - hp9k7[0-79][0-9] | hp7[0-79][0-9] ) + hp9k7[0-79][0-9] | hp7[0-79][0-9]) basic_machine=hppa1.1-hp ;; - hp9k78[0-9] | hp78[0-9] ) + hp9k78[0-9] | hp78[0-9]) # FIXME: really hppa2.0-hp basic_machine=hppa1.1-hp ;; - hp9k8[67]1 | hp8[67]1 | hp9k80[24] | hp80[24] | \ - hp9k8[78]9 | hp8[78]9 | hp9k893 | hp893 ) + hp9k8[67]1 | hp8[67]1 | hp9k80[24] | hp80[24] | hp9k8[78]9 | hp8[78]9 | hp9k893 | hp893) # FIXME: really hppa2.0-hp basic_machine=hppa1.1-hp ;; - hp9k8[0-9][13679] | hp8[0-9][13679] ) + hp9k8[0-9][13679] | hp8[0-9][13679]) basic_machine=hppa1.1-hp ;; hp9k8[0-9][0-9] | hp8[0-9][0-9]) @@ -519,10 +413,14 @@ case $basic_machine in hppa-next) os=-nextstep3 ;; - hppaosf) # EGCS LOCAL + hppaosf) basic_machine=hppa1.1-hp os=-osf ;; + hppro) + basic_machine=hppa1.1-hp + os=-proelf + ;; i370-ibm* | ibm*) basic_machine=i370-ibm os=-mvs @@ -544,15 +442,15 @@ case $basic_machine in basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-solaris2 ;; - i386mach) # EGCS LOCAL + i386mach) basic_machine=i386-mach os=-mach ;; - i386-vsta | vsta) # EGCS LOCAL + i386-vsta | vsta) basic_machine=i386-unknown os=-vsta ;; - i386-go32 | go32) # EGCS LOCAL + i386-go32 | go32) basic_machine=i386-unknown os=-go32 ;; @@ -588,6 +486,10 @@ case $basic_machine in miniframe) basic_machine=m68000-convergent ;; + *mint | *MiNT) + basic_machine=m68k-atari + os=-mint + ;; mipsel*-linux*) basic_machine=mipsel-unknown os=-linux-gnu @@ -602,12 +504,12 @@ case $basic_machine in mips3*) basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`-unknown ;; - monitor) # EGCS LOCAL + monitor) basic_machine=m68k-rom68k os=-coff ;; - msdos) # EGCS LOCAL - basic_machine=i386-unknown + msdos) + basic_machine=i386-unknown os=-msdos ;; ncr3000) @@ -615,7 +517,7 @@ case $basic_machine in os=-sysv4 ;; netbsd386) - basic_machine=i386-unknown # EGCS LOCAL + basic_machine=i386-unknown os=-netbsd ;; netwinder) @@ -634,7 +536,7 @@ case $basic_machine in basic_machine=mips-sony os=-newsos ;; - necv70) # EGCS LOCAL + necv70) basic_machine=v70-nec os=-sysv ;; @@ -663,18 +565,22 @@ case $basic_machine in basic_machine=i960-intel os=-nindy ;; - mon960) # EGCS LOCAL + mon960) basic_machine=i960-intel os=-mon960 ;; np1) basic_machine=np1-gould ;; - OSE68000 | ose68000) # EGCS LOCAL + op50n-* | op60c-*) + basic_machine=hppa1.1-oki + os=-proelf + ;; + OSE68000 | ose68000) basic_machine=m68000-ericsson os=-ose ;; - os68k) # EGCS LOCAL + os68k) basic_machine=m68k-none os=-os68k ;; @@ -704,10 +610,10 @@ case $basic_machine in pentiumii | pentium2) basic_machine=i786-pc ;; - pentium-* | p5-* | k5-* | nexen-*) + pentium-* | p5-* | k5-* | k6-* | nexen-*) basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'` ;; - pentiumpro-* | p6-* | k6-* | 6x86-*) + pentiumpro-* | p6-* | 6x86-*) basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentiumii-* | pentium2-*) @@ -731,7 +637,7 @@ case $basic_machine in ps2) basic_machine=i386-ibm ;; - rom68k) # EGCS LOCAL + rom68k) basic_machine=m68k-rom68k os=-coff ;; @@ -741,7 +647,7 @@ case $basic_machine in rtpc | rtpc-*) basic_machine=romp-ibm ;; - sa29200) # EGCS LOCAL + sa29200) basic_machine=a29k-amd os=-udi ;; @@ -752,7 +658,7 @@ case $basic_machine in basic_machine=sh-hitachi os=-hms ;; - sparclite-wrs) # EGCS LOCAL + sparclite-wrs) basic_machine=sparclite-wrs os=-vxworks ;; @@ -763,10 +669,10 @@ case $basic_machine in spur) basic_machine=spur-unknown ;; - st2000) # EGCS LOCAL + st2000) basic_machine=m68k-tandem ;; - stratus) # EGCS LOCAL + stratus) basic_machine=i860-stratus os=-sysv4 ;; @@ -814,6 +720,10 @@ case $basic_machine in basic_machine=i386-sequent os=-dynix ;; + t3e) + basic_machine=t3e-cray + os=-unicos + ;; tx39) basic_machine=mipstx39-unknown ;; @@ -831,7 +741,7 @@ case $basic_machine in basic_machine=a29k-nyu os=-sym1 ;; - v810 | necv810) # EGCS LOCAL + v810 | necv810) basic_machine=v810-nec os=-none ;; @@ -858,9 +768,13 @@ case $basic_machine in basic_machine=a29k-wrs os=-vxworks ;; - w65*) # EGCS LOCAL - basic_machine=w65-wdc - os=-none + w65*) + basic_machine=w65-wdc + os=-none + ;; + w89k-*) + basic_machine=hppa1.1-winbond + os=-proelf ;; xmp) basic_machine=xmp-cray @@ -869,7 +783,7 @@ case $basic_machine in xps | xps100) basic_machine=xps100-honeywell ;; - z8k-*-coff) # EGCS LOCAL + z8k-*-coff) basic_machine=z8k-unknown os=-sim ;; @@ -880,13 +794,13 @@ case $basic_machine in # Here we handle the default manufacturer of certain CPU types. It is in # some cases the only manufacturer, in others, it is the most popular. - w89k) # EGCS LOCAL + w89k) basic_machine=hppa1.1-winbond ;; - op50n) # EGCS LOCAL + op50n) basic_machine=hppa1.1-oki ;; - op60c) # EGCS LOCAL + op60c) basic_machine=hppa1.1-oki ;; mips) @@ -923,16 +837,16 @@ case $basic_machine in orion105) basic_machine=clipper-highlevel ;; - mac | mpw | mac-mpw) # EGCS LOCAL + mac | mpw | mac-mpw) basic_machine=m68k-apple ;; - pmac | pmac-mpw) # EGCS LOCAL + pmac | pmac-mpw) basic_machine=powerpc-apple ;; - c4x*) - basic_machine=c4x-none - os=-coff - ;; + c4x*) + basic_machine=c4x-none + os=-coff + ;; *) echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 exit 1 @@ -991,18 +905,16 @@ case $os in | -udi* | -eabi* | -lites* | -ieee* | -go32* | -aux* \ | -cygwin* | -pe* | -psos* | -moss* | -proelf* | -rtems* \ | -mingw32* | -linux-gnu* | -uxpv* | -beos* | -mpeix* | -udk* \ - | -interix* | -uwin* ) + | -interix* | -uwin* | -rhapsody* | -openstep* | -oskit*) # Remember, each alternative MUST END IN *, to match a version number. ;; - # EGCS LOCAL -sim | -es1800* | -hms* | -xray | -os68k* | -none* | -v88r* \ - | -windows* | -osx | -abug | -netware* | -os9* | -beos* \ - | -macos* | -mpw* | -magic* | -mon960* | -lnews* ) + | -windows* | -osx | -abug | -netware* | -os9* | -beos* \ + | -macos* | -mpw* | -magic* | -mon960* | -lnews*) ;; -mac*) os=`echo $os | sed -e 's|mac|macos|'` ;; - # END EGCS LOCAL -linux*) os=`echo $os | sed -e 's|linux|linux-gnu|'` ;; @@ -1027,7 +939,7 @@ case $os in -acis*) os=-aos ;; - -386bsd) # EGCS LOCAL + -386bsd) os=-bsd ;; -ctix* | -uts*) @@ -1061,15 +973,18 @@ case $os in # This must come after -sysvr4. -sysv*) ;; - -ose*) # EGCS LOCAL + -ose*) os=-ose ;; - -es1800*) # EGCS LOCAL + -es1800*) os=-ose ;; -xenix) os=-xenix ;; + -*mint | -*MiNT) + os=-mint + ;; -none) ;; *) @@ -1119,15 +1034,15 @@ case $basic_machine in # default. # os=-sunos4 ;; - m68*-cisco) # EGCS LOCAL + m68*-cisco) os=-aout ;; - mips*-cisco) # EGCS LOCAL + mips*-cisco) + os=-elf + ;; + mips*-*) os=-elf ;; - mips*-*) # EGCS LOCAL - os=-elf - ;; *-tti) # must be before sparc entry or we get the wrong os. os=-sysv3 ;; @@ -1140,13 +1055,13 @@ case $basic_machine in *-ibm) os=-aix ;; - *-wec) # EGCS LOCAL + *-wec) os=-proelf ;; - *-winbond) # EGCS LOCAL + *-winbond) os=-proelf ;; - *-oki) # EGCS LOCAL + *-oki) os=-proelf ;; *-hp) @@ -1212,15 +1127,18 @@ case $basic_machine in f301-fujitsu) os=-uxpv ;; - *-rom68k) # EGCS LOCAL + *-rom68k) os=-coff ;; - *-*bug) # EGCS LOCAL + *-*bug) os=-coff ;; - *-apple) # EGCS LOCAL + *-apple) os=-macos ;; + *-atari*) + os=-mint + ;; *) os=-none ;; @@ -1278,12 +1196,15 @@ case $basic_machine in -aux*) vendor=apple ;; - -hms*) # EGCS LOCAL + -hms*) vendor=hitachi ;; - -mpw* | -macos*) # EGCS LOCAL + -mpw* | -macos*) vendor=apple ;; + -*mint | -*MiNT) + vendor=atari + ;; esac basic_machine=`echo $basic_machine | sed "s/unknown/$vendor/"` ;; diff --git a/include/coff/ChangeLog b/include/coff/ChangeLog index 8ad6e0cec..b6c35ab31 100644 --- a/include/coff/ChangeLog +++ b/include/coff/ChangeLog @@ -1,3 +1,13 @@ +Mon May 17 13:35:35 1999 Stan Cox <scox@cygnus.com> + + * coff/arm.h (F_PIC, F_ARM_2, F_ARM_2a, F_ARM_3, F_ARM_3M, + F_ARM_4, F_ARM_4T, F_APCS26): Changed values to distinguish + F_ARM_2a, F_ARM_3M, F_ARM_4T. + +1999-05-15 Nick Clifton <nickc@cygnus.com> + + * mcore.h (IMAGE_REL_MCORE_RVA): Define. + 1999-04-21 Nick Clifton <nickc@cygnus.com> * mcore.h (GET_LINENO_LNNO): New macro. diff --git a/include/coff/arm.h b/include/coff/arm.h index dd578b1a7..e5d78d693 100644 --- a/include/coff/arm.h +++ b/include/coff/arm.h @@ -44,16 +44,17 @@ struct external_filehdr { /* Bits stored in flags field of the internal_f structure */ #define F_INTERWORK (0x0010) -#define F_PIC_INT (0x0020) #define F_APCS_FLOAT (0x0040) -#define F_ARM_ARCHITECTURE_MASK (0x0c00) -#define F_ARM_2 (0x0000) -#define F_ARM_2a (0x0000) -#define F_ARM_3 (0x0400) -#define F_ARM_3M (0x0400) -#define F_ARM_4 (0x0800) -#define F_ARM_4T (0x0c00) -#define F_APCS26 (0x4000) +#define F_PIC (0x0080) +#define F_APCS26 (0x1000) +#define F_ARM_ARCHITECTURE_MASK (0x4000+0x0800+0x0400) +#define F_ARM_2 (0x0400) +#define F_ARM_2a (0x0800) +#define F_ARM_3 (0x0c00) +#define F_ARM_3M (0x4000) +#define F_ARM_4 (0x4400) +#define F_ARM_4T (0x4800) +#define F_ARM_spare (0x4c00) /* * ARMMAGIC ought to encoded the procesor type, diff --git a/include/coff/mcore.h b/include/coff/mcore.h index 974b62e16..f31894796 100644 --- a/include/coff/mcore.h +++ b/include/coff/mcore.h @@ -32,6 +32,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define IMAGE_REL_MCORE_PCREL_IMM4BY2 0x0004 #define IMAGE_REL_MCORE_PCREL_32 0x0005 #define IMAGE_REL_MCORE_PCREL_JSR_IMM11BY2 0x0006 +#define IMAGE_REL_MCORE_RVA 0x0007 #define PEMCORE diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog index deaccd412..86b34bc87 100644 --- a/include/elf/ChangeLog +++ b/include/elf/ChangeLog @@ -1,3 +1,29 @@ +1999-05-29 Nick Clifton <nickc@cygnus.com> + + * common.h (ELFOSABI_ARM): Define. + +1999-05-28 Nick Clifton <nickc@cygnus.com> + + * reloc-macros.h: Update comment. + +1999-05-28 Ian Lance Taylor <ian@zembu.com> + + * i960.h: New file. + +1999-05-16 Nick Clifton <nickc@cygnus.com> + + * mcore.h (R_MCORE_COPY): Define. + (R_MCORE_GLOB_DAT): Define. + (R_MCORE_JUMP_SLOT): Define. + +1999-05-15 Nick Clifton <nickc@cygnus.com> + + * mcore.h (R_MCORE_RELATIVE): Define. + +999-05-05 Catherine Moore <clm@cygnus.com> + + * m68k.h (EF_CPU32): Define. + 1999-04-21 Nick Clifton <nickc@cygnus.com> * reloc-macros.h (START_RELOC_NUMBERS): Prepend an underscore to diff --git a/include/elf/common.h b/include/elf/common.h index cda3ba0d9..5274d4511 100644 --- a/include/elf/common.h +++ b/include/elf/common.h @@ -60,6 +60,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define ELFOSABI_SYSV 0 /* UNIX System V ABI */ #define ELFOSABI_HPUX 1 /* HP-UX operating system */ #define ELFOSABI_STANDALONE 255 /* Standalone (embedded) application */ +#define ELFOSABI_ARM 97 /* ARM */ #define EI_ABIVERSION 8 /* ABI version */ diff --git a/include/elf/i960.h b/include/elf/i960.h new file mode 100644 index 000000000..7939d2899 --- /dev/null +++ b/include/elf/i960.h @@ -0,0 +1,37 @@ +/* Intel 960 ELF support for BFD. + Copyright (C) 1999 Free Software Foundation, Inc. + + This file is part of BFD, the Binary File Descriptor library. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software Foundation, + Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef _ELF_I960_H +#define _ELF_I960_H + +#include "reloc-macros.h" + +START_RELOC_NUMBERS (elf_i960_reloc_type) + RELOC_NUMBER (R_960_NONE, 0) + RELOC_NUMBER (R_960_12, 1) + RELOC_NUMBER (R_960_32, 2) + RELOC_NUMBER (R_960_IP24, 3) + RELOC_NUMBER (R_960_SUB, 4) + RELOC_NUMBER (R_960_OPTCALL, 5) + RELOC_NUMBER (R_960_OPTCALLX, 6) + RELOC_NUMBER (R_960_OPTCALLXA, 7) + EMPTY_RELOC (R_960_max) +END_RELOC_NUMBERS + +#endif /* _ELF_I960_H */ diff --git a/include/elf/m68k.h b/include/elf/m68k.h index db31cdcda..f872e0fcf 100644 --- a/include/elf/m68k.h +++ b/include/elf/m68k.h @@ -54,3 +54,5 @@ START_RELOC_NUMBERS (elf_m68k_reloc_type) END_RELOC_NUMBERS #endif + +#define EF_CPU32 0x00810000 diff --git a/include/elf/mcore.h b/include/elf/mcore.h index a7c4dad11..068a93a5d 100644 --- a/include/elf/mcore.h +++ b/include/elf/mcore.h @@ -34,6 +34,10 @@ START_RELOC_NUMBERS (elf_mcore_reloc_type) RELOC_NUMBER (R_MCORE_PCRELJSR_IMM11BY2, 6) RELOC_NUMBER (R_MCORE_GNU_VTINHERIT, 7) RELOC_NUMBER (R_MCORE_GNU_VTENTRY, 8) + RELOC_NUMBER (R_MCORE_RELATIVE, 9) + RELOC_NUMBER (R_MCORE_COPY, 10) + RELOC_NUMBER (R_MCORE_GLOB_DAT, 11) + RELOC_NUMBER (R_MCORE_JUMP_SLOT, 12) EMPTY_RELOC (R_MCORE_max) END_RELOC_NUMBERS diff --git a/include/elf/reloc-macros.h b/include/elf/reloc-macros.h index 976229129..42174caee 100644 --- a/include/elf/reloc-macros.h +++ b/include/elf/reloc-macros.h @@ -46,8 +46,8 @@ If RELOC_MACROS_GEN_FUNC *is* defined, then instead the following function will be generated: - static char * foo PARAMS ((unsigned long rtype)); - static char * + static const char * foo PARAMS ((unsigned long rtype)); + static const char * foo (rtype) unsigned long rtype; { diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 79bc3cc7c..f589e5e8a 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,41 @@ +Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com) + + * hppa.h (pa_opcodes): Move integer arithmetic instructions after + integer logical instructions. + +1999-05-28 Linus Nordberg <linus.nordberg@canit.se> + + * m68k.h: Document new formats `E', `G', `H' and new places `N', + `n', `o'. + + * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u' + and new places `m', `M', `h'. + +Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com + + * hppa.h (pa_opcodes): Add several processor specific system + instructions. + +Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com) + + * hppa.h (pa_opcodes): Add second entry for "comb", "comib", + "addb", and "addib" to be used by the disassembler. + +1999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au> + + * i386.h (ReverseModrm): Remove all occurences. + (InvMem): Add to control/debug/test mov insns, movhlps, movlhps, + movmskps, pextrw, pmovmskb, maskmovq. + Change NoSuf to FP on all MMX, XMM and AMD insns as these all + ignore the data size prefix. + + * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD. + Mostly stolen from Doug Ledford <dledford@redhat.com> + +Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com> + + * ppc.h (PPC_OPCODE_64_BRIDGE): New. + 1999-04-14 Doug Evans <devans@casey.cygnus.com> * cgen.h (CGEN_ATTR): Delete member num_nonbools. diff --git a/include/opcode/hppa.h b/include/opcode/hppa.h index 30ccb6ccf..858b65a6c 100644 --- a/include/opcode/hppa.h +++ b/include/opcode/hppa.h @@ -184,9 +184,21 @@ static const struct pa_opcode pa_opcodes[] = { "b", 0xe8000000, 0xffe0e000, "nW", pa10}, /* bl foo,r0 */ { "ldi", 0x34000000, 0xffe0c000, "j,x", pa10}, /* ldo val(r0),r */ { "comib", 0x84000000, 0xfc000000, "?n5,b,w", pa10}, /* comib{tf}*/ +/* This entry is for the disassembler only. It will never be used by + assembler. */ +{ "comib", 0x8c000000, 0xfc000000, "?n5,b,w", pa10}, /* comib{tf}*/ { "comb", 0x80000000, 0xfc000000, "?nx,b,w", pa10}, /* comb{tf} */ +/* This entry is for the disassembler only. It will never be used by + assembler. */ +{ "comb", 0x88000000, 0xfc000000, "?nx,b,w", pa10}, /* comb{tf} */ { "addb", 0xa0000000, 0xfc000000, "@nx,b,w", pa10}, /* addb{tf} */ +/* This entry is for the disassembler only. It will never be used by + assembler. */ +{ "addb", 0xa8000000, 0xfc000000, "@nx,b,w", pa10}, { "addib", 0xa4000000, 0xfc000000, "@n5,b,w", pa10}, /* addib{tf}*/ +/* This entry is for the disassembler only. It will never be used by + assembler. */ +{ "addib", 0xac000000, 0xfc000000, "@n5,b,w", pa10}, /* addib{tf}*/ { "nop", 0x08000240, 0xffffffff, "", pa10}, /* or 0,0,0 */ { "copy", 0x08000240, 0xffe0ffe0, "x,t", pa10}, /* or r,0,t */ { "mtsar", 0x01601840, 0xffe0ffff, "x", pa10}, /* mtctl r,cr11 */ @@ -264,27 +276,6 @@ static const struct pa_opcode pa_opcodes[] = /* Computation Instructions */ -{ "add", 0x08000600, 0xfc000fe0, "dx,b,t", pa10}, -{ "addl", 0x08000a00, 0xfc000fe0, "dx,b,t", pa10}, -{ "addo", 0x08000e00, 0xfc000fe0, "dx,b,t", pa10}, -{ "addc", 0x08000700, 0xfc000fe0, "dx,b,t", pa10}, -{ "addco", 0x08000f00, 0xfc000fe0, "dx,b,t", pa10}, -{ "sh1add", 0x08000640, 0xfc000fe0, "dx,b,t", pa10}, -{ "sh1addl", 0x08000a40, 0xfc000fe0, "dx,b,t", pa10}, -{ "sh1addo", 0x08000e40, 0xfc000fe0, "dx,b,t", pa10}, -{ "sh2add", 0x08000680, 0xfc000fe0, "dx,b,t", pa10}, -{ "sh2addl", 0x08000a80, 0xfc000fe0, "dx,b,t", pa10}, -{ "sh2addo", 0x08000e80, 0xfc000fe0, "dx,b,t", pa10}, -{ "sh3add", 0x080006c0, 0xfc000fe0, "dx,b,t", pa10}, -{ "sh3addl", 0x08000ac0, 0xfc000fe0, "dx,b,t", pa10}, -{ "sh3addo", 0x08000ec0, 0xfc000fe0, "dx,b,t", pa10}, -{ "sub", 0x08000400, 0xfc000fe0, "ax,b,t", pa10}, -{ "subo", 0x08000c00, 0xfc000fe0, "ax,b,t", pa10}, -{ "subb", 0x08000500, 0xfc000fe0, "ax,b,t", pa10}, -{ "subbo", 0x08000d00, 0xfc000fe0, "ax,b,t", pa10}, -{ "subt", 0x080004c0, 0xfc000fe0, "ax,b,t", pa10}, -{ "subto", 0x08000cc0, 0xfc000fe0, "ax,b,t", pa10}, -{ "ds", 0x08000440, 0xfc000fe0, "ax,b,t", pa10}, { "comclr", 0x08000880, 0xfc000fe0, "ax,b,t", pa10}, { "or", 0x08000240, 0xfc000fe0, "&x,b,t", pa10}, { "xor", 0x08000280, 0xfc000fe0, "&x,b,t", pa10}, @@ -299,9 +290,30 @@ static const struct pa_opcode pa_opcodes[] = { "addio", 0xb4000800, 0xfc000800, "di,b,x", pa10}, { "addit", 0xb0000000, 0xfc000800, "di,b,x", pa10}, { "addito", 0xb0000800, 0xfc000800, "di,b,x", pa10}, +{ "add", 0x08000600, 0xfc000fe0, "dx,b,t", pa10}, +{ "addl", 0x08000a00, 0xfc000fe0, "dx,b,t", pa10}, +{ "addo", 0x08000e00, 0xfc000fe0, "dx,b,t", pa10}, +{ "addc", 0x08000700, 0xfc000fe0, "dx,b,t", pa10}, +{ "addco", 0x08000f00, 0xfc000fe0, "dx,b,t", pa10}, +{ "sub", 0x08000400, 0xfc000fe0, "ax,b,t", pa10}, +{ "subo", 0x08000c00, 0xfc000fe0, "ax,b,t", pa10}, +{ "subb", 0x08000500, 0xfc000fe0, "ax,b,t", pa10}, +{ "subbo", 0x08000d00, 0xfc000fe0, "ax,b,t", pa10}, +{ "subt", 0x080004c0, 0xfc000fe0, "ax,b,t", pa10}, +{ "subto", 0x08000cc0, 0xfc000fe0, "ax,b,t", pa10}, +{ "ds", 0x08000440, 0xfc000fe0, "ax,b,t", pa10}, { "subi", 0x94000000, 0xfc000800, "ai,b,x", pa10}, { "subio", 0x94000800, 0xfc000800, "ai,b,x", pa10}, { "comiclr", 0x90000000, 0xfc000800, "ai,b,x", pa10}, +{ "sh1add", 0x08000640, 0xfc000fe0, "dx,b,t", pa10}, +{ "sh1addl", 0x08000a40, 0xfc000fe0, "dx,b,t", pa10}, +{ "sh1addo", 0x08000e40, 0xfc000fe0, "dx,b,t", pa10}, +{ "sh2add", 0x08000680, 0xfc000fe0, "dx,b,t", pa10}, +{ "sh2addl", 0x08000a80, 0xfc000fe0, "dx,b,t", pa10}, +{ "sh2addo", 0x08000e80, 0xfc000fe0, "dx,b,t", pa10}, +{ "sh3add", 0x080006c0, 0xfc000fe0, "dx,b,t", pa10}, +{ "sh3addl", 0x08000ac0, 0xfc000fe0, "dx,b,t", pa10}, +{ "sh3addo", 0x08000ec0, 0xfc000fe0, "dx,b,t", pa10}, /* Extract and Deposit Instructions */ @@ -378,6 +390,16 @@ static const struct pa_opcode pa_opcodes[] = { "fice", 0x040002c0, 0xfc001fdf, "Zx(b)", pa10}, { "diag", 0x14000000, 0xfc000000, "D", pa10}, +/* These may be specific to certain versions of the PA. Joel claimed + they were 72000 (7200?) specific. However, I'm almost certain the + mtcpu/mfcpu were undocumented, but available in the older 700 machines. */ +{ "mtcpu", 0x14001600, 0xfc00ffff, "x,^"}, +{ "mfcpu", 0x14001A00, 0xfc00ffff, "^,x"}, +{ "tocen", 0x14403600, 0xffffffff, ""}, +{ "tocdis", 0x14401620, 0xffffffff, ""}, +{ "shdwgr", 0x14402600, 0xffffffff, ""}, +{ "grshdw", 0x14400620, 0xffffffff, ""}, + /* gfw and gfr are not in the HP PA 1.1 manual, but they are in either the Timex FPU or the Mustang ERS (not sure which) manual. */ { "gfw", 0x04001680, 0xfc003fdf, "Zx(s,b)", pa11}, diff --git a/include/opcode/i386.h b/include/opcode/i386.h index ef8fece15..41f2412d6 100644 --- a/include/opcode/i386.h +++ b/include/opcode/i386.h @@ -42,7 +42,6 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ static const template i386_optab[] = { #define X None -#define ReverseModrm (ReverseRegRegmem|Modrm) #define NoSuf (No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_dSuf|No_xSuf) #define b_Suf (No_wSuf|No_lSuf|No_sSuf|No_dSuf|No_xSuf) #define w_Suf (No_bSuf|No_lSuf|No_sSuf|No_dSuf|No_xSuf) @@ -84,26 +83,26 @@ static const template i386_optab[] = { { "mov", 2, 0x8c, X, wl_Suf|Modrm, { SReg3|SReg2, WordReg|WordMem, 0 } }, { "mov", 2, 0x8e, X, wl_Suf|Modrm|IgnoreSize, { WordReg|WordMem, SReg3|SReg2, 0 } }, /* move to/from control debug registers */ -{ "mov", 2, 0x0f20, X, l_Suf|D|Modrm|IgnoreSize, { Control, Reg32, 0} }, -{ "mov", 2, 0x0f21, X, l_Suf|D|Modrm|IgnoreSize, { Debug, Reg32, 0} }, -{ "mov", 2, 0x0f24, X, l_Suf|D|Modrm|IgnoreSize, { Test, Reg32, 0} }, +{ "mov", 2, 0x0f20, X, l_Suf|D|Modrm|IgnoreSize, { Control, Reg32|InvMem, 0} }, +{ "mov", 2, 0x0f21, X, l_Suf|D|Modrm|IgnoreSize, { Debug, Reg32|InvMem, 0} }, +{ "mov", 2, 0x0f24, X, l_Suf|D|Modrm|IgnoreSize, { Test, Reg32|InvMem, 0} }, /* move with sign extend */ /* "movsbl" & "movsbw" must not be unified into "movsb" to avoid conflict with the "movs" string move instruction. */ -{"movsbl", 2, 0x0fbe, X, NoSuf|ReverseModrm, { Reg8|ByteMem, Reg32, 0} }, -{"movsbw", 2, 0x0fbe, X, NoSuf|ReverseModrm, { Reg8|ByteMem, Reg16, 0} }, -{"movswl", 2, 0x0fbf, X, NoSuf|ReverseModrm, { Reg16|ShortMem, Reg32, 0} }, +{"movsbl", 2, 0x0fbe, X, NoSuf|Modrm, { Reg8|ByteMem, Reg32, 0} }, +{"movsbw", 2, 0x0fbe, X, NoSuf|Modrm, { Reg8|ByteMem, Reg16, 0} }, +{"movswl", 2, 0x0fbf, X, NoSuf|Modrm, { Reg16|ShortMem, Reg32, 0} }, /* Intel Syntax */ -{"movsx", 2, 0x0fbf, X, w_Suf|ReverseModrm|IgnoreSize, { Reg16|ShortMem, Reg32, 0} }, -{"movsx", 2, 0x0fbe, X, b_Suf|ReverseModrm, { Reg8|ByteMem, WordReg, 0} }, +{"movsx", 2, 0x0fbf, X, w_Suf|Modrm|IgnoreSize, { Reg16|ShortMem, Reg32, 0} }, +{"movsx", 2, 0x0fbe, X, b_Suf|Modrm, { Reg8|ByteMem, WordReg, 0} }, /* move with zero extend */ -{"movzb", 2, 0x0fb6, X, wl_Suf|ReverseModrm, { Reg8|ByteMem, WordReg, 0} }, -{"movzwl", 2, 0x0fb7, X, NoSuf|ReverseModrm, { Reg16|ShortMem, Reg32, 0} }, +{"movzb", 2, 0x0fb6, X, wl_Suf|Modrm, { Reg8|ByteMem, WordReg, 0} }, +{"movzwl", 2, 0x0fb7, X, NoSuf|Modrm, { Reg16|ShortMem, Reg32, 0} }, /* Intel Syntax */ -{"movzx", 2, 0x0fb7, X, w_Suf|ReverseModrm|IgnoreSize, { Reg16|ShortMem, Reg32, 0} }, -{"movzx", 2, 0x0fb6, X, b_Suf|ReverseModrm, { Reg8|ByteMem, WordReg, 0} }, +{"movzx", 2, 0x0fb7, X, w_Suf|Modrm|IgnoreSize, { Reg16|ShortMem, Reg32, 0} }, +{"movzx", 2, 0x0fb6, X, b_Suf|Modrm, { Reg8|ByteMem, WordReg, 0} }, /* push instructions */ {"push", 1, 0x50, X, wl_Suf|ShortForm, { WordReg,0,0 } }, @@ -250,9 +249,9 @@ static const template i386_optab[] = { These multiplies can only be selected with single operand forms. */ {"mul", 1, 0xf6, 4, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, {"imul", 1, 0xf6, 5, bwl_Suf|W|Modrm, { Reg|AnyMem, 0, 0} }, -{"imul", 2, 0x0faf, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"imul", 3, 0x6b, X, wl_Suf|ReverseModrm, { Imm8S, WordReg|WordMem, WordReg} }, -{"imul", 3, 0x69, X, wl_Suf|ReverseModrm, { Imm16|Imm32, WordReg|WordMem, WordReg} }, +{"imul", 2, 0x0faf, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"imul", 3, 0x6b, X, wl_Suf|Modrm, { Imm8S, WordReg|WordMem, WordReg} }, +{"imul", 3, 0x69, X, wl_Suf|Modrm, { Imm16|Imm32, WordReg|WordMem, WordReg} }, /* imul with 2 operands mimics imul with 3 by putting the register in both i.rm.reg & i.rm.regmem fields. regKludge enables this transformation. */ @@ -448,8 +447,8 @@ static const template i386_optab[] = { {"xlat", 1, 0xd7, X, b_Suf|IsString, { AnyMem, 0, 0} }, /* bit manipulation */ -{"bsf", 2, 0x0fbc, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"bsr", 2, 0x0fbd, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, +{"bsf", 2, 0x0fbc, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"bsr", 2, 0x0fbd, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, {"bt", 2, 0x0fa3, X, wl_Suf|Modrm, { WordReg, WordReg|WordMem, 0} }, {"bt", 2, 0x0fba, 4, wl_Suf|Modrm, { Imm8, WordReg|WordMem, 0} }, {"btc", 2, 0x0fbb, X, wl_Suf|Modrm, { WordReg, WordReg|WordMem, 0} }, @@ -479,12 +478,12 @@ static const template i386_optab[] = { /* protection control */ {"arpl", 2, 0x63, X, NoSuf|Modrm|IgnoreSize,{ Reg16, Reg16|ShortMem, 0} }, -{"lar", 2, 0x0f02, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, +{"lar", 2, 0x0f02, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, {"lgdt", 1, 0x0f01, 2, wl_Suf|Modrm, { WordMem, 0, 0} }, {"lidt", 1, 0x0f01, 3, wl_Suf|Modrm, { WordMem, 0, 0} }, {"lldt", 1, 0x0f00, 2, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, {"lmsw", 1, 0x0f01, 6, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, -{"lsl", 2, 0x0f03, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, +{"lsl", 2, 0x0f03, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, {"ltr", 1, 0x0f00, 3, NoSuf|Modrm|IgnoreSize,{ Reg16|ShortMem, 0, 0} }, {"sgdt", 1, 0x0f01, 0, wl_Suf|Modrm, { WordMem, 0, 0} }, @@ -794,34 +793,34 @@ static const template i386_optab[] = { {"ud2a", 0, 0x0f0b, X, NoSuf, { 0, 0, 0} }, /* alias for ud2 */ {"ud2b", 0, 0x0fb9, X, NoSuf, { 0, 0, 0} }, /* 2nd. official undefined instr. */ -{"cmovo", 2, 0x0f40, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovno", 2, 0x0f41, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovb", 2, 0x0f42, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovc", 2, 0x0f42, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovnae", 2, 0x0f42, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovae", 2, 0x0f43, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovnc", 2, 0x0f43, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovnb", 2, 0x0f43, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmove", 2, 0x0f44, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovz", 2, 0x0f44, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovne", 2, 0x0f45, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovnz", 2, 0x0f45, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovbe", 2, 0x0f46, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovna", 2, 0x0f46, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmova", 2, 0x0f47, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovnbe", 2, 0x0f47, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovs", 2, 0x0f48, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovns", 2, 0x0f49, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovp", 2, 0x0f4a, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovnp", 2, 0x0f4b, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovl", 2, 0x0f4c, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovnge", 2, 0x0f4c, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovge", 2, 0x0f4d, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovnl", 2, 0x0f4d, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovle", 2, 0x0f4e, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovng", 2, 0x0f4e, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovg", 2, 0x0f4f, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, -{"cmovnle", 2, 0x0f4f, X, wl_Suf|ReverseModrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovo", 2, 0x0f40, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovno", 2, 0x0f41, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovb", 2, 0x0f42, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovc", 2, 0x0f42, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovnae", 2, 0x0f42, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovae", 2, 0x0f43, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovnc", 2, 0x0f43, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovnb", 2, 0x0f43, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmove", 2, 0x0f44, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovz", 2, 0x0f44, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovne", 2, 0x0f45, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovnz", 2, 0x0f45, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovbe", 2, 0x0f46, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovna", 2, 0x0f46, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmova", 2, 0x0f47, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovnbe", 2, 0x0f47, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovs", 2, 0x0f48, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovns", 2, 0x0f49, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovp", 2, 0x0f4a, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovnp", 2, 0x0f4b, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovl", 2, 0x0f4c, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovnge", 2, 0x0f4c, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovge", 2, 0x0f4d, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovnl", 2, 0x0f4d, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovle", 2, 0x0f4e, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovng", 2, 0x0f4e, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovg", 2, 0x0f4f, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, +{"cmovnle", 2, 0x0f4f, X, wl_Suf|Modrm, { WordReg|WordMem, WordReg, 0} }, {"fcmovb", 2, 0xdac0, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} }, {"fcmovnae",2, 0xdac0, X, NoSuf|ShortForm, { FloatReg, FloatAcc, 0} }, @@ -853,95 +852,182 @@ static const template i386_optab[] = { /* MMX instructions. */ -{"emms", 0, 0x0f77, X, NoSuf, { 0, 0, 0 } }, -{"movd", 2, 0x0f6e, X, NoSuf|Modrm, { Reg32|LongMem, RegMMX, 0 } }, -{"movd", 2, 0x0f7e, X, NoSuf|Modrm, { RegMMX, Reg32|LongMem, 0 } }, -{"movq", 2, 0x0f6f, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"movq", 2, 0x0f7f, X, NoSuf|Modrm, { RegMMX, RegMMX|LongMem, 0 } }, -{"packssdw", 2, 0x0f6b, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"packsswb", 2, 0x0f63, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"packuswb", 2, 0x0f67, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"paddb", 2, 0x0ffc, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"paddw", 2, 0x0ffd, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"paddd", 2, 0x0ffe, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"paddsb", 2, 0x0fec, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"paddsw", 2, 0x0fed, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"paddusb", 2, 0x0fdc, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"paddusw", 2, 0x0fdd, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pand", 2, 0x0fdb, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pandn", 2, 0x0fdf, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pcmpeqb", 2, 0x0f74, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pcmpeqw", 2, 0x0f75, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pcmpeqd", 2, 0x0f76, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pcmpgtb", 2, 0x0f64, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pcmpgtw", 2, 0x0f65, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pcmpgtd", 2, 0x0f66, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pmaddwd", 2, 0x0ff5, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pmulhw", 2, 0x0fe5, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pmullw", 2, 0x0fd5, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"por", 2, 0x0feb, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"psllw", 2, 0x0ff1, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"psllw", 2, 0x0f71, 6, NoSuf|Modrm, { Imm8, RegMMX, 0 } }, -{"pslld", 2, 0x0ff2, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pslld", 2, 0x0f72, 6, NoSuf|Modrm, { Imm8, RegMMX, 0 } }, -{"psllq", 2, 0x0ff3, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"psllq", 2, 0x0f73, 6, NoSuf|Modrm, { Imm8, RegMMX, 0 } }, -{"psraw", 2, 0x0fe1, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"psraw", 2, 0x0f71, 4, NoSuf|Modrm, { Imm8, RegMMX, 0 } }, -{"psrad", 2, 0x0fe2, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"psrad", 2, 0x0f72, 4, NoSuf|Modrm, { Imm8, RegMMX, 0 } }, -{"psrlw", 2, 0x0fd1, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"psrlw", 2, 0x0f71, 2, NoSuf|Modrm, { Imm8, RegMMX, 0 } }, -{"psrld", 2, 0x0fd2, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"psrld", 2, 0x0f72, 2, NoSuf|Modrm, { Imm8, RegMMX, 0 } }, -{"psrlq", 2, 0x0fd3, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"psrlq", 2, 0x0f73, 2, NoSuf|Modrm, { Imm8, RegMMX, 0 } }, -{"psubb", 2, 0x0ff8, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"psubw", 2, 0x0ff9, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"psubd", 2, 0x0ffa, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"psubsb", 2, 0x0fe8, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"psubsw", 2, 0x0fe9, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"psubusb", 2, 0x0fd8, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"psubusw", 2, 0x0fd9, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"punpckhbw",2, 0x0f68, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"punpckhwd",2, 0x0f69, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"punpckhdq",2, 0x0f6a, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"punpcklbw",2, 0x0f60, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"punpcklwd",2, 0x0f61, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"punpckldq",2, 0x0f62, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pxor", 2, 0x0fef, X, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, - - +{"emms", 0, 0x0f77, X, FP, { 0, 0, 0 } }, +{"movd", 2, 0x0f6e, X, FP|Modrm, { Reg32|LongMem, RegMMX, 0 } }, +{"movd", 2, 0x0f7e, X, FP|Modrm, { RegMMX, Reg32|LongMem, 0 } }, +{"movq", 2, 0x0f6f, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"movq", 2, 0x0f7f, X, FP|Modrm, { RegMMX, RegMMX|LongMem, 0 } }, +{"packssdw", 2, 0x0f6b, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"packsswb", 2, 0x0f63, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"packuswb", 2, 0x0f67, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"paddb", 2, 0x0ffc, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"paddw", 2, 0x0ffd, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"paddd", 2, 0x0ffe, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"paddsb", 2, 0x0fec, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"paddsw", 2, 0x0fed, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"paddusb", 2, 0x0fdc, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"paddusw", 2, 0x0fdd, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pand", 2, 0x0fdb, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pandn", 2, 0x0fdf, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pcmpeqb", 2, 0x0f74, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pcmpeqw", 2, 0x0f75, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pcmpeqd", 2, 0x0f76, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pcmpgtb", 2, 0x0f64, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pcmpgtw", 2, 0x0f65, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pcmpgtd", 2, 0x0f66, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pmaddwd", 2, 0x0ff5, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pmulhw", 2, 0x0fe5, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pmullw", 2, 0x0fd5, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"por", 2, 0x0feb, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psllw", 2, 0x0ff1, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psllw", 2, 0x0f71, 6, FP|Modrm, { Imm8, RegMMX, 0 } }, +{"pslld", 2, 0x0ff2, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pslld", 2, 0x0f72, 6, FP|Modrm, { Imm8, RegMMX, 0 } }, +{"psllq", 2, 0x0ff3, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psllq", 2, 0x0f73, 6, FP|Modrm, { Imm8, RegMMX, 0 } }, +{"psraw", 2, 0x0fe1, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psraw", 2, 0x0f71, 4, FP|Modrm, { Imm8, RegMMX, 0 } }, +{"psrad", 2, 0x0fe2, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psrad", 2, 0x0f72, 4, FP|Modrm, { Imm8, RegMMX, 0 } }, +{"psrlw", 2, 0x0fd1, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psrlw", 2, 0x0f71, 2, FP|Modrm, { Imm8, RegMMX, 0 } }, +{"psrld", 2, 0x0fd2, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psrld", 2, 0x0f72, 2, FP|Modrm, { Imm8, RegMMX, 0 } }, +{"psrlq", 2, 0x0fd3, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psrlq", 2, 0x0f73, 2, FP|Modrm, { Imm8, RegMMX, 0 } }, +{"psubb", 2, 0x0ff8, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psubw", 2, 0x0ff9, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psubd", 2, 0x0ffa, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psubsb", 2, 0x0fe8, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psubsw", 2, 0x0fe9, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psubusb", 2, 0x0fd8, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"psubusw", 2, 0x0fd9, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"punpckhbw",2, 0x0f68, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"punpckhwd",2, 0x0f69, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"punpckhdq",2, 0x0f6a, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"punpcklbw",2, 0x0f60, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"punpcklwd",2, 0x0f61, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"punpckldq",2, 0x0f62, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, +{"pxor", 2, 0x0fef, X, FP|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, + + +/* PIII Katmai New Instructions / SIMD instructions */ + +{"addps", 2, 0x0f58, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"addss", 2, 0xf30f58, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, +{"andnps", 2, 0x0f55, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"andps", 2, 0x0f54, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, +{"cmpps", 3, 0x0fc2, X, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } }, +{"cmpss", 3, 0xf30fc2, X, FP|Modrm, { Imm8, RegXMM|WordMem, RegXMM } }, +{"cmpeqps", 2, 0x0fc2, 0, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, +{"cmpeqss", 2, 0xf30fc2, 0, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, +{"cmpltps", 2, 0x0fc2, 1, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, +{"cmpltss", 2, 0xf30fc2, 1, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, +{"cmpleps", 2, 0x0fc2, 2, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, +{"cmpless", 2, 0xf30fc2, 2, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, +{"cmpunordps",2, 0x0fc2, 3, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, +{"cmpunordss",2, 0xf30fc2, 3, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, +{"cmpneqps", 2, 0x0fc2, 4, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, +{"cmpneqss", 2, 0xf30fc2, 4, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, +{"cmpnltps", 2, 0x0fc2, 5, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, +{"cmpnltss", 2, 0xf30fc2, 5, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, +{"cmpnleps", 2, 0x0fc2, 6, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, +{"cmpnless", 2, 0xf30fc2, 6, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, +{"cmpordps", 2, 0x0fc2, 7, FP|Modrm|ImmExt, { RegXMM|LLongMem, RegXMM, 0 } }, +{"cmpordss", 2, 0xf30fc2, 7, FP|Modrm|ImmExt, { RegXMM|WordMem, RegXMM, 0 } }, +{"comiss", 2, 0x0f2f, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, +{"cvtpi2ps", 2, 0x0f2a, X, FP|Modrm, { RegMMX|LLongMem, RegXMM, 0 } }, +{"cvtsi2ss", 2, 0xf30f2a, X, FP|Modrm, { Reg32|WordMem, RegXMM, 0 } }, +{"cvtps2pi", 2, 0x0f2d, X, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } }, +{"cvtss2si", 2, 0xf30f2d, X, FP|Modrm, { RegXMM|WordMem, Reg32, 0 } }, +{"cvttps2pi", 2, 0x0f2c, X, FP|Modrm, { RegXMM|LLongMem, RegMMX, 0 } }, +{"cvttss2si", 2, 0xf30f2c, X, FP|Modrm, { RegXMM|WordMem, Reg32, 0 } }, +{"divps", 2, 0x0f5e, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"divss", 2, 0xf30f5e, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, +{"ldmxcsr", 1, 0x0fae, 2, FP|Modrm, { WordMem, 0, 0 } }, +{"stmxcsr", 1, 0x0fae, 3, FP|Modrm, { WordMem, 0, 0 } }, +{"sfence", 0, 0x0faef8, X, FP, { 0, 0, 0 } }, +{"maxps", 2, 0x0f5f, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"maxss", 2, 0xf30f5f, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, +{"minps", 2, 0x0f5d, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"minss", 2, 0xf30f5d, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, +{"movaps", 2, 0x0f28, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"movaps", 2, 0x0f29, X, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } }, +{"movhlps", 2, 0x0f12, X, FP|Modrm, { RegXMM|InvMem, RegXMM, 0 } }, +{"movhps", 2, 0x0f16, X, FP|Modrm, { LLongMem, RegXMM, 0 } }, +{"movhps", 2, 0x0f17, X, FP|Modrm, { RegXMM, LLongMem, 0 } }, +{"movlhps", 2, 0x0f16, X, FP|Modrm, { RegXMM|InvMem, RegXMM, 0 } }, +{"movlps", 2, 0x0f12, X, FP|Modrm, { LLongMem, RegXMM, 0 } }, +{"movlps", 2, 0x0f13, X, FP|Modrm, { RegXMM, LLongMem, 0 } }, +{"movmskps", 2, 0x0f50, X, FP|Modrm, { RegXMM|InvMem, Reg32, 0 } }, +{"movups", 2, 0x0f10, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"movups", 2, 0x0f11, X, FP|Modrm, { RegXMM, RegXMM|LLongMem, 0 } }, +{"movss", 2, 0xf30f10, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, +{"movss", 2, 0xf30f11, X, FP|Modrm, { RegXMM, RegXMM|WordMem, 0 } }, +{"mulps", 2, 0x0f59, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"mulss", 2, 0xf30f59, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, +{"orps", 2, 0x0f56, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"rcpps", 2, 0x0f53, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"rcpss", 2, 0xf30f53, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, +{"rsqrtps", 2, 0x0f52, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"rsqrtss", 2, 0xf30f52, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, +{"shufps", 3, 0x0fc6, X, FP|Modrm, { Imm8, RegXMM|LLongMem, RegXMM } }, +{"sqrtps", 2, 0x0f51, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"sqrtss", 2, 0xf30f51, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, +{"subps", 2, 0x0f5c, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"subss", 2, 0xf30f5c, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, +{"ucomiss", 2, 0x0f2e, X, FP|Modrm, { RegXMM|WordMem, RegXMM, 0 } }, +{"unpckhps", 2, 0x0f15, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"unpcklps", 2, 0x0f14, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"xorps", 2, 0x0f57, X, FP|Modrm, { RegXMM|LLongMem, RegXMM, 0 } }, +{"pavgb", 2, 0x0fe0, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, +{"pavgw", 2, 0x0fe3, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, +{"pextrw", 3, 0x0fc5, X, FP|Modrm, { Imm8, RegMMX, Reg32|InvMem } }, +{"pinsrw", 3, 0x0fc4, X, FP|Modrm, { Imm8, Reg32|ShortMem, RegMMX } }, +{"pmaxsw", 2, 0x0fee, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, +{"pmaxub", 2, 0x0fde, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, +{"pminsw", 2, 0x0fea, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, +{"pminub", 2, 0x0fda, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, +{"pmovmskb", 2, 0x0fd7, X, FP|Modrm, { RegMMX, Reg32|InvMem, 0 } }, +{"pmulhuw", 2, 0x0fe4, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, +{"psadbw", 2, 0x0ff6, X, FP|Modrm, { RegMMX|LLongMem, RegMMX, 0 } }, +{"pshufw", 3, 0x0f70, X, FP|Modrm, { Imm8, RegMMX|LLongMem, RegMMX } }, +{"maskmovq", 2, 0x0ff7, X, FP|Modrm, { RegMMX|InvMem, RegMMX, 0 } }, +{"movntps", 2, 0x0f2b, X, FP|Modrm, { RegXMM, LLongMem, 0 } }, +{"movntq", 2, 0x0fe7, X, FP|Modrm, { RegMMX, LLongMem, 0 } }, +{"prefetchnta", 1, 0x0f18, 0, FP|Modrm, { LLongMem, 0, 0 } }, +{"prefetcht0", 1, 0x0f18, 1, FP|Modrm, { LLongMem, 0, 0 } }, +{"prefetcht1", 1, 0x0f18, 2, FP|Modrm, { LLongMem, 0, 0 } }, +{"prefetcht2", 1, 0x0f18, 3, FP|Modrm, { LLongMem, 0, 0 } }, + /* AMD 3DNow! instructions */ -#define AMD_3DNOW_OPCODE 0x0f0f - -{"prefetch", 1, 0x0f0d, 0, NoSuf|Modrm, { ByteMem, 0, 0 } }, -{"prefetchw",1, 0x0f0d, 1, NoSuf|Modrm, { ByteMem, 0, 0 } }, -{"femms", 0, 0x0f0e, X, NoSuf, { 0, 0, 0 } }, -{"pavgusb", 2, 0x0f0f, 0xbf, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pf2id", 2, 0x0f0f, 0x1d, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfacc", 2, 0x0f0f, 0xae, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfadd", 2, 0x0f0f, 0x9e, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfcmpeq", 2, 0x0f0f, 0xb0, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfcmpge", 2, 0x0f0f, 0x90, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfcmpgt", 2, 0x0f0f, 0xa0, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfmax", 2, 0x0f0f, 0xa4, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfmin", 2, 0x0f0f, 0x94, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfmul", 2, 0x0f0f, 0xb4, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfrcp", 2, 0x0f0f, 0x96, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfrcpit1", 2, 0x0f0f, 0xa6, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfrcpit2", 2, 0x0f0f, 0xb6, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfrsqit1", 2, 0x0f0f, 0xa7, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfrsqrt", 2, 0x0f0f, 0x97, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfsub", 2, 0x0f0f, 0x9a, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pfsubr", 2, 0x0f0f, 0xaa, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pi2fd", 2, 0x0f0f, 0x0d, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, -{"pmulhrw", 2, 0x0f0f, 0xb7, NoSuf|Modrm, { RegMMX|LongMem, RegMMX, 0 } }, + +{"prefetch", 1, 0x0f0d, 0, FP|Modrm, { ByteMem, 0, 0 } }, +{"prefetchw",1, 0x0f0d, 1, FP|Modrm, { ByteMem, 0, 0 } }, +{"femms", 0, 0x0f0e, X, FP, { 0, 0, 0 } }, +{"pavgusb", 2, 0x0f0f, 0xbf, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pf2id", 2, 0x0f0f, 0x1d, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfacc", 2, 0x0f0f, 0xae, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfadd", 2, 0x0f0f, 0x9e, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfcmpeq", 2, 0x0f0f, 0xb0, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfcmpge", 2, 0x0f0f, 0x90, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfcmpgt", 2, 0x0f0f, 0xa0, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfmax", 2, 0x0f0f, 0xa4, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfmin", 2, 0x0f0f, 0x94, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfmul", 2, 0x0f0f, 0xb4, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfrcp", 2, 0x0f0f, 0x96, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfrcpit1", 2, 0x0f0f, 0xa6, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfrcpit2", 2, 0x0f0f, 0xb6, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfrsqit1", 2, 0x0f0f, 0xa7, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfrsqrt", 2, 0x0f0f, 0x97, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfsub", 2, 0x0f0f, 0x9a, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pfsubr", 2, 0x0f0f, 0xaa, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pi2fd", 2, 0x0f0f, 0x0d, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, +{"pmulhrw", 2, 0x0f0f, 0xb7, FP|Modrm|ImmExt, { RegMMX|LongMem, RegMMX, 0 } }, {NULL, 0, 0, 0, 0, { 0, 0, 0} } /* sentinel */ }; #undef X -#undef ReverseModrm #undef NoSuf #undef b_Suf #undef w_Suf @@ -1047,7 +1133,15 @@ static const reg_entry i386_regtab[] = { {"mm4", RegMMX, 4}, {"mm5", RegMMX, 5}, {"mm6", RegMMX, 6}, - {"mm7", RegMMX, 7} + {"mm7", RegMMX, 7}, + {"xmm0", RegXMM, 0}, + {"xmm1", RegXMM, 1}, + {"xmm2", RegXMM, 2}, + {"xmm3", RegXMM, 3}, + {"xmm4", RegXMM, 4}, + {"xmm5", RegXMM, 5}, + {"xmm6", RegXMM, 6}, + {"xmm7", RegXMM, 7} }; #define MAX_REG_NAME_SIZE 8 /* for parsing register names from input */ diff --git a/include/opcode/m68k.h b/include/opcode/m68k.h index ecb3f95dd..3208b77f4 100644 --- a/include/opcode/m68k.h +++ b/include/opcode/m68k.h @@ -1,5 +1,5 @@ /* Opcode table header for m680[01234]0/m6888[12]/m68851. - Copyright 1989, 91, 92, 93, 94, 95, 96, 1997 Free Software Foundation. + Copyright 1989, 91, 92, 93, 94, 95, 96, 97, 1999 Free Software Foundation. This file is part of GDB, GAS, and the GNU binutils. @@ -36,6 +36,8 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA #define m68851 0x080 #define cpu32 0x100 /* e.g., 68332 */ #define mcf5200 0x200 +#define mcf5206e 0x400 +#define mcf5307 0x800 /* handy aliases */ #define m68040up (m68040 | m68060) @@ -43,6 +45,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA #define m68020up (m68020 | m68030up) #define m68010up (m68010 | cpu32 | m68020up) #define m68000up (m68000 | m68010up) +#define mcf (mcf5200 | mcf5206e | mcf5307) #define mfloat (m68881 | m68882 | m68040 | m68060) #define mmmu (m68851 | m68030 | m68040 | m68060) @@ -87,7 +90,7 @@ struct m68k_opcode_alias operand; the second, the place it is stored. */ /* Kinds of operands: - Characters used: AaBCcDdFfIJkLlMmnOopQqRrSsTtUVvWXYZ0123|*~%;@!&$?/<>#^+- + Characters used: AaBCcDdEFfGHIJkLlMmnOopQqRrSsTtU VvWXYZ0123|*~%;@!&$?/<>#^+- D data register only. Stored as 3 bits. A address register only. Stored as 3 bits. @@ -121,6 +124,9 @@ struct m68k_opcode_alias C the CCR. No need to store it; this is just for filtering validity. S the SR. No need to store, just as with CCR. U the USP. No need to store, just as with CCR. + E the ACC. No need to store, just as with CCR. + G the MACSR. No need to store, just as with CCR. + H the MASK. No need to store, just as with CCR. I Coprocessor ID. Not printed if 1. The Coprocessor ID is always extracted from the 'd' field of word one, which means that an extended @@ -170,6 +176,9 @@ struct m68k_opcode_alias for both caches. Used in cinv and cpush. Always stored in position "d". + u Any register, with ``upper'' or ``lower'' specification. Used + in the mac instructions with size word. + The remainder are all stored as 6 bits using an address mode and a register number; they differ in which addressing modes they match. @@ -260,6 +269,8 @@ struct m68k_opcode_alias */ /* Places to put an operand, for non-general operands: + Characters used: BbCcDdghijkLlMmNnostWw123456789 + s source, low bits of first word. d dest, shifted 9 in first word 1 second word, shifted 12 @@ -293,6 +304,24 @@ struct m68k_opcode_alias C floating point coprocessor constant - 7 bits. Also used for static K-factors... j Movec register #, stored in 12 low bits of second word. + m For M[S]ACx; 4 bits split with MSB shifted 6 bits in first word + and remaining 3 bits of register shifted 9 bits in first word. + Indicate upper/lower in 1 bit shifted 7 bits in second word. + Use with `R' or `u' format. + n `m' withouth upper/lower indication. (For M[S]ACx; 4 bits split + with MSB shifted 6 bits in first word and remaining 3 bits of + register shifted 9 bits in first word. No upper/lower + indication is done.) Use with `R' or `u' format. + o For M[S]ACw; 4 bits shifted 12 in second word (like `1'). + Indicate upper/lower in 1 bit shifted 7 bits in second word. + Use with `R' or `u' format. + M For M[S]ACw; 4 bits in low bits of first word. Indicate + upper/lower in 1 bit shifted 6 bits in second word. Use with + `R' or `u' format. + N For M[S]ACw; 4 bits in low bits of second word. Indicate + upper/lower in 1 bit shifted 6 bits in second word. Use with + `R' or `u' format. + h shift indicator (scale factor), 1 bit shifted 10 in second word Places to put operand, for general operands: d destination, shifted 6 bits in first word diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h index a9e3b24ab..974f0dfa5 100644 --- a/include/opcode/ppc.h +++ b/include/opcode/ppc.h @@ -85,6 +85,9 @@ extern const int powerpc_num_opcodes; for the assembler's -many option, and it eliminates duplicates). */ #define PPC_OPCODE_ANY (0200) +/* Opcode is supported as part of the 64-bit bridge. */ +#define PPC_OPCODE_64_BRIDGE (0400) + /* A macro to extract the major opcode from an instruction. */ #define PPC_OP(i) (((i) >> 26) & 0x3f) |