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authorStan Shebs <shebs@codesourcery.com>2008-07-07 22:40:13 +0400
committerStan Shebs <shebs@codesourcery.com>2008-07-07 22:40:13 +0400
commitdd5e3247eb33ecaf34a1f3af750f989020cd1c7d (patch)
treebddbc02c87f3b59bc50469f5c7dc22cdff6948de
parentd68240794e70b956e48501ff4aa503cbd198fe43 (diff)
2008-07-07 Stan Shebs <stan@codesourcery.com>
* dis-asm.h (struct disassemble_info): Add endian_code field.
-rw-r--r--include/ChangeLog4
-rw-r--r--include/dis-asm.h2
2 files changed, 6 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index ded2069b8..6a433eafb 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2008-07-07 Stan Shebs <stan@codesourcery.com>
+
+ * dis-asm.h (struct disassemble_info): Add endian_code field.
+
2008-07-07 Joel Brobecker <brobecker@adacore.com>
* safe-ctype.h: Add #include of ctype.h before redefining
diff --git a/include/dis-asm.h b/include/dis-asm.h
index 999d6eaf2..db74d85ac 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -76,6 +76,8 @@ typedef struct disassemble_info
unsigned long mach;
/* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */
enum bfd_endian endian;
+ /* Endianness of code, for mixed-endian situations such as ARM BE8. */
+ enum bfd_endian endian_code;
/* An arch/mach-specific bitmask of selected instruction subsets, mainly
for processors with run-time-switchable instruction sets. The default,
zero, means that there is no constraint. CGEN-based opcodes ports