diff options
author | Nick Clifton <nickc@redhat.com> | 1999-07-17 19:40:17 +0400 |
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committer | Nick Clifton <nickc@redhat.com> | 1999-07-17 19:40:17 +0400 |
commit | 34301951e0084721afc396b09a2fc68f5cf26576 (patch) | |
tree | a8a8441058d4fa7fa6bbaa3303fb3883465cbcc1 | |
parent | ae2271b23a676ddf1fc5d81ed0458df9835688d4 (diff) |
Rename F_SOFTFLOAt to F_SOFT_FLOAT for compatability with include/elf/arm.h
-rw-r--r-- | include/coff/ChangeLog | 4 | ||||
-rw-r--r-- | include/coff/arm.h | 7 |
2 files changed, 6 insertions, 5 deletions
diff --git a/include/coff/ChangeLog b/include/coff/ChangeLog index c8e67f16f..659dcdc52 100644 --- a/include/coff/ChangeLog +++ b/include/coff/ChangeLog @@ -1,3 +1,7 @@ +1999-07-17 Nick Clifton <nickc@cygnus.com> + + * arm.h (F_SOFT_FLOAT): Rename from F_SOFTFLOAT. + 1999-06-21 Philip Blundell <pb@nexus.co.uk> * arm.h (F_SOFTFLOAT): Define. diff --git a/include/coff/arm.h b/include/coff/arm.h index b7a00139e..d5163f822 100644 --- a/include/coff/arm.h +++ b/include/coff/arm.h @@ -44,7 +44,7 @@ struct external_filehdr * F_AR32WR file has byte ordering of an AR32WR machine (e.g. vax) * F_APCS_26 file uses 26 bit ARM Procedure Calling Standard * F_APCS_SET the F_APCS_26, F_APCS_FLOAT and F_PIC bits have been initialised - * F_SOFTFLOAT code does not use floating point instructions + * F_SOFT_FLOAT code does not use floating point instructions */ #define F_RELFLG (0x0001) @@ -59,7 +59,7 @@ struct external_filehdr #define F_AR32WR (0x0100) #define F_APCS_26 (0x0400) #define F_APCS_SET (0x0800) -#define F_SOFTFLOAT (0x2000) +#define F_SOFT_FLOAT (0x2000) /* Bits stored in flags field of the internal_f structure */ @@ -262,8 +262,6 @@ union external_auxent char x_tvlen[2]; /* length of .tv */ char x_tvran[2][2]; /* tv range */ } x_tv; /* info about .tv section (in auxent of symbol .tv)) */ - - }; #define SYMENT struct external_syment @@ -282,6 +280,5 @@ struct external_reloc char r_offset[4]; }; - #define RELOC struct external_reloc #define RELSZ 14 |