diff options
author | Alexey Lapshin <alexey.lapshin@espressif.com> | 2023-09-19 05:46:19 +0300 |
---|---|---|
committer | Jeff Johnston <jjohnstn@redhat.com> | 2023-09-19 05:49:15 +0300 |
commit | 55485616ba2afedca05da40f5cde59ee336b9f28 (patch) | |
tree | d19df741d6b6db5120e101f43121c38f9a8539a5 | |
parent | 6e5676a915e70edfef1cda870ee00263ce7b3a57 (diff) |
Bring back libsim.a for riscv
-rw-r--r-- | libgloss/Makefile.in | 601 | ||||
-rw-r--r-- | libgloss/riscv/Makefile.inc | 4 |
2 files changed, 599 insertions, 6 deletions
diff --git a/libgloss/Makefile.in b/libgloss/Makefile.in index 611b42161..6c5a12256 100644 --- a/libgloss/Makefile.in +++ b/libgloss/Makefile.in @@ -186,7 +186,7 @@ check_PROGRAMS = $(am__EXEEXT_2) $(am__EXEEXT_3) @CONFIG_RISCV_TRUE@ riscv/semihost.specs \ @CONFIG_RISCV_TRUE@ riscv/crt0.o -@CONFIG_RISCV_TRUE@am__append_35 = riscv/libgloss.a \ +@CONFIG_RISCV_TRUE@am__append_35 = riscv/libgloss.a riscv/libsim.a \ @CONFIG_RISCV_TRUE@ riscv/libsemihost.a @CONFIG_WINCE_TRUE@am__append_36 = $(gdbdir) @CONFIG_WINCE_TRUE@am__append_37 = wince/stub.exe @@ -542,15 +542,52 @@ riscv_libsemihost_a_LIBADD = @CONFIG_RISCV_TRUE@ riscv/riscv_libsemihost_a-semihost-sys_unlink.$(OBJEXT) \ @CONFIG_RISCV_TRUE@ riscv/riscv_libsemihost_a-semihost-sys_write.$(OBJEXT) riscv_libsemihost_a_OBJECTS = $(am_riscv_libsemihost_a_OBJECTS) +riscv_libsim_a_AR = $(AR) $(ARFLAGS) +riscv_libsim_a_LIBADD = +@CONFIG_RISCV_TRUE@am__objects_7 = \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_access.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_chdir.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_chmod.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_chown.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_close.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_conv_stat.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_execve.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_exit.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_faccessat.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_fork.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_fstat.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_fstatat.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_ftime.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_getcwd.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_getpid.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_gettimeofday.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_isatty.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_kill.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_link.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_lseek.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_lstat.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_open.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_openat.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_read.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_sbrk.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_stat.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_sysconf.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_times.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_unlink.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_utime.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_wait.$(OBJEXT) \ +@CONFIG_RISCV_TRUE@ riscv/riscv_libsim_a-sys_write.$(OBJEXT) +@CONFIG_RISCV_TRUE@am_riscv_libsim_a_OBJECTS = $(am__objects_7) +riscv_libsim_a_OBJECTS = $(am_riscv_libsim_a_OBJECTS) xtensa_libgloss_a_AR = $(AR) $(ARFLAGS) xtensa_libgloss_a_LIBADD = -@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP32_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@am__objects_7 = xtensa/boards/esp32/xtensa_libgloss_a-board.$(OBJEXT) -@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP32S3_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@am__objects_8 = xtensa/boards/esp32s3/xtensa_libgloss_a-board.$(OBJEXT) +@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP32_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@am__objects_8 = xtensa/boards/esp32/xtensa_libgloss_a-board.$(OBJEXT) +@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP32S3_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@am__objects_9 = xtensa/boards/esp32s3/xtensa_libgloss_a-board.$(OBJEXT) @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@am_xtensa_libgloss_a_OBJECTS = xtensa/xtensa_libgloss_a-sleep.$(OBJEXT) \ @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ xtensa/xtensa_libgloss_a-syscalls.$(OBJEXT) \ @CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ xtensa/xtensa_libgloss_a-window-vectors.$(OBJEXT) \ -@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__objects_7) \ -@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__objects_8) +@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__objects_8) \ +@CONFIG_XTENSA_TRUE@@HAVE_XTENSA_BOARD_ESP_TRUE@ $(am__objects_9) xtensa_libgloss_a_OBJECTS = $(am_xtensa_libgloss_a_OBJECTS) xtensa_libsys_openocd_a_AR = $(AR) $(ARFLAGS) xtensa_libsys_openocd_a_LIBADD = @@ -623,7 +660,8 @@ SOURCES = $(aarch64_librdimon_a_SOURCES) $(arc_libnsim_a_SOURCES) \ $(iq2000_libeval_a_SOURCES) $(libnosys_libnosys_a_SOURCES) \ $(libobjs_a_SOURCES) $(lm32_libgloss_a_SOURCES) \ $(nios2_libnios2_a_SOURCES) $(riscv_libgloss_a_SOURCES) \ - $(riscv_libsemihost_a_SOURCES) $(xtensa_libgloss_a_SOURCES) \ + $(riscv_libsemihost_a_SOURCES) $(riscv_libsim_a_SOURCES) \ + $(xtensa_libgloss_a_SOURCES) \ $(xtensa_libsys_openocd_a_SOURCES) \ $(xtensa_libsys_qemu_a_SOURCES) bfin/sim-test.c iq2000/test.c \ $(wince_stub_exe_SOURCES) @@ -1113,6 +1151,8 @@ TEXINFO_TEX = ../texinfo/texinfo.tex @CONFIG_RISCV_TRUE@ riscv/sys_wait.c \ @CONFIG_RISCV_TRUE@ riscv/sys_write.c +@CONFIG_RISCV_TRUE@riscv_libsim_a_CPPFLAGS = $(riscv_libgloss_a_CPPFLAGS) -DUSING_SIM_SPECS +@CONFIG_RISCV_TRUE@riscv_libsim_a_SOURCES = $(riscv_libgloss_a_SOURCES) @CONFIG_RISCV_TRUE@riscv_libsemihost_a_CPPFLAGS = -I$(srcdir)/riscv @CONFIG_RISCV_TRUE@riscv_libsemihost_a_SOURCES = \ @CONFIG_RISCV_TRUE@ riscv/nanosleep.c \ @@ -1856,6 +1896,75 @@ riscv/libsemihost.a: $(riscv_libsemihost_a_OBJECTS) $(riscv_libsemihost_a_DEPEND $(AM_V_at)-rm -f riscv/libsemihost.a $(AM_V_AR)$(riscv_libsemihost_a_AR) riscv/libsemihost.a $(riscv_libsemihost_a_OBJECTS) $(riscv_libsemihost_a_LIBADD) $(AM_V_at)$(RANLIB) riscv/libsemihost.a +riscv/riscv_libsim_a-sys_access.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_chdir.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_chmod.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_chown.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_close.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_conv_stat.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_execve.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_exit.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_faccessat.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_fork.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_fstat.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_fstatat.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_ftime.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_getcwd.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_getpid.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_gettimeofday.$(OBJEXT): \ + riscv/$(am__dirstamp) riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_isatty.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_kill.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_link.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_lseek.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_lstat.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_open.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_openat.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_read.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_sbrk.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_stat.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_sysconf.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_times.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_unlink.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_utime.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_wait.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) +riscv/riscv_libsim_a-sys_write.$(OBJEXT): riscv/$(am__dirstamp) \ + riscv/$(DEPDIR)/$(am__dirstamp) + +riscv/libsim.a: $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_DEPENDENCIES) $(EXTRA_riscv_libsim_a_DEPENDENCIES) riscv/$(am__dirstamp) + $(AM_V_at)-rm -f riscv/libsim.a + $(AM_V_AR)$(riscv_libsim_a_AR) riscv/libsim.a $(riscv_libsim_a_OBJECTS) $(riscv_libsim_a_LIBADD) + $(AM_V_at)$(RANLIB) riscv/libsim.a xtensa/$(am__dirstamp): @$(MKDIR_P) xtensa @: > xtensa/$(am__dirstamp) @@ -2190,6 +2299,38 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsemihost_a-sys_kill.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsemihost_a-sys_utime.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsemihost_a-sys_wait.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_access.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_chdir.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_chmod.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_chown.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_close.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_conv_stat.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_execve.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_exit.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_faccessat.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_fork.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_fstat.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_fstatat.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_ftime.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_getcwd.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_getpid.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_gettimeofday.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_isatty.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_kill.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_link.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_lseek.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_lstat.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_open.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_openat.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_read.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_sbrk.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_stat.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_sysconf.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_times.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_unlink.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_utime.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_wait.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@riscv/$(DEPDIR)/riscv_libsim_a-sys_write.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@xtensa/$(DEPDIR)/xtensa_libgloss_a-sleep.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@xtensa/$(DEPDIR)/xtensa_libgloss_a-syscalls.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@xtensa/$(DEPDIR)/xtensa_libgloss_a-window-vectors.Po@am__quote@ @@ -3982,6 +4123,454 @@ riscv/riscv_libsemihost_a-semihost-sys_write.obj: riscv/semihost-sys_write.c @AMDEP_TRUE@@am__fastdepCC_FALSE@ DEPDIR=$(DEPDIR) $(CCDEPMODE) $(depcomp) @AMDEPBACKSLASH@ @am__fastdepCC_FALSE@ $(AM_V_CC@am__nodep@)$(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(riscv_libsemihost_a_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -c -o riscv/riscv_libsemihost_a-semihost-sys_write.obj `if test -f 'riscv/semihost-sys_write.c'; then $(CYGPATH_W) 'riscv/semihost-sys_write.c'; else $(CYGPATH_W) '$(srcdir)/riscv/semihost-sys_write.c'; fi` +riscv/riscv_libsim_a-sys_access.o: riscv/sys_access.c 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xtensa/$(DEPDIR)/xtensa_libgloss_a-syscalls.Tpo xtensa/$(DEPDIR)/xtensa_libgloss_a-syscalls.Po diff --git a/libgloss/riscv/Makefile.inc b/libgloss/riscv/Makefile.inc index fafc74374..452b7da4d 100644 --- a/libgloss/riscv/Makefile.inc +++ b/libgloss/riscv/Makefile.inc @@ -40,6 +40,10 @@ multilibtool_LIBRARIES += %D%/libgloss.a %D%/sys_wait.c \ %D%/sys_write.c +multilibtool_LIBRARIES += %D%/libsim.a +%C%_libsim_a_CPPFLAGS = $(%C%_libgloss_a_CPPFLAGS) -DUSING_SIM_SPECS +%C%_libsim_a_SOURCES = $(%C%_libgloss_a_SOURCES) + multilibtool_LIBRARIES += %D%/libsemihost.a %C%_libsemihost_a_CPPFLAGS = -I$(srcdir)/%D% %C%_libsemihost_a_SOURCES = \ |