diff options
| author | Frank Ch. Eigler <fche@redhat.com> | 2002-02-05 22:40:42 +0300 |
|---|---|---|
| committer | Frank Ch. Eigler <fche@redhat.com> | 2002-02-05 22:40:42 +0300 |
| commit | 7a149da931e2f0469c518d9a91a3164f91214fb6 (patch) | |
| tree | c5ff90ab371a0aeb74fd1f639393a3ca4501a4cb /include/dis-asm.h | |
| parent | fb3b3429a45b3cde64f9079270d698042a1fe208 (diff) | |
* opcodes disassembler extension
[includes]
2002-02-04 Frank Ch. Eigler <fche@redhat.com>
* dis-asm.h (disassemble_info): New field `insn_sets'.
(INIT_DISASSEMBLE_INFO): Clear it.
[opcodes]
2002-02-04 Frank Ch. Eigler <fche@redhat.com>
* cgen-dis.in (print_insn_@arch@): Support disassemble_info.insn_sets.
Diffstat (limited to 'include/dis-asm.h')
| -rw-r--r-- | include/dis-asm.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/include/dis-asm.h b/include/dis-asm.h index 8cd848dbd..5b9e390d3 100644 --- a/include/dis-asm.h +++ b/include/dis-asm.h @@ -73,6 +73,11 @@ typedef struct disassemble_info { unsigned long mach; /* Endianness (for bi-endian cpus). Mono-endian cpus can ignore this. */ enum bfd_endian endian; + /* An arch/mach-specific bitmask of selected instruction subsets, mainly + for processors with run-time-switchable instruction sets. The default, + zero, means that there is no constraint. CGEN-based opcodes ports + may use ISA_foo masks. */ + unsigned long insn_sets; /* Some targets need information about the current section to accurately display insns. If this is NULL, the target disassembler function @@ -275,6 +280,7 @@ extern int generic_symbol_at_address (INFO).flavour = bfd_target_unknown_flavour, \ (INFO).arch = bfd_arch_unknown, \ (INFO).mach = 0, \ + (INFO).insn_sets = 0, \ (INFO).endian = BFD_ENDIAN_UNKNOWN, \ (INFO).octets_per_byte = 1, \ INIT_DISASSEMBLE_INFO_NO_ARCH(INFO, STREAM, FPRINTF_FUNC) |