This commit was manufactured by cvs2svn to create branch 'binutils-binutils-2_13-branchpoint

2_13-branch'.

Sprout from kseitz_interps-20020528-branch 2002-06-18 21:15:59 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2002-07-11 20:14:41 UTC DJ Delorie <dj@redhat.com> '* configure.in: Remove two redundant tests.':
    COPYING.LIBGLOSS
    ChangeLog
    Makefile.in
    config-ml.in
    config.sub
    config/ChangeLog
    configure
    configure.in
    etc/ChangeLog
    etc/texi2pod.pl
    include/ChangeLog
    include/bfdlink.h
    include/demangle.h
    include/dis-asm.h
    include/elf/ChangeLog
    include/elf/alpha.h
    include/elf/common.h
    include/elf/dwarf2.h
    include/elf/sh.h
    include/elf/vax.h
    include/fibheap.h
    include/gdb/ChangeLog
    include/gdb/sim-d10v.h
    include/getopt.h
    include/hashtab.h
    include/libiberty.h
    include/opcode/ChangeLog
    include/opcode/a29k.h
    include/opcode/convex.h
    include/opcode/dlx.h
    include/opcode/i386.h
    include/opcode/mips.h
    include/opcode/or32.h
    include/partition.h
    include/sort.h
    include/splay-tree.h
    ltcf-cxx.sh
Delete:
    include/callback.h
    include/remote-sim.h

1 files changed, 56 insertions, 20 deletions

diff --git a/include/gdb/sim-d10v.h b/include/gdb/sim-d10v.h
index 9d29e0584..f153a4194 100644
--- a/include/gdb/sim-d10v.h
+++ b/include/gdb/sim-d10v.h
@@ -1,5 +1,6 @@
 /* This file defines the interface between the d10v simulator and gdb.
-   Copyright 1999 Free Software Foundation, Inc.
+
+   Copyright 1999, 2002 Free Software Foundation, Inc.
 
 This file is part of GDB.
 
@@ -75,26 +76,61 @@ extern unsigned long sim_d10v_translate_addr
 
 /* The simulator makes use of the following register information. */
 
+enum sim_d10v_regs
+{
+  SIM_D10V_R0_REGNUM,
+  SIM_D10V_R1_REGNUM,
+  SIM_D10V_R2_REGNUM,
+  SIM_D10V_R3_REGNUM,
+  SIM_D10V_R4_REGNUM,
+  SIM_D10V_R5_REGNUM,
+  SIM_D10V_R6_REGNUM,
+  SIM_D10V_R7_REGNUM,
+  SIM_D10V_R8_REGNUM,
+  SIM_D10V_R9_REGNUM,
+  SIM_D10V_R10_REGNUM,
+  SIM_D10V_R11_REGNUM,
+  SIM_D10V_R12_REGNUM,
+  SIM_D10V_R13_REGNUM,
+  SIM_D10V_R14_REGNUM,
+  SIM_D10V_R15_REGNUM,
+  SIM_D10V_CR0_REGNUM,
+  SIM_D10V_CR1_REGNUM,
+  SIM_D10V_CR2_REGNUM,
+  SIM_D10V_CR3_REGNUM,
+  SIM_D10V_CR4_REGNUM,
+  SIM_D10V_CR5_REGNUM,
+  SIM_D10V_CR6_REGNUM,
+  SIM_D10V_CR7_REGNUM,
+  SIM_D10V_CR8_REGNUM,
+  SIM_D10V_CR9_REGNUM,
+  SIM_D10V_CR10_REGNUM,
+  SIM_D10V_CR11_REGNUM,
+  SIM_D10V_CR12_REGNUM,
+  SIM_D10V_CR13_REGNUM,
+  SIM_D10V_CR14_REGNUM,
+  SIM_D10V_CR15_REGNUM,
+  SIM_D10V_A0_REGNUM,
+  SIM_D10V_A1_REGNUM,
+  SIM_D10V_SPI_REGNUM,
+  SIM_D10V_SPU_REGNUM,
+  SIM_D10V_IMAP0_REGNUM,
+  SIM_D10V_IMAP1_REGNUM,
+  SIM_D10V_DMAP0_REGNUM,
+  SIM_D10V_DMAP1_REGNUM,
+  SIM_D10V_DMAP2_REGNUM,
+  SIM_D10V_DMAP3_REGNUM,
+  SIM_D10V_TS2_DMAP_REGNUM
+};
+  
 enum
-  {
-    SIM_D10V_R0_REGNUM = 0,
-    SIM_D10V_CR0_REGNUM = 16,
-    SIM_D10V_A0_REGNUM = 32,
-    SIM_D10V_SPI_REGNUM = 34,
-    SIM_D10V_SPU_REGNUM = 35,
-    SIM_D10V_IMAP0_REGNUM = 36,
-    SIM_D10V_DMAP0_REGNUM = 38,
-    SIM_D10V_TS2_DMAP_REGNUM = 40
-  };
-
-enum
-  {
-    SIM_D10V_NR_R_REGS = 16,
-    SIM_D10V_NR_A_REGS = 2,
-    SIM_D10V_NR_IMAP_REGS = 2,
-    SIM_D10V_NR_DMAP_REGS = 4,
-    SIM_D10V_NR_CR_REGS = 16
-  };
+{
+  SIM_D10V_NR_R_REGS = 16,
+  SIM_D10V_NR_A_REGS = 2,
+  SIM_D10V_NR_IMAP_REGS = 2,
+  SIM_D10V_NR_DMAP_REGS = 4,
+  SIM_D10V_NR_CR_REGS = 16
+};
 
 #ifdef __cplusplus
 }