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| author | cvs2svn <> | 2000-02-22 19:18:14 +0300 |
|---|---|---|
| committer | cvs2svn <> | 2000-02-22 19:18:14 +0300 |
| commit | 12fa8278c17986cf8c1457dffbc3a17ec04be65e (patch) | |
| tree | 50af885431648a3d53e99b1b2749c10710c7b668 /include/opcode/arc.h | |
| parent | 929ce68fe67a171b2e3ff506450ca893ed6532b3 (diff) | |
This commit was manufactured by cvs2svn to create tag 'egcs_20000222'.egcs_20000222
Sprout from cygnus 2000-02-22 16:18:13 UTC Ian Lance Taylor <iant@google.com> 'import libiberty from egcs'
Delete:
COPYING
COPYING.LIB
ChangeLog
Makefile.in
README
config-ml.in
config.guess
config.if
config.sub
config/ChangeLog
config/acinclude.m4
config/mh-a68bsd
config/mh-aix386
config/mh-aix43
config/mh-apollo68
config/mh-armpic
config/mh-cxux
config/mh-cygwin
config/mh-decstation
config/mh-delta88
config/mh-dgux
config/mh-dgux386
config/mh-djgpp
config/mh-elfalphapic
config/mh-hp300
config/mh-hpux
config/mh-hpux8
config/mh-interix
config/mh-irix4
config/mh-irix5
config/mh-irix6
config/mh-lynxos
config/mh-lynxrs6k
config/mh-m68kpic
config/mh-mingw32
config/mh-ncr3000
config/mh-ncrsvr43
config/mh-necv4
config/mh-papic
config/mh-ppcpic
config/mh-riscos
config/mh-sco
config/mh-solaris
config/mh-sparcpic
config/mh-sun3
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config/mh-sysv4
config/mh-sysv5
config/mh-vaxult2
config/mh-x86pic
config/mpw-mh-mpw
config/mpw/ChangeLog
config/mpw/MoveIfChange
config/mpw/README
config/mpw/forward-include
config/mpw/g-mpw-make.sed
config/mpw/mpw-touch
config/mpw/mpw-true
config/mpw/null-command
config/mpw/open-brace
config/mpw/tr-7to8-src
config/mpw/true
config/mt-armpic
config/mt-d30v
config/mt-elfalphapic
config/mt-linux
config/mt-m68kpic
config/mt-netware
config/mt-ospace
config/mt-papic
config/mt-ppcpic
config/mt-sparcpic
config/mt-v810
config/mt-x86pic
configure
configure.bat
configure.in
etc/ChangeLog
etc/Makefile.in
etc/add-log.el
etc/add-log.vi
etc/configbuild.ein
etc/configbuild.fig
etc/configbuild.jin
etc/configbuild.tin
etc/configdev.ein
etc/configdev.fig
etc/configdev.jin
etc/configdev.tin
etc/configure
etc/configure.in
etc/configure.texi
etc/make-stds.texi
etc/standards.texi
include/aout/ChangeLog
include/aout/adobe.h
include/aout/aout64.h
include/aout/ar.h
include/aout/dynix3.h
include/aout/encap.h
include/aout/host.h
include/aout/hp.h
include/aout/hp300hpux.h
include/aout/hppa.h
include/aout/ranlib.h
include/aout/reloc.h
include/aout/stab.def
include/aout/stab_gnu.h
include/aout/sun4.h
include/bfdlink.h
include/bout.h
include/callback.h
include/coff/ChangeLog
include/coff/a29k.h
include/coff/alpha.h
include/coff/apollo.h
include/coff/arm.h
include/coff/aux-coff.h
include/coff/ecoff.h
include/coff/go32exe.h
include/coff/h8300.h
include/coff/h8500.h
include/coff/i386.h
include/coff/i860.h
include/coff/i960.h
include/coff/internal.h
include/coff/m68k.h
include/coff/m88k.h
include/coff/mcore.h
include/coff/mips.h
include/coff/pe.h
include/coff/powerpc.h
include/coff/rs6000.h
include/coff/sh.h
include/coff/sparc.h
include/coff/sym.h
include/coff/symconst.h
include/coff/tic30.h
include/coff/tic80.h
include/coff/w65.h
include/coff/we32k.h
include/coff/z8k.h
include/dis-asm.h
include/elf/ChangeLog
include/elf/alpha.h
include/elf/arc.h
include/elf/arm-oabi.h
include/elf/arm.h
include/elf/common.h
include/elf/d10v.h
include/elf/d30v.h
include/elf/dwarf.h
include/elf/dwarf2.h
include/elf/external.h
include/elf/fr30.h
include/elf/hppa.h
include/elf/i386.h
include/elf/internal.h
include/elf/m32r.h
include/elf/m68k.h
include/elf/mcore.h
include/elf/mips.h
include/elf/mn10200.h
include/elf/mn10300.h
include/elf/ppc.h
include/elf/reloc-macros.h
include/elf/sh.h
include/elf/sparc.h
include/elf/v850.h
include/fopen-bin.h
include/fopen-same.h
include/fopen-vms.h
include/gdbm.h
include/hp-symtab.h
include/ieee.h
include/mpw/ChangeLog
include/mpw/README
include/mpw/dir.h
include/mpw/dirent.h
include/mpw/fcntl.h
include/mpw/grp.h
include/mpw/mpw.h
include/mpw/pwd.h
include/mpw/spin.h
include/mpw/stat.h
include/mpw/sys/file.h
include/mpw/sys/param.h
include/mpw/sys/resource.h
include/mpw/sys/stat.h
include/mpw/sys/time.h
include/mpw/sys/types.h
include/mpw/utime.h
include/mpw/varargs.h
include/nlm/ChangeLog
include/nlm/alpha-ext.h
include/nlm/common.h
include/nlm/external.h
include/nlm/i386-ext.h
include/nlm/internal.h
include/nlm/ppc-ext.h
include/nlm/sparc32-ext.h
include/oasys.h
include/opcode/ChangeLog
include/opcode/a29k.h
include/opcode/alpha.h
include/opcode/arc.h
include/opcode/arm.h
include/opcode/cgen.h
include/opcode/convex.h
include/opcode/d10v.h
include/opcode/d30v.h
include/opcode/h8300.h
include/opcode/hppa.h
include/opcode/i386.h
include/opcode/i860.h
include/opcode/i960.h
include/opcode/m68k.h
include/opcode/m88k.h
include/opcode/mips.h
include/opcode/mn10200.h
include/opcode/mn10300.h
include/opcode/np1.h
include/opcode/ns32k.h
include/opcode/pn.h
include/opcode/ppc.h
include/opcode/pyr.h
include/opcode/sparc.h
include/opcode/tahoe.h
include/opcode/tic30.h
include/opcode/tic80.h
include/opcode/v850.h
include/opcode/vax.h
include/os9k.h
include/progress.h
include/regs/ChangeLog
include/remote-sim.h
include/wait.h
install-sh
ltconfig
ltmain.sh
makeall.bat
makefile.vms
missing
mkinstalldirs
move-if-change
mpw-README
mpw-build.in
mpw-config.in
mpw-configure
mpw-install
setup.com
symlink-tree
ylwrap
Diffstat (limited to 'include/opcode/arc.h')
| -rw-r--r-- | include/opcode/arc.h | 274 |
1 files changed, 0 insertions, 274 deletions
diff --git a/include/opcode/arc.h b/include/opcode/arc.h deleted file mode 100644 index a1e0ca152..000000000 --- a/include/opcode/arc.h +++ /dev/null @@ -1,274 +0,0 @@ -/* Opcode table for the ARC. - Copyright 1994, 1995, 1997 Free Software Foundation, Inc. - Contributed by Doug Evans (dje@cygnus.com). - -This file is part of GAS, the GNU Assembler, GDB, the GNU debugger, and -the GNU Binutils. - -GAS/GDB is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -GAS/GDB is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with GAS or GDB; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ - -/* List of the various cpu types. - The tables currently use bit masks to say whether the instruction or - whatever is supported by a particular cpu. This lets us have one entry - apply to several cpus. - - This duplicates bfd_mach_arc_xxx. For now I wish to isolate this from bfd - and bfd from this. Also note that these numbers are bit values as we want - to allow for things available on more than one ARC (but not necessarily all - ARCs). */ - -/* The `base' cpu must be 0 (table entries are omitted for the base cpu). - The cpu type is treated independently of endianness. - The complete `mach' number includes endianness. - These values are internal to opcodes/bfd/binutils/gas. */ -#define ARC_MACH_BASE 0 -#define ARC_MACH_UNUSED1 1 -#define ARC_MACH_UNUSED2 2 -#define ARC_MACH_UNUSED4 4 -/* Additional cpu values can be inserted here and ARC_MACH_BIG moved down. */ -#define ARC_MACH_BIG 8 - -/* Mask of number of bits necessary to record cpu type. */ -#define ARC_MACH_CPU_MASK 7 -/* Mask of number of bits necessary to record cpu type + endianness. */ -#define ARC_MACH_MASK 15 - -/* Type to denote an ARC instruction (at least a 32 bit unsigned int). */ -typedef unsigned int arc_insn; - -struct arc_opcode { - char *syntax; /* syntax of insn */ - unsigned long mask, value; /* recognize insn if (op&mask)==value */ - int flags; /* various flag bits */ - -/* Values for `flags'. */ - -/* Return CPU number, given flag bits. */ -#define ARC_OPCODE_CPU(bits) ((bits) & ARC_MACH_CPU_MASK) -/* Return MACH number, given flag bits. */ -#define ARC_OPCODE_MACH(bits) ((bits) & ARC_MACH_MASK) -/* First opcode flag bit available after machine mask. */ -#define ARC_OPCODE_FLAG_START ((ARC_MACH_MASK + 1) << 0) -/* This insn is a conditional branch. */ -#define ARC_OPCODE_COND_BRANCH (ARC_OPCODE_FLAG_START) - - /* These values are used to optimize assembly and disassembly. Each insn is - on a list of related insns (same first letter for assembly, same insn code - for disassembly). */ - struct arc_opcode *next_asm; /* Next instruction to try during assembly. */ - struct arc_opcode *next_dis; /* Next instruction to try during disassembly. */ - - /* Macros to create the hash values for the lists. */ -#define ARC_HASH_OPCODE(string) \ - ((string)[0] >= 'a' && (string)[0] <= 'z' ? (string)[0] - 'a' : 26) -#define ARC_HASH_ICODE(insn) \ - ((unsigned int) (insn) >> 27) - - /* Macros to access `next_asm', `next_dis' so users needn't care about the - underlying mechanism. */ -#define ARC_OPCODE_NEXT_ASM(op) ((op)->next_asm) -#define ARC_OPCODE_NEXT_DIS(op) ((op)->next_dis) -}; - -struct arc_operand_value { - char *name; /* eg: "eq" */ - short value; /* eg: 1 */ - unsigned char type; /* index into `arc_operands' */ - unsigned char flags; /* various flag bits */ - -/* Values for `flags'. */ - -/* Return CPU number, given flag bits. */ -#define ARC_OPVAL_CPU(bits) ((bits) & ARC_MACH_CPU_MASK) -/* Return MACH number, given flag bits. */ -#define ARC_OPVAL_MACH(bits) ((bits) & ARC_MACH_MASK) -}; - -struct arc_operand { - /* One of the insn format chars. */ - unsigned char fmt; - - /* The number of bits in the operand (may be unused for a modifier). */ - unsigned char bits; - - /* How far the operand is left shifted in the instruction, or - the modifier's flag bit (may be unused for a modifier. */ - unsigned char shift; - - /* Various flag bits. */ - int flags; - -/* Values for `flags'. */ - -/* This operand is a suffix to the opcode. */ -#define ARC_OPERAND_SUFFIX 1 - -/* This operand is a relative branch displacement. The disassembler - prints these symbolically if possible. */ -#define ARC_OPERAND_RELATIVE_BRANCH 2 - -/* This operand is an absolute branch address. The disassembler - prints these symbolically if possible. */ -#define ARC_OPERAND_ABSOLUTE_BRANCH 4 - -/* This operand is an address. The disassembler - prints these symbolically if possible. */ -#define ARC_OPERAND_ADDRESS 8 - -/* This operand is a long immediate value. */ -#define ARC_OPERAND_LIMM 0x10 - -/* This operand takes signed values. */ -#define ARC_OPERAND_SIGNED 0x20 - -/* This operand takes signed values, but also accepts a full positive - range of values. That is, if bits is 16, it takes any value from - -0x8000 to 0xffff. */ -#define ARC_OPERAND_SIGNOPT 0x40 - -/* This operand should be regarded as a negative number for the - purposes of overflow checking (i.e., the normal most negative - number is disallowed and one more than the normal most positive - number is allowed). This flag will only be set for a signed - operand. */ -#define ARC_OPERAND_NEGATIVE 0x80 - -/* This operand doesn't really exist. The program uses these operands - in special ways. */ -#define ARC_OPERAND_FAKE 0x100 - -/* Modifier values. */ -/* A dot is required before a suffix. Eg: .le */ -#define ARC_MOD_DOT 0x1000 - -/* A normal register is allowed (not used, but here for completeness). */ -#define ARC_MOD_REG 0x2000 - -/* An auxiliary register name is expected. */ -#define ARC_MOD_AUXREG 0x4000 - -/* Sum of all ARC_MOD_XXX bits. */ -#define ARC_MOD_BITS 0x7000 - -/* Non-zero if the operand type is really a modifier. */ -#define ARC_MOD_P(X) ((X) & ARC_MOD_BITS) - - /* Insertion function. This is used by the assembler. To insert an - operand value into an instruction, check this field. - - If it is NULL, execute - i |= (p & ((1 << o->bits) - 1)) << o->shift; - (I is the instruction which we are filling in, O is a pointer to - this structure, and OP is the opcode value; this assumes twos - complement arithmetic). - - If this field is not NULL, then simply call it with the - instruction and the operand value. It will return the new value - of the instruction. If the ERRMSG argument is not NULL, then if - the operand value is illegal, *ERRMSG will be set to a warning - string (the operand will be inserted in any case). If the - operand value is legal, *ERRMSG will be unchanged. - - REG is non-NULL when inserting a register value. */ - - arc_insn (*insert) PARAMS ((arc_insn insn, - const struct arc_operand *operand, int mods, - const struct arc_operand_value *reg, long value, - const char **errmsg)); - - /* Extraction function. This is used by the disassembler. To - extract this operand type from an instruction, check this field. - - If it is NULL, compute - op = ((i) >> o->shift) & ((1 << o->bits) - 1); - if ((o->flags & ARC_OPERAND_SIGNED) != 0 - && (op & (1 << (o->bits - 1))) != 0) - op -= 1 << o->bits; - (I is the instruction, O is a pointer to this structure, and OP - is the result; this assumes twos complement arithmetic). - - If this field is not NULL, then simply call it with the - instruction value. It will return the value of the operand. If - the INVALID argument is not NULL, *INVALID will be set to - non-zero if this operand type can not actually be extracted from - this operand (i.e., the instruction does not match). If the - operand is valid, *INVALID will not be changed. - - INSN is a pointer to an array of two `arc_insn's. The first element is - the insn, the second is the limm if present. - - Operands that have a printable form like registers and suffixes have - their struct arc_operand_value pointer stored in OPVAL. */ - - long (*extract) PARAMS ((arc_insn *insn, - const struct arc_operand *operand, - int mods, const struct arc_operand_value **opval, - int *invalid)); -}; - -/* Bits that say what version of cpu we have. - These should be passed to arc_init_opcode_tables. - At present, all there is is the cpu type. */ - -/* CPU number, given value passed to `arc_init_opcode_tables'. */ -#define ARC_HAVE_CPU(bits) ((bits) & ARC_MACH_CPU_MASK) -/* MACH number, given value passed to `arc_init_opcode_tables'. */ -#define ARC_HAVE_MACH(bits) ((bits) & ARC_MACH_MASK) - -/* Special register values: */ -#define ARC_REG_SHIMM_UPDATE 61 -#define ARC_REG_SHIMM 63 -#define ARC_REG_LIMM 62 - -/* Non-zero if REG is a constant marker. */ -#define ARC_REG_CONSTANT_P(REG) ((REG) >= 61) - -/* Positions and masks of various fields: */ -#define ARC_SHIFT_REGA 21 -#define ARC_SHIFT_REGB 15 -#define ARC_SHIFT_REGC 9 -#define ARC_MASK_REG 63 - -/* Delay slot types. */ -#define ARC_DELAY_NONE 0 /* no delay slot */ -#define ARC_DELAY_NORMAL 1 /* delay slot in both cases */ -#define ARC_DELAY_JUMP 2 /* delay slot only if branch taken */ - -/* Non-zero if X will fit in a signed 9 bit field. */ -#define ARC_SHIMM_CONST_P(x) ((long) (x) >= -256 && (long) (x) <= 255) - -extern const struct arc_operand arc_operands[]; -extern const int arc_operand_count; -extern /*const*/ struct arc_opcode arc_opcodes[]; -extern const int arc_opcodes_count; -extern const struct arc_operand_value arc_suffixes[]; -extern const int arc_suffixes_count; -extern const struct arc_operand_value arc_reg_names[]; -extern const int arc_reg_names_count; -extern unsigned char arc_operand_map[]; - -/* Utility fns in arc-opc.c. */ -int arc_get_opcode_mach PARAMS ((int, int)); -/* `arc_opcode_init_tables' must be called before `arc_xxx_supported'. */ -void arc_opcode_init_tables PARAMS ((int)); -void arc_opcode_init_insert PARAMS ((void)); -void arc_opcode_init_extract PARAMS ((void)); -const struct arc_opcode *arc_opcode_lookup_asm PARAMS ((const char *)); -const struct arc_opcode *arc_opcode_lookup_dis PARAMS ((unsigned int)); -int arc_opcode_limm_p PARAMS ((long *)); -const struct arc_operand_value *arc_opcode_lookup_suffix PARAMS ((const struct arc_operand *type, int value)); -int arc_opcode_supported PARAMS ((const struct arc_opcode *)); -int arc_opval_supported PARAMS ((const struct arc_operand_value *)); |