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authorcvs2svn <>2000-02-22 19:18:14 +0300
committercvs2svn <>2000-02-22 19:18:14 +0300
commit12fa8278c17986cf8c1457dffbc3a17ec04be65e (patch)
tree50af885431648a3d53e99b1b2749c10710c7b668 /include/opcode/ppc.h
parent929ce68fe67a171b2e3ff506450ca893ed6532b3 (diff)
This commit was manufactured by cvs2svn to create tag 'egcs_20000222'.egcs_20000222
Sprout from cygnus 2000-02-22 16:18:13 UTC Ian Lance Taylor <iant@google.com> 'import libiberty from egcs' Delete: COPYING COPYING.LIB ChangeLog Makefile.in README config-ml.in config.guess config.if config.sub config/ChangeLog config/acinclude.m4 config/mh-a68bsd config/mh-aix386 config/mh-aix43 config/mh-apollo68 config/mh-armpic config/mh-cxux config/mh-cygwin config/mh-decstation config/mh-delta88 config/mh-dgux config/mh-dgux386 config/mh-djgpp config/mh-elfalphapic config/mh-hp300 config/mh-hpux config/mh-hpux8 config/mh-interix config/mh-irix4 config/mh-irix5 config/mh-irix6 config/mh-lynxos config/mh-lynxrs6k config/mh-m68kpic config/mh-mingw32 config/mh-ncr3000 config/mh-ncrsvr43 config/mh-necv4 config/mh-papic config/mh-ppcpic config/mh-riscos config/mh-sco config/mh-solaris config/mh-sparcpic config/mh-sun3 config/mh-sysv config/mh-sysv4 config/mh-sysv5 config/mh-vaxult2 config/mh-x86pic config/mpw-mh-mpw config/mpw/ChangeLog config/mpw/MoveIfChange config/mpw/README config/mpw/forward-include config/mpw/g-mpw-make.sed config/mpw/mpw-touch config/mpw/mpw-true config/mpw/null-command config/mpw/open-brace config/mpw/tr-7to8-src config/mpw/true config/mt-armpic config/mt-d30v config/mt-elfalphapic config/mt-linux config/mt-m68kpic config/mt-netware config/mt-ospace config/mt-papic config/mt-ppcpic config/mt-sparcpic config/mt-v810 config/mt-x86pic configure configure.bat configure.in etc/ChangeLog etc/Makefile.in etc/add-log.el etc/add-log.vi etc/configbuild.ein etc/configbuild.fig etc/configbuild.jin etc/configbuild.tin etc/configdev.ein etc/configdev.fig etc/configdev.jin etc/configdev.tin etc/configure etc/configure.in etc/configure.texi etc/make-stds.texi etc/standards.texi include/aout/ChangeLog include/aout/adobe.h include/aout/aout64.h include/aout/ar.h include/aout/dynix3.h include/aout/encap.h include/aout/host.h include/aout/hp.h include/aout/hp300hpux.h include/aout/hppa.h include/aout/ranlib.h include/aout/reloc.h include/aout/stab.def include/aout/stab_gnu.h include/aout/sun4.h include/bfdlink.h include/bout.h include/callback.h include/coff/ChangeLog include/coff/a29k.h include/coff/alpha.h include/coff/apollo.h include/coff/arm.h include/coff/aux-coff.h include/coff/ecoff.h include/coff/go32exe.h include/coff/h8300.h include/coff/h8500.h include/coff/i386.h include/coff/i860.h include/coff/i960.h include/coff/internal.h include/coff/m68k.h include/coff/m88k.h include/coff/mcore.h include/coff/mips.h include/coff/pe.h include/coff/powerpc.h include/coff/rs6000.h include/coff/sh.h include/coff/sparc.h include/coff/sym.h include/coff/symconst.h include/coff/tic30.h include/coff/tic80.h include/coff/w65.h include/coff/we32k.h include/coff/z8k.h include/dis-asm.h include/elf/ChangeLog include/elf/alpha.h include/elf/arc.h include/elf/arm-oabi.h include/elf/arm.h include/elf/common.h include/elf/d10v.h include/elf/d30v.h include/elf/dwarf.h include/elf/dwarf2.h include/elf/external.h include/elf/fr30.h include/elf/hppa.h include/elf/i386.h include/elf/internal.h include/elf/m32r.h include/elf/m68k.h include/elf/mcore.h include/elf/mips.h include/elf/mn10200.h include/elf/mn10300.h include/elf/ppc.h include/elf/reloc-macros.h include/elf/sh.h include/elf/sparc.h include/elf/v850.h include/fopen-bin.h include/fopen-same.h include/fopen-vms.h include/gdbm.h include/hp-symtab.h include/ieee.h include/mpw/ChangeLog include/mpw/README include/mpw/dir.h include/mpw/dirent.h include/mpw/fcntl.h include/mpw/grp.h include/mpw/mpw.h include/mpw/pwd.h include/mpw/spin.h include/mpw/stat.h include/mpw/sys/file.h include/mpw/sys/param.h include/mpw/sys/resource.h include/mpw/sys/stat.h include/mpw/sys/time.h include/mpw/sys/types.h include/mpw/utime.h include/mpw/varargs.h include/nlm/ChangeLog include/nlm/alpha-ext.h include/nlm/common.h include/nlm/external.h include/nlm/i386-ext.h include/nlm/internal.h include/nlm/ppc-ext.h include/nlm/sparc32-ext.h include/oasys.h include/opcode/ChangeLog include/opcode/a29k.h include/opcode/alpha.h include/opcode/arc.h include/opcode/arm.h include/opcode/cgen.h include/opcode/convex.h include/opcode/d10v.h include/opcode/d30v.h include/opcode/h8300.h include/opcode/hppa.h include/opcode/i386.h include/opcode/i860.h include/opcode/i960.h include/opcode/m68k.h include/opcode/m88k.h include/opcode/mips.h include/opcode/mn10200.h include/opcode/mn10300.h include/opcode/np1.h include/opcode/ns32k.h include/opcode/pn.h include/opcode/ppc.h include/opcode/pyr.h include/opcode/sparc.h include/opcode/tahoe.h include/opcode/tic30.h include/opcode/tic80.h include/opcode/v850.h include/opcode/vax.h include/os9k.h include/progress.h include/regs/ChangeLog include/remote-sim.h include/wait.h install-sh ltconfig ltmain.sh makeall.bat makefile.vms missing mkinstalldirs move-if-change mpw-README mpw-build.in mpw-config.in mpw-configure mpw-install setup.com symlink-tree ylwrap
Diffstat (limited to 'include/opcode/ppc.h')
-rw-r--r--include/opcode/ppc.h248
1 files changed, 0 insertions, 248 deletions
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
deleted file mode 100644
index a9e3b24ab..000000000
--- a/include/opcode/ppc.h
+++ /dev/null
@@ -1,248 +0,0 @@
-/* ppc.h -- Header file for PowerPC opcode table
- Copyright 1994, 1995 Free Software Foundation, Inc.
- Written by Ian Lance Taylor, Cygnus Support
-
-This file is part of GDB, GAS, and the GNU binutils.
-
-GDB, GAS, and the GNU binutils are free software; you can redistribute
-them and/or modify them under the terms of the GNU General Public
-License as published by the Free Software Foundation; either version
-1, or (at your option) any later version.
-
-GDB, GAS, and the GNU binutils are distributed in the hope that they
-will be useful, but WITHOUT ANY WARRANTY; without even the implied
-warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
-the GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this file; see the file COPYING. If not, write to the Free
-Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
-
-#ifndef PPC_H
-#define PPC_H
-
-/* The opcode table is an array of struct powerpc_opcode. */
-
-struct powerpc_opcode
-{
- /* The opcode name. */
- const char *name;
-
- /* The opcode itself. Those bits which will be filled in with
- operands are zeroes. */
- unsigned long opcode;
-
- /* The opcode mask. This is used by the disassembler. This is a
- mask containing ones indicating those bits which must match the
- opcode field, and zeroes indicating those bits which need not
- match (and are presumably filled in by operands). */
- unsigned long mask;
-
- /* One bit flags for the opcode. These are used to indicate which
- specific processors support the instructions. The defined values
- are listed below. */
- unsigned long flags;
-
- /* An array of operand codes. Each code is an index into the
- operand table. They appear in the order which the operands must
- appear in assembly code, and are terminated by a zero. */
- unsigned char operands[8];
-};
-
-/* The table itself is sorted by major opcode number, and is otherwise
- in the order in which the disassembler should consider
- instructions. */
-extern const struct powerpc_opcode powerpc_opcodes[];
-extern const int powerpc_num_opcodes;
-
-/* Values defined for the flags field of a struct powerpc_opcode. */
-
-/* Opcode is defined for the PowerPC architecture. */
-#define PPC_OPCODE_PPC (01)
-
-/* Opcode is defined for the POWER (RS/6000) architecture. */
-#define PPC_OPCODE_POWER (02)
-
-/* Opcode is defined for the POWER2 (Rios 2) architecture. */
-#define PPC_OPCODE_POWER2 (04)
-
-/* Opcode is only defined on 32 bit architectures. */
-#define PPC_OPCODE_32 (010)
-
-/* Opcode is only defined on 64 bit architectures. */
-#define PPC_OPCODE_64 (020)
-
-/* Opcode is supported by the Motorola PowerPC 601 processor. The 601
- is assumed to support all PowerPC (PPC_OPCODE_PPC) instructions,
- but it also supports many additional POWER instructions. */
-#define PPC_OPCODE_601 (040)
-
-/* Opcode is supported in both the Power and PowerPC architectures
- (ie, compiler's -mcpu=common or assembler's -mcom). */
-#define PPC_OPCODE_COMMON (0100)
-
-/* Opcode is supported for any Power or PowerPC platform (this is
- for the assembler's -many option, and it eliminates duplicates). */
-#define PPC_OPCODE_ANY (0200)
-
-/* A macro to extract the major opcode from an instruction. */
-#define PPC_OP(i) (((i) >> 26) & 0x3f)
-
-/* The operands table is an array of struct powerpc_operand. */
-
-struct powerpc_operand
-{
- /* The number of bits in the operand. */
- int bits;
-
- /* How far the operand is left shifted in the instruction. */
- int shift;
-
- /* Insertion function. This is used by the assembler. To insert an
- operand value into an instruction, check this field.
-
- If it is NULL, execute
- i |= (op & ((1 << o->bits) - 1)) << o->shift;
- (i is the instruction which we are filling in, o is a pointer to
- this structure, and op is the opcode value; this assumes twos
- complement arithmetic).
-
- If this field is not NULL, then simply call it with the
- instruction and the operand value. It will return the new value
- of the instruction. If the ERRMSG argument is not NULL, then if
- the operand value is illegal, *ERRMSG will be set to a warning
- string (the operand will be inserted in any case). If the
- operand value is legal, *ERRMSG will be unchanged (most operands
- can accept any value). */
- unsigned long (*insert) PARAMS ((unsigned long instruction, long op,
- const char **errmsg));
-
- /* Extraction function. This is used by the disassembler. To
- extract this operand type from an instruction, check this field.
-
- If it is NULL, compute
- op = ((i) >> o->shift) & ((1 << o->bits) - 1);
- if ((o->flags & PPC_OPERAND_SIGNED) != 0
- && (op & (1 << (o->bits - 1))) != 0)
- op -= 1 << o->bits;
- (i is the instruction, o is a pointer to this structure, and op
- is the result; this assumes twos complement arithmetic).
-
- If this field is not NULL, then simply call it with the
- instruction value. It will return the value of the operand. If
- the INVALID argument is not NULL, *INVALID will be set to
- non-zero if this operand type can not actually be extracted from
- this operand (i.e., the instruction does not match). If the
- operand is valid, *INVALID will not be changed. */
- long (*extract) PARAMS ((unsigned long instruction, int *invalid));
-
- /* One bit syntax flags. */
- unsigned long flags;
-};
-
-/* Elements in the table are retrieved by indexing with values from
- the operands field of the powerpc_opcodes table. */
-
-extern const struct powerpc_operand powerpc_operands[];
-
-/* Values defined for the flags field of a struct powerpc_operand. */
-
-/* This operand takes signed values. */
-#define PPC_OPERAND_SIGNED (01)
-
-/* This operand takes signed values, but also accepts a full positive
- range of values when running in 32 bit mode. That is, if bits is
- 16, it takes any value from -0x8000 to 0xffff. In 64 bit mode,
- this flag is ignored. */
-#define PPC_OPERAND_SIGNOPT (02)
-
-/* This operand does not actually exist in the assembler input. This
- is used to support extended mnemonics such as mr, for which two
- operands fields are identical. The assembler should call the
- insert function with any op value. The disassembler should call
- the extract function, ignore the return value, and check the value
- placed in the valid argument. */
-#define PPC_OPERAND_FAKE (04)
-
-/* The next operand should be wrapped in parentheses rather than
- separated from this one by a comma. This is used for the load and
- store instructions which want their operands to look like
- reg,displacement(reg)
- */
-#define PPC_OPERAND_PARENS (010)
-
-/* This operand may use the symbolic names for the CR fields, which
- are
- lt 0 gt 1 eq 2 so 3 un 3
- cr0 0 cr1 1 cr2 2 cr3 3
- cr4 4 cr5 5 cr6 6 cr7 7
- These may be combined arithmetically, as in cr2*4+gt. These are
- only supported on the PowerPC, not the POWER. */
-#define PPC_OPERAND_CR (020)
-
-/* This operand names a register. The disassembler uses this to print
- register names with a leading 'r'. */
-#define PPC_OPERAND_GPR (040)
-
-/* This operand names a floating point register. The disassembler
- prints these with a leading 'f'. */
-#define PPC_OPERAND_FPR (0100)
-
-/* This operand is a relative branch displacement. The disassembler
- prints these symbolically if possible. */
-#define PPC_OPERAND_RELATIVE (0200)
-
-/* This operand is an absolute branch address. The disassembler
- prints these symbolically if possible. */
-#define PPC_OPERAND_ABSOLUTE (0400)
-
-/* This operand is optional, and is zero if omitted. This is used for
- the optional BF and L fields in the comparison instructions. The
- assembler must count the number of operands remaining on the line,
- and the number of operands remaining for the opcode, and decide
- whether this operand is present or not. The disassembler should
- print this operand out only if it is not zero. */
-#define PPC_OPERAND_OPTIONAL (01000)
-
-/* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand
- is omitted, then for the next operand use this operand value plus
- 1, ignoring the next operand field for the opcode. This wretched
- hack is needed because the Power rotate instructions can take
- either 4 or 5 operands. The disassembler should print this operand
- out regardless of the PPC_OPERAND_OPTIONAL field. */
-#define PPC_OPERAND_NEXT (02000)
-
-/* This operand should be regarded as a negative number for the
- purposes of overflow checking (i.e., the normal most negative
- number is disallowed and one more than the normal most positive
- number is allowed). This flag will only be set for a signed
- operand. */
-#define PPC_OPERAND_NEGATIVE (04000)
-
-/* The POWER and PowerPC assemblers use a few macros. We keep them
- with the operands table for simplicity. The macro table is an
- array of struct powerpc_macro. */
-
-struct powerpc_macro
-{
- /* The macro name. */
- const char *name;
-
- /* The number of operands the macro takes. */
- unsigned int operands;
-
- /* One bit flags for the opcode. These are used to indicate which
- specific processors support the instructions. The values are the
- same as those for the struct powerpc_opcode flags field. */
- unsigned long flags;
-
- /* A format string to turn the macro into a normal instruction.
- Each %N in the string is replaced with operand number N (zero
- based). */
- const char *format;
-};
-
-extern const struct powerpc_macro powerpc_macros[];
-extern const int powerpc_num_macros;
-
-#endif /* PPC_H */