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authorMichal Ludvig <mludvig@suse.cz>2004-07-30 16:36:37 +0400
committerMichal Ludvig <mludvig@suse.cz>2004-07-30 16:36:37 +0400
commitf048a4a16f61132a00bc32bc92433134749a47ab (patch)
treebb315a932f686eb433752fae4975b45ff756c2f5 /include/opcode
parent82045f122180d847f4686f328546e8bd860b620e (diff)
Added new instructions for next version of VIA PadLock core.
Diffstat (limited to 'include/opcode')
-rw-r--r--include/opcode/ChangeLog4
-rw-r--r--include/opcode/i386.h3
2 files changed, 7 insertions, 0 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 4ed2b8679..684a2e7c4 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2004-08-30 Michal Ludvig <mludvig@suse.cz>
+
+ * i386.h (i386_optab): Added montmul/xsha1/xsha256 insns.
+
2004-07-22 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Allow cs/ds in 64bit for branch hints.
diff --git a/include/opcode/i386.h b/include/opcode/i386.h
index 454a7fd09..96bf149d5 100644
--- a/include/opcode/i386.h
+++ b/include/opcode/i386.h
@@ -1378,6 +1378,9 @@ static const template i386_optab[] =
{"xcryptcbc", 0, 0xf30fa7d0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
{"xcryptcfb", 0, 0xf30fa7e0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
{"xcryptofb", 0, 0xf30fa7e8, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
+{"montmul", 0, 0xf30fa6c0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
+{"xsha1", 0, 0xf30fa6c8, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
+{"xsha256", 0, 0xf30fa6d0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },
/* Alias for xstorerng. */
{"xstore", 0, 0x000fa7c0, X, Cpu686|CpuPadLock, NoSuf|IsString, { 0, 0, 0} },