diff options
| author | cvs2svn <> | 2012-08-01 01:38:55 +0400 |
|---|---|---|
| committer | cvs2svn <> | 2012-08-01 01:38:55 +0400 |
| commit | 8914ad7c15d64a0a6769a4020ca4fd55aeafc303 (patch) | |
| tree | 595e24ecbd093c573f2fb724310de2fd43681d7a /include/opcode | |
| parent | 9e8fdd506723cbfb67c5dd23b4d2df2edf302acc (diff) | |
This commit was manufactured by cvs2svn to create tag 'sid-sid-snapshot-20120801
snapshot-20120801'.
Sprout from binutils-2_23-branch 2012-07-26 14:05:38 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'binutils-'
Cherrypick from master 2012-07-31 21:38:54 UTC Maciej W. Rozycki <macro@codesourcery.com> ' include/opcode/':
include/ChangeLog
include/opcode/ChangeLog
include/opcode/mips.h
Delete:
texinfo/texinfo.tex
Diffstat (limited to 'include/opcode')
| -rw-r--r-- | include/opcode/ChangeLog | 15 | ||||
| -rw-r--r-- | include/opcode/mips.h | 50 |
2 files changed, 47 insertions, 18 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 4b8d3002c..1091973b2 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,18 @@ +2012-07-31 Chao-Ying Fu <fu@mips.com> + Catherine Moore <clm@codesourcery.com> + Maciej W. Rozycki <macro@codesourcery.com> + + * mips.h: Document microMIPS DSP ASE usage. + (MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for + microMIPS DSP ASE support. + (MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise. + (MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise. + (MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise. + (MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise. + (MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise. + (MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise. + (MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise. + 2012-07-06 Maciej W. Rozycki <macro@codesourcery.com> * mips.h: Fix a typo in description. diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 92325080b..857fc7173 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -1494,6 +1494,24 @@ extern const int bfd_mips16_num_opcodes; #define MICROMIPSOP_MASK_IMMY 0x1ff #define MICROMIPSOP_SH_IMMY 1 +/* MIPS DSP ASE */ +#define MICROMIPSOP_MASK_DSPACC 0x3 +#define MICROMIPSOP_SH_DSPACC 14 +#define MICROMIPSOP_MASK_DSPSFT 0x3f +#define MICROMIPSOP_SH_DSPSFT 16 +#define MICROMIPSOP_MASK_SA3 0x7 +#define MICROMIPSOP_SH_SA3 13 +#define MICROMIPSOP_MASK_SA4 0xf +#define MICROMIPSOP_SH_SA4 12 +#define MICROMIPSOP_MASK_IMM8 0xff +#define MICROMIPSOP_SH_IMM8 13 +#define MICROMIPSOP_MASK_IMM10 0x3ff +#define MICROMIPSOP_SH_IMM10 16 +#define MICROMIPSOP_MASK_WRDSP 0x3f +#define MICROMIPSOP_SH_WRDSP 14 +#define MICROMIPSOP_MASK_BP 0x3 +#define MICROMIPSOP_SH_BP 14 + /* Placeholders for fields that only exist in the traditional 32-bit instruction encoding; see the comment above for details. */ #define MICROMIPSOP_MASK_CODE20 0 @@ -1508,28 +1526,12 @@ extern const int bfd_mips16_num_opcodes; #define MICROMIPSOP_SH_VECBYTE 0 #define MICROMIPSOP_MASK_VECALIGN 0 #define MICROMIPSOP_SH_VECALIGN 0 -#define MICROMIPSOP_MASK_DSPACC 0 -#define MICROMIPSOP_SH_DSPACC 0 #define MICROMIPSOP_MASK_DSPACC_S 0 #define MICROMIPSOP_SH_DSPACC_S 0 -#define MICROMIPSOP_MASK_DSPSFT 0 -#define MICROMIPSOP_SH_DSPSFT 0 #define MICROMIPSOP_MASK_DSPSFT_7 0 #define MICROMIPSOP_SH_DSPSFT_7 0 -#define MICROMIPSOP_MASK_SA3 0 -#define MICROMIPSOP_SH_SA3 0 -#define MICROMIPSOP_MASK_SA4 0 -#define MICROMIPSOP_SH_SA4 0 -#define MICROMIPSOP_MASK_IMM8 0 -#define MICROMIPSOP_SH_IMM8 0 -#define MICROMIPSOP_MASK_IMM10 0 -#define MICROMIPSOP_SH_IMM10 0 -#define MICROMIPSOP_MASK_WRDSP 0 -#define MICROMIPSOP_SH_WRDSP 0 #define MICROMIPSOP_MASK_RDDSP 0 #define MICROMIPSOP_SH_RDDSP 0 -#define MICROMIPSOP_MASK_BP 0 -#define MICROMIPSOP_SH_BP 0 #define MICROMIPSOP_MASK_MT_U 0 #define MICROMIPSOP_SH_MT_U 0 #define MICROMIPSOP_MASK_MT_H 0 @@ -1702,6 +1704,18 @@ extern const int bfd_mips16_num_opcodes; "f" 32-bit floating point constant "l" 32-bit floating point constant in .lit4 + DSP ASE usage: + "2" 2-bit unsigned immediate for byte align (MICROMIPSOP_*_BP) + "3" 3-bit unsigned immediate (MICROMIPSOP_*_SA3) + "4" 4-bit unsigned immediate (MICROMIPSOP_*_SA4) + "5" 8-bit unsigned immediate (MICROMIPSOP_*_IMM8) + "6" 5-bit unsigned immediate (MICROMIPSOP_*_RS) + "7" 2-bit DSP accumulator register (MICROMIPSOP_*_DSPACC) + "8" 6-bit unsigned immediate (MICROMIPSOP_*_WRDSP) + "0" 6-bit signed immediate (MICROMIPSOP_*_DSPSFT) + "@" 10-bit signed immediate (MICROMIPSOP_*_IMM10) + "^" 5-bit unsigned immediate (MICROMIPSOP_*_RD) + Other: "()" parens surrounding optional value "," separates operands @@ -1709,8 +1723,8 @@ extern const int bfd_mips16_num_opcodes; "m" start of microMIPS extension sequence Characters used so far, for quick reference when adding more: - "1234567890" - "<>(),+.\|~" + "12345678 0" + "<>(),+.@\^|~" "ABCDEFGHI KLMN RST V " "abcd f hijklmnopqrstuvw yz" |