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authorcvs2svn <>2000-04-04 18:32:33 +0400
committercvs2svn <>2000-04-04 18:32:33 +0400
commit69b6206fef6dd986a554334b6519b0543cab4f5e (patch)
tree1092995ccf9aad86f4c3e43be94406c03d02a5cd /include/sim-d10v.h
parent929ce68fe67a171b2e3ff506450ca893ed6532b3 (diff)
This commit was manufactured by cvs2svn to create branch 'binutils-
2_10-branch'. Sprout from cygnus 2000-02-22 16:18:13 UTC Ian Lance Taylor <iant@google.com> 'import libiberty from egcs' Cherrypick from master 2000-03-30 02:19:55 UTC Jason Merrill <jason@redhat.com> ' * configure.in: -linux-gnu*, not -linux-gnu.': ChangeLog Makefile.in config.guess config.sub config/ChangeLog config/mh-i370pic config/mt-aix43 config/mt-i370pic config/mt-wince configure configure.in include/ChangeLog include/ansidecl.h include/aout/ChangeLog include/aout/aout64.h include/bfdlink.h include/coff/ChangeLog include/coff/arm.h include/coff/internal.h include/coff/mcore.h include/coff/mipspe.h include/coff/pe.h include/coff/sh.h include/dis-asm.h include/elf/ChangeLog include/elf/arm-oabi.h include/elf/arm.h include/elf/avr.h include/elf/common.h include/elf/dwarf.h include/elf/dwarf2.h include/elf/hppa.h include/elf/i370.h include/elf/i386.h include/elf/i960.h include/elf/m32r.h include/elf/m68k.h include/elf/mcore.h include/elf/mips.h include/elf/mn10300.h include/elf/pj.h include/elf/reloc-macros.h include/elf/sh.h include/elf/sparc.h include/hashtab.h include/hp-symtab.h include/opcode/ChangeLog include/opcode/alpha.h include/opcode/cgen.h include/opcode/d10v.h include/opcode/d30v.h include/opcode/hppa.h include/opcode/i370.h include/opcode/i386.h include/opcode/m68k.h include/opcode/mips.h include/opcode/mn10300.h include/opcode/pj.h include/opcode/ppc.h include/partition.h include/remote-sim.h include/sim-d10v.h ltconfig ltmain.sh mkdep texinfo/texinfo.tex Cherrypick from master 2000-04-04 14:32:32 UTC Alan Modra <modra@gmail.com> 'Move translated part of bug report string back into .c files so': include/bin-bugs.h Delete: config/mh-aix43 configure.bat include/wait.h makeall.bat
Diffstat (limited to 'include/sim-d10v.h')
-rw-r--r--include/sim-d10v.h103
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diff --git a/include/sim-d10v.h b/include/sim-d10v.h
new file mode 100644
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--- /dev/null
+++ b/include/sim-d10v.h
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+/* This file defines the interface between the d10v simulator and gdb.
+ Copyright (C) 1999 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#if !defined (SIM_D10V_H)
+#define SIM_D10V_H
+
+#ifdef __cplusplus
+extern "C" { // }
+#endif
+
+/* GDB interprets addresses as:
+
+ 0x00xxxxxx: Physical unified memory segment (Unified memory)
+ 0x01xxxxxx: Physical instruction memory segment (On-chip insn memory)
+ 0x02xxxxxx: Physical data memory segment (On-chip data memory)
+ 0x10xxxxxx: Logical data address segment (DMAP translated memory)
+ 0x11xxxxxx: Logical instruction address segment (IMAP translated memory)
+
+ The remote d10v board interprets addresses as:
+
+ 0x00xxxxxx: Physical unified memory segment (Unified memory)
+ 0x01xxxxxx: Physical instruction memory segment (On-chip insn memory)
+ 0x02xxxxxx: Physical data memory segment (On-chip data memory)
+
+ The following translate a virtual DMAP/IMAP offset into a physical
+ memory segment assigning the translated address to PHYS. Since a
+ memory access may cross a page boundrary the number of bytes for
+ which the translation is applicable (or 0 for an invalid virtual
+ offset) is returned. */
+
+enum
+ {
+ SIM_D10V_MEMORY_UNIFIED = 0x00000000,
+ SIM_D10V_MEMORY_INSN = 0x01000000,
+ SIM_D10V_MEMORY_DATA = 0x02000000,
+ SIM_D10V_MEMORY_DMAP = 0x10000000,
+ SIM_D10V_MEMORY_IMAP = 0x11000000
+ };
+
+extern unsigned long sim_d10v_translate_dmap_addr
+ (unsigned long offset,
+ int nr_bytes,
+ unsigned long *phys,
+ unsigned long (*dmap_register) (int reg_nr));
+
+extern unsigned long sim_d10v_translate_imap_addr
+ (unsigned long offset,
+ int nr_bytes,
+ unsigned long *phys,
+ unsigned long (*imap_register) (int reg_nr));
+
+extern unsigned long sim_d10v_translate_addr
+ (unsigned long vaddr,
+ int nr_bytes,
+ unsigned long *phys,
+ unsigned long (*dmap_register) (int reg_nr),
+ unsigned long (*imap_register) (int reg_nr));
+
+
+/* The simulator makes use of the following register information. */
+
+enum
+ {
+ SIM_D10V_R0_REGNUM = 0,
+ SIM_D10V_CR0_REGNUM = 16,
+ SIM_D10V_A0_REGNUM = 32,
+ SIM_D10V_SPI_REGNUM = 34,
+ SIM_D10V_SPU_REGNUM = 35,
+ SIM_D10V_IMAP0_REGNUM = 36,
+ SIM_D10V_DMAP0_REGNUM = 38,
+ SIM_D10V_TS2_DMAP_REGNUM = 40
+ };
+
+enum
+ {
+ SIM_D10V_NR_R_REGS = 16,
+ SIM_D10V_NR_A_REGS = 2,
+ SIM_D10V_NR_IMAP_REGS = 2,
+ SIM_D10V_NR_DMAP_REGS = 4,
+ SIM_D10V_NR_CR_REGS = 16
+ };
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif