2009-09-16 Mike Frysinger <michael.frysinger@analog.com>

        * bfin/include/cdefBF512.h, bfin/include/cdefBF514.h,
        bfin/include/cdefBF516.h, bfin/include/cdefBF518.h,
        bfin/include/cdefBF51x_base.h, bfin/include/cdefBF523.h,
        bfin/include/cdefBF524.h, bfin/include/cdefBF526.h,
        bfin/include/cdefBF542M.h, bfin/include/cdefBF544M.h,
        bfin/include/cdefBF547M.h, bfin/include/cdefBF548M.h,
        bfin/include/cdefBF549M.h, bfin/include/defBF512.h,
        bfin/include/defBF514.h, bfin/include/defBF516.h,
        bfin/include/defBF518.h, bfin/include/defBF51x_base.h,
        bfin/include/defBF523.h, bfin/include/defBF524.h,
        bfin/include/defBF526.h, bfin/include/defBF542M.h,
        bfin/include/defBF544M.h, bfin/include/defBF547M.h,
        bfin/include/defBF548M.h, bfin/include/defBF549M.h:
        New file.
        * bfin/include/ccblkfn.h, bfin/include/cdefBF525.h,
        bfin/include/cdefBF527.h, bfin/include/cdefBF52x_base.h,
        bfin/include/cdefBF532.h, bfin/include/cdefBF534.h,
        bfin/include/cdefBF535.h, bfin/include/cdefBF538.h,
        bfin/include/cdefBF539.h, bfin/include/cdefBF542.h,
        bfin/include/cdefBF544.h, bfin/include/cdefBF547.h,
        bfin/include/cdefBF548.h, bfin/include/cdefBF549.h,
        bfin/include/cdefBF54x_base.h, bfin/include/cdefBF561.h,
        bfin/include/cdefblackfin.h, bfin/include/cdef_LPBlackfin.h,
        bfin/include/cplb.h, bfin/include/defBF527.h,
        bfin/include/defBF52x_base.h, bfin/include/defBF532.h,
        bfin/include/defBF534.h, bfin/include/defBF535.h,
        bfin/include/defBF537.h, bfin/include/defBF538.h,
        bfin/include/defBF539.h, bfin/include/defBF542.h,
        bfin/include/defBF544.h, bfin/include/defBF547.h,
        bfin/include/defBF548.h, bfin/include/defBF549.h,
        bfin/include/defBF54x_base.h, bfin/include/defBF561.h,
        bfin/include/defblackfin.h, bfin/include/def_LPBlackfin.h,
        bfin/include/sys/_adi_platform.h,
        bfin/include/sys/anomaly_macros_rtl.h,
        bfin/include/sys/exception.h, bfin/include/sysreg.h:
        Update to Visual DSP 5.0 Update 6.

1 files changed, 24 insertions, 1 deletions

diff --git a/libgloss/bfin/include/defBF542.h b/libgloss/bfin/include/defBF542.h
index 3644515b9..2bb08b26f 100644
--- a/libgloss/bfin/include/defBF542.h
+++ b/libgloss/bfin/include/defBF542.h
@@ -13,7 +13,7 @@
 /*
 ** defBF542.h
 **
-** Copyright (C) 2008 Analog Devices, Inc.
+** Copyright (C) 2008, 2009 Analog Devices, Inc.
 **
 ************************************************************************************
 **
@@ -32,6 +32,12 @@
 /* Include defBF54x_base.h for the set of #defines that are common to all ADSP-BF54x processors */
 #include <defBF54x_base.h>
 
+#ifdef _MISRA_RULES
+#pragma diag(push)
+#pragma diag(suppress:misra_rule_19_4:"some macros violate rule 19.4")
+#pragma diag(suppress:misra_rule_19_7:"Allow function-like macros ")
+#endif /* _MISRA_RULES */
+
 /* The following are the #defines needed by ADSP-BF542 that are not in the common header */
 
 /* ATAPI Registers */
@@ -364,14 +370,23 @@
 #define                KPAD_ROWEN  0x1c00     /* Row Enable Width */
 #define                KPAD_COLEN  0xe000     /* Column Enable Width */
 
+#ifdef _MISRA_RULES
+#define         SET_KPAD_ROWEN(x)  (((x)&0x7u)<<10) /* 000: row 0 enabled, 111: rows 0-7 enabled */
+#define         SET_KPAD_COLEN(x)  (((x)&0x7u)<<13) /* 000: column 0 enabled, 111: columns 0-7 enabled */
+#else
 #define         SET_KPAD_ROWEN(x)  (((x)&0x7)<<10) /* 000: row 0 enabled, 111: rows 0-7 enabled */
 #define         SET_KPAD_COLEN(x)  (((x)&0x7)<<13) /* 000: column 0 enabled, 111: columns 0-7 enabled */
+#endif /* _MISRA_RULES */
 
 /* Bit masks for KPAD_PRESCALE */
 
 #define         KPAD_PRESCALE_VAL  0x3f       /* Key Prescale Value */
 
+#ifdef _MISRA_RULES
+#define      SET_KPAD_PRESCALE(x)  ((x)&0x3Fu)   /* KPAD_PRESCALE_VAL (Key Prescale) Key Prescale Value (5:0) */
+#else
 #define      SET_KPAD_PRESCALE(x)  ((x)&0x3F)   /* KPAD_PRESCALE_VAL (Key Prescale) Key Prescale Value (5:0) */
+#endif /* _MISRA_RULES */
 
 /* Bit masks for KPAD_MSEL */
 
@@ -383,8 +398,13 @@
 #define                  KPAD_ROW  0xff       /* Rows Pressed */
 #define                  KPAD_COL  0xff00     /* Columns Pressed */
 
+#ifdef _MISRA_RULES
+#define    SET_KPAD_DBON_SCALE(x)  ((x)&0xFFu)   /* DBON_SCALE (Debounce Scale) Debounce Delay Multiplier Select [7:0] */
+#define  SET_KPAD_COLDRV_SCALE(x)  (((x)&0xFFu)<<8) /* COLDRV_SCALE (Column Driver Scale) Column Driver Period Multiplier Select [15:8] */
+#else
 #define    SET_KPAD_DBON_SCALE(x)  ((x)&0xFF)   /* DBON_SCALE (Debounce Scale) Debounce Delay Multiplier Select [7:0] */
 #define  SET_KPAD_COLDRV_SCALE(x)  (((x)&0xFF)<<8) /* COLDRV_SCALE (Column Driver Scale) Column Driver Period Multiplier Select [15:8] */
+#endif /* _MISRA_RULES */
 
 /* Bit masks for KPAD_STAT */
 
@@ -1211,5 +1231,8 @@
 /*     MULTI BIT MACRO ENUMERATIONS            */
 /* ******************************************* */
 
+#ifdef _MISRA_RULES
+#pragma diag(pop)
+#endif /* _MISRA_RULES */
 
 #endif /* _DEF_BF542_H */