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-rw-r--r--include/opcode/ChangeLog4
-rw-r--r--include/opcode/ppc.h7
2 files changed, 11 insertions, 0 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 18aee1ff3..467cc5b60 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2008-08-01 Peter Bergner <bergner@vnet.ibm.com>
+
+ * ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
+
2008-07-30 Michael J. Eager <eager@eagercon.com>
* ppc.h (PPC_OPCODE_405): Define.
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index a6b368ab0..0296b5967 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -157,6 +157,9 @@ extern const int powerpc_num_opcodes;
/* Opcode is supported by PowerPC 405 processor. */
#define PPC_OPCODE_405 0x40000000
+/* Opcode is supported by Vector-Scalar (VSX) Unit */
+#define PPC_OPCODE_VSX 0x80000000
+
/* A macro to extract the major opcode from an instruction. */
#define PPC_OP(i) (((i) >> 26) & 0x3f)
@@ -312,6 +315,10 @@ extern const unsigned int num_powerpc_operands;
#define PPC_OPERAND_FSL (0x20000)
#define PPC_OPERAND_FCR (0x40000)
#define PPC_OPERAND_UDI (0x80000)
+
+/* This operand names a vector-scalar unit register. The disassembler
+ prints these with a leading 'vs'. */
+#define PPC_OPERAND_VSR (0x100000)
/* The POWER and PowerPC assemblers use a few macros. We keep them
with the operands table for simplicity. The macro table is an