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section.s_page.
* ti.h (COFF_ADJUST_SCNHDR_OUT_PRE): Define.
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* common.h (STT_IFUNC): Define.
elfcpp/
* elfcpp.h (enum STT): Add STT_IFUNC.
bfd/
* syms.c (struct bfd_symbol): Add new flag BSF_INDIRECT_FUNCTION.
Remove redundant flag BFD_FORT_COMM_DEFAULT_VALUE. Renumber flags
to remove gaps.
(bfd_print_symbol_vandf): Return 'i' for BSF_INDIRECT_FUNCTION.
(bfd_decode_symclass): Likewise.
* elf.c (swap_out_syms): Translate BSF_INDIRECT_FUNCTION into
STT_IFUNC.
(elf_find_function): Treat STT_IFUNC in the same way as STT_FUNC.
(_bfd_elf_is_function_type): Likewise.
* elf32-arm.c (arm_elf_find_function): Likewise.
(elf32_arm_adjust_dynamic_symbol): Likewise.
(elf32_arm_swap_symbol_in): Likewise.
(elf32_arm_additional_program_headers): Likewise.
* elf32-i386.c (is_indirect_symbol): New function.
(elf_i386_check_relocs): Also generate dynamic relocs for
relocations against STT_IFUNC symbols.
(allocate_dynrelocs): Likewise.
(elf_i386_relocate_section): Likewise.
* elf64-x86-64.c (is_indirect_symbol): New function.
(elf64_x86_64_check_relocs): Also generate dynamic relocs for
relocations against STT_IFUNC symbols.
(allocate_dynrelocs): Likewise.
(elf64_x86_64_relocate_section): Likewise.
* elfcode.h (elf_slurp_symbol_table): Translate STT_IFUNC into
BSF_INDIRECT_FUNCTION.
* elflink.c (_bfd_elf_adjust_dynamic_reloc_section): Add support
for STT_IFUNC symbols.
(get_ifunc_reloc_section_name): New function.
(_bfd_elf_make_ifunc_reloc_section): New function.
* elf-bfd.h (struct bfd_elf_section_data): Add indirect_relocs field.
* bfd-in2.h: Regenerate.
gas/
* config/obj-elf.c (obj_elf_type): Add support for STT_IFUNC type.
* doc/as.texinfo: Document new feature.
* NEWS: Mention new feature.
gas/testsuite/
* gas/elf/type.s: Add test of STT_IFUNC symbol type.
* gas/elf/type.e: Update expected disassembly.
* gas/elf/elf.exp: Update grep of symbol types.
ld/
* NEWS: Mention new feature.
* pe-dll.c (process_def_file): Replace use of redundant
BFD_FORT_COMM_DEFAULT_VALUE with 0.
* scripttempl/elf.sc: Add .rel.ifunc.dyn and .rela.ifunc.dyn
sections.
ld/testsuite/
* ld-mips-elf/reloc-1-n32.d: Updated expected output for reloc
descriptions.
* ld-mips-elf/reloc-1-n64.d: Likewise.
* ld-i386/ifunc.d: New test.
* ld-i386/ifunc.s: Source file for the new test.
* ld-i386/i386.exp: Run the new test.
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* plugin.cc (ld_plugin_message): Change format parameter to const.
Fix mismatch between new[] and delete.
include/ChangeLog:
* plugin-api.h (ld_plugin_message): Change format parameter to const.
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bfd_mach_mips16000.
* archures.c (bfd_architecture): Add .#defines for bfd_mach_mips14000,
bfd_mach_mips16000.
* bfd-in2.h: Regenerate.
* cpu-mips.c: Add enums I_mips14000, I_mips16000.
(arch_info_struct): Add refs to R14000, R16000.
* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips14000,
bfd_mach_mips16000.
(mips_mach_extensions): Map R14000, R16000 to R10000.
* config/tc-mips.c (hilo_interlocks): Handle CPU_R14000, CPU_R16000.
(mips_cpu_info_table): Add r14000, r16000.
* doc/c-mips.texi: Add entries for 14000, 16000.
* mips-dis.c (mips_arch_choices): Add r14000, r16000.
* mips.h: Define CPU_R14000, CPU_R16000.
(OPCODE_IS_MEMBER): Include R14000, R16000 in test.
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R_CR16_GLOB_DAT): New relocations.
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PR 7047
* bfdlink.h (struct bfd_elf_version_expr): Delete "symbol".
Add "literal".
bfd/
PR 7047
* configure.in: Bump version.
* configure: Regenerate.
* elflink.c (_bfd_elf_link_assign_sym_version): Continue matching
against version nodes when a global match is a wildcard. Similarly
continue matching on local wildcard matches, rather than only
continuing for "*". Have any global wildcard match override a
local wildcard match. Correct logic hiding unversioned symbol.
(bfd_elf_size_dynamic_sections): Update for changes to struct
bfd_elf_version_expr.
ld/
PR 7047
* emultempl/ppc64elf.em (gld${EMULATION_NAME}_new_vers_pattern): Update
for changes to struct bfd_elf_version_expr.
* ldlang.c (lang_vers_match, version_expr_head_hash): Likewise.
(version_expr_head_eq, lang_finalize_version_expr_head): Likewise.
(lang_register_vers_node): Likewise.
(lang_new_vers_pattern): Likewise. Ensure "literal" is set when
no glob chars found in "pattern".
(realsymbol): Correct backslash quote logic.
* ld.texinfo (VERSION): Warn about global wildcards.
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(R_CRIS_DTPMOD): Open up for use elsewhere than the fourth GOT entry.
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* xtensa-isa.c (xtensa_state_is_shared_or): New function.
2008-11-21 Sterling Augustine <sterling@tensilica.com>
* xtensa-isa-internal.h (XTENSA_STATE_IS_SHARED_OR): New flag.
* xtensa-isa.h (xtensa_state_is_shared_or): New prototype.
2008-11-21 Sterling Augustine <sterling@tensilica.com>
* config/tc-xtensa.c (check_t1_t2_reads_and_writes): Call
xtensa_state_is_shared_or to allow multiple opcodes within a
single FLIX bundle to write to these special states.
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* xtensa-config.h (XCHAL_HAVE_MUL16, XCHAL_HAVE_MUL32, XCHAL_HAVE_DIV32)
(XCHAL_HAVE_MINMAX, XCHAL_HAVE_SEXT, XCHAL_HAVE_THREADPTR)
(XCHAL_HAVE_RELEASE_SYNC, XCHAL_HAVE_S32C1I): Change to 1.
(XCHAL_NUM_AREGS): Change to 32.
(XCHAL_ICACHE_SIZE, XCHAL_DCACHE_SIZE): Change to 16K.
(XCHAL_ICACHE_LINESIZE, XCHAL_DCACHE_LINESIZE): Change to 32.
(XCHAL_ICACHE_LINEWIDTH, XCHAL_DCACHE_LINEWIDTH): Change to 5.
(XCHAL_DCACHE_IS_WRITEBACK): Change to 1.
(XCHAL_DEBUGLEVEL): Change to 6.
bfd/
* xtensa-modules.c (sysregs): Add MMID, VECBASE, EPC5, EPC6, EPC7,
EXCSAVE5, EXCSAVE6, EXCSAVE7, EPS5, EPS6, EPS7, CPENABLE,
SCOMPARE1, and THREADPTR registers.
(NUM_SYSREGS, MAX_USER_REG): Update.
(states): Change width of INTERRUPT, WindowBase, WindowStart, and
INTENABLE. Add VECBASE, EPC5, EPC6, EPC7, EXCSAVE5, EXCSAVE6,
EXCSAVE7, EPS6, EPS6, EPS7, THREADPTR, CPENABLE, and SCOMPARE1 states.
(NUM_STATES): Update.
(enum xtensa_state_id): Add entries for new states.
(enum xtensa_field_id): Add entries for xt_wbr15_imm and xt_wbr18_imm
fields, along with functions to extract and set them.
(regfiles): Change number of AR registers to 32.
(Operand_ar0_encode, Operand_ar4_encode, Operand_ar8_encode,
Operand_ar12_encode, Operand_ars_entry_encode): Update register mask.
(operands): Add entries for tp7, xt_wbr15_label, xt_wbr18_label,
xt_wbr15_imm, and xt_wbr18_imm operands, along with functions to
encode and decode them.
(enum xtensa_operand_id): Add entries for new operands.
(Iclass_xt_iclass_rfi_stateArgs): Add EPC5, EPC6, EPC7, EPS5, EPS6, and
EPC7 states.
(Iclass_xt_iclass_rfdo_stateArgs): Replace EPC4 and EPS4 by EPC6 and
EPS6, respectively.
(iclasses): Add entries for rur_threadptr, wur_threadptr,
xt_iclass_wsr_176, xt_iclass_rsr_epc5, xt_iclass_wsr_epc5,
xt_iclass_xsr_epc5, xt_iclass_rsr_excsave5, xt_iclass_wsr_excsave5,
xt_iclass_xsr_excsave5, xt_iclass_rsr_epc6, xt_iclass_wsr_epc6,
xt_iclass_xsr_epc6, xt_iclass_rsr_excsave6, xt_iclass_wsr_excsave6,
xt_iclass_xsr_excsave6, xt_iclass_rsr_epc7, xt_iclass_wsr_epc7,
xt_iclass_xsr_epc7, xt_iclass_rsr_excsave7, xt_iclass_wsr_excsave7,
xt_iclass_xsr_excsave7, xt_iclass_rsr_eps5, xt_iclass_wsr_eps5,
xt_iclass_xsr_eps5, xt_iclass_rsr_eps6, xt_iclass_wsr_eps6,
xt_iclass_xsr_eps6, xt_iclass_rsr_eps7, xt_iclass_wsr_eps7,
xt_iclass_xsr_eps7, xt_iclass_rsr_vecbase, xt_iclass_wsr_vecbase,
xt_iclass_xsr_vecbase, xt_iclass_mul16, xt_iclass_wsr_mmid,
xt_iclass_icache_lock, xt_iclass_dcache_lock, xt_iclass_rsr_cpenable,
xt_iclass_wsr_cpenable, xt_iclass_xsr_cpenable, xt_iclass_clamp,
xt_iclass_minmax, xt_iclass_sx, xt_iclass_l32ai, xt_iclass_s32ri,
xt_iclass_s32c1i, xt_iclass_rsr_scompare1, xt_iclass_wsr_scompare1,
xt_iclass_xsr_scompare1, xt_iclass_div, and xt_iclass_mul32, along
with corresponding argument and state argument arrays. Change
number of state arguments for xt_iclass_rfi. Add arguments for
xt_iclass_rfdo.
(enum xtensa_iclass_id): Add entries for new iclasses.
(opcodes): Add entries for RUR_THREADPTR, WUR_THREADPTR, WSR_176,
RSR_EPC5, WSR_EPC5, XSR_EPC5, RSR_EXCSAVE5, WSR_EXCSAVE5, XSR_EXCSAVE5,
RSR_EPC6, WSR_EPC6, XSR_EPC6, RSR_EXCSAVE6, WSR_EXCSAVE6, XSR_EXCSAVE6,
RSR_EPC7, WSR_EPC7, XSR_EPC7, RSR_EXCSAVE7, WSR_EXCSAVE7, XSR_EXCSAVE7,
RSR_EPS5, WSR_EPS5, XSR_EPS5, RSR_EPS6, WSR_EPS6, XSR_EPS6, RSR_EPS7,
WSR_EPS7, XSR_EPS7, RSR_VECBASE, WSR_VECBASE, XSR_VECBASE, MUL16U,
MUL16S, WSR_MMID, IPFL, IHU, IIU, DPFL, DHU, DIU, RSR_CPENABLE,
WSR_CPENABLE, XSR_CPENABLE, CLAMPS, MIN, MAX, MINU, MAXU, SEXT, L32AI,
S32RI, S32C1I, RSR_SCOMPARE1, WSR_SCOMPARE1, XSR_SCOMPARE1, QUOU, QUOS,
REMU, REMS, and MULL opcodes, along with the corresponding functions
to encode them.
(enum xtensa_opcode_id): Add entries for new opcodes.
(Slot_inst_decode): Handle new opcodes.
(Slot_inst_get_field_fns, Slot_inst_set_field_fns): Add entries for
xt_wbr15_imm and xt_wbr18_imm fields.
(Slot_inst16a_get_field_fns, Slot_inst16a_set_field_fns): Likewise.
(Slot_inst16b_get_field_fns, Slot_inst16b_set_field_fns): Likewise.
(xtensa_modules): Update number of fields, operands, iclasses and
opcodes.
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* elf.c (assign_file_positions_for_load_sections): Use header_size
to avoid moving the load address of file headers.
(assign_file_positions_for_load_sections): Set header_size for
segments containing the file header.
include/elf/
* internal.h (struct elf_segment_map): Add header_size field.
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2008-11-14 Tristan Gingold <gingold@adacore.com>
* configure.com: Handle bfd_default_target_size, BFD_HOST_LONG_LONG,
BFD_HOST_64BIT_LONG_LONG, BFD_HOSTPTR_T, bfd_file_ptr.
Generate bfdver.h.
* vms-hdr.c (_bfd_vms_write_hdr): Use strdup/free instead of alloca.
* hosts/alphavms.h: Defines macros to bypass i18n.
* makefile.vms (OBJS): Update file list.
(DEFS): Remove VMS_DEBUG, const, add DEBUGDIR.
(CFLAGS): Update flags.
* bfdio.c (real_fopen): Add code specific to VMS: extract attributes
from modes.
binutils/
2008-11-14 Tristan Gingold <gingold@adacore.com>
* configure.com: Get version from configure.in of bfd.
* makefile.vms-in (DEBUG_OBJS): Add dwarf.obj.
(CFLAGS): Update flags.
include/
2008-11-14 Tristan Gingold <gingold@adacore.com>
* fopen-vms.h (FOPEN_RB): Use a single string to match the
standard prototype.
(FOPEN_WB): Ditto.
(FOPEN_AB): Ditto.
(FOPEN_RUB): Ditto.
(FOPEN_WUB): Ditto.
(FOPEN_AUB): Ditto.
libiberty/
2008-11-14 Tristan Gingold <gingold@adacore.com>
* makefile.vms (OBJS): Update objects list.
(CFLAGS): Update.
(libiberty.olb): Remove alloca-conf.h dependency.
* config.h-vms: Use new macro sets, use builtin alloca.
opcodes/
2008-11-14 Tristan Gingold <gingold@adacore.com>
* makefile.vms (OBJS): Update list of objects.
(DEFS): Update
(CFLAGS): Update.
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* auxv.c (fprint_target_auxv): Handle AT_BASE_PLATFORM and
AT_EXECFN. Re-sort AT_SECURE.
include/elf/ChangeLog:
* common.h (AT_BASE_PLATFORM, AT_EXECFN): Define.
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* mips.h: Doucument '1' for 5-bit sync type.
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* ppc.h: Add Tag_GNU_Power_ABI_Struct_Return.
bfd/
* elf32-ppc.c (ppc_elf_merge_obj_attributes): Merge
Tag_GNU_Power_ABI_Struct_Return.
binutils/
* readelf.c (display_power_gnu_attribute): Decode
Tag_GNU_Power_ABI_Struct_Return.
ld/testsuite/
* ld-powerpc/gnu-attr-12-1.s: New file.
* ld-powerpc/gnu-attr-12-2.s: New file.
* ld-powerpc/gnu-attr-12-11.d: New file.
* ld-powerpc/gnu-attr-12-21.d: New file.
* ld-powerpc/powerpc.exp: Run new dump tests.
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(R_CRIS_DTP, R_CRIS_32_DTPREL, R_CRIS_16_DTPREL, R_CRIS_DTPMOD)
(R_CRIS_32_GOT_TPREL, R_CRIS_16_GOT_TPREL, R_CRIS_32_TPREL)
(R_CRIS_16_TPREL): New relocations.
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* elf/dwarf2.h (DW_OP_GNU_encoded_addr): New.
binutils/
* dwarf.c (size_of_encoded_value, get_encoded_value): Move up.
(decode_location_expression): Add section parameter. Handle
DW_OP_GNU_encoded_addr.
(read_and_display_attr_value): Update decode_location_expression call.
(display_debug_loc, display_debug_frames): Likewise.
gas/
* dw2gencfi.c (DWARF2_ADDR_SIZE): Provide default.
(struct cfi_insn_data): Add ea member.
(CFI_val_encoded_addr, dot_cfi_val_encoded_addr): New.
(output_cfi_insn): Handle CFI_val_encoded_addr.
(select_cie_for_fde): Don't match CFI_val_encoded_addr.
* doc/as.texinfo (.cfi_val_encoded_addr): Document.
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Use C style comment.
(ld_plugin_api_version, ld_plugin_output_file_type,
ld_plugin_symbol_kind, ld_plugin_symbol_visibility,
ld_plugin_symbol_resolution, ld_plugin_level, ld_plugin_tag): Remove
comma from the last item.
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include/:
* plugin-api.h: New file.
gold/:
* configure.ac (plugins): Add --enable-plugins option.
* configure: Regenerate.
* config.in: Regenerate.
* Makefile.am (LIBDL): New variable.
(CCFILES): Add plugin.cc.
(HFILES): Add plugin.h.
(ldadd_var): Add LIBDL.
* Makefile.in: Regenerate.
* archive.cc: Include "plugin.h".
(Archive::setup): Don't preread archive symbols when using a plugin.
(Archive::get_file_and_offset): Add memsize parameter. Change callers.
(Archive::get_elf_object_for_member): Call plugin hooks for claiming
files.
(Archive::include_member): Add symbols from plugin objects.
* archive.h (Archive::get_file_and_offset): Add memsize parameter.
* descriptors.cc (Descriptors::open): Check for file descriptors
abandoned by plugins.
(Descriptors::claim_for_plugin): New function.
* descriptors.h (Descriptors::claim_for_plugin): New function.
(Open_descriptor::is_claimed): New field.
(claim_descriptor_for_plugin): New function.
* fileread.cc (File_read::claim_for_plugin): New function.
* fileread.h (File_read::claim_for_plugin): New function.
(File_read::descriptor): New function.
* gold.cc: Include "plugin.h".
(queue_initial_tasks): Add task to call plugin hooks for generating
new object files.
* main.cc: Include "plugin.h".
(main): Load plugin libraries.
* object.h (Pluginobj): Declare.
(Object::pluginobj): New function.
(Object::do_pluginobj): New function.
(Object::set_target): New function.
* options.cc: Include "plugin.h".
(General_options::parse_plugin): New function.
(General_options::General_options): Initialize plugins_ field.
(General_options::add_plugin): New function.
* options.h (Plugin_manager): Declare.
(General_options): Add --plugin option.
(General_options::has_plugins): New function.
(General_options::plugins): New function.
(General_options::add_plugin): New function.
(General_options::plugins_): New field.
* plugin.cc: New file.
* plugin.h: New file.
* readsyms.cc: Include "plugin.h".
(Read_symbols::do_read_symbols): Check for archive before checking
for ELF file. Call plugin hooks to claim files.
* resolve.cc (Symbol_table::resolve): Record when symbol is referenced
from a real object file; force override when processing replacement
files.
* symtab.cc (Symbol::init_fields): Initialize in_real_elf_ field.
(Symbol::init_base_object): Likewise.
(Symbol::init_base_output_data): Likewise.
(Symbol::init_base_output_segment): Likewise.
(Symbol::init_base_constant): Likewise.
(Symbol::init_base_undefined): Likewise.
(Symbol::output_section): Assert that object is not a plugin.
(Symbol_table::add_from_pluginobj): New function.
(Symbol_table::sized_finalize_symbol): Treat symbols from plugins as
undefined.
(Symbol_table::sized_write_globals): Likewise.
(Symbol_table::add_from_pluginobj): Instantiate template.
* symtab.h (Sized_pluginobj): Declare.
(Symbol::in_real_elf): New function.
(Symbol::set_in_real_elf): New function.
(Symbol::in_real_elf_): New field.
(Symbol_table::add_from_pluginobj): New function.
* testsuite/Makefile.am (AM_CFLAGS): New variable.
(LIBDL): New variable.
(LDADD): Add LIBDL.
(check_PROGRAMS): Add plugin_test_1 and plugin_test_2.
(check_SCRIPTS): Add plugin_test_1.sh and plugin_test_2.sh.
(check_DATA): Add plugin_test_1.err and plugin_test_2.err.
(MOSTLYCLEANFILES): Likewise.
* testsuite/Makefile.in: Regenerate.
* testsuite/plugin_test.c: New file.
* testsuite/plugin_test_1.sh: New file.
* testsuite/plugin_test_2.sh: New file.
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* stab.def: Add BNSYM, ENSYM, OSO for darwin.
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2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-ia64.c (CR_IIB0): New.
(CR_IIB1): Likewise.
(cr): Add cr.iib0 and cr.iib1.
(specify_resource): Handle IA64_RS_CR_IIB and CR_IIB0/CR_IIB1.
gas/testsuite/
2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
* gas/ia64/dv-raw-err.s: Add tests for cr.iib0 and cr.iib1.
* gas/ia64/dv-waw-err.s: Likewise.
* gas/ia64/regs.s: Likewise.
* gas/ia64/dv-raw-err.l: Updated.
* gas/ia64/dv-waw-err.l: Likewise.
* gas/ia64/regs.d: Likewise.
include/opcode/
2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
* ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update
IA64_RS_CR.
opcodes/
2008-08-28 H.J. Lu <hongjiu.lu@intel.com>
* ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
* ia64-gen.c (lookup_specifier): Likewise.
* ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
* ia64-raw.tbl: Likewise.
* ia64-waw.tbl: Likewise.
* ia64-asmtab.c: Regenerated.
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#include <fcntl.h> or <stdio.h>.
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bfd/
* elf-bfd.h (elf_object_id): Add XTENSA_ELF_TDATA.
* elf32-xtensa.c (elf_howto_table): Add TLS relocations.
(elf_xtensa_reloc_type_lookup): Likewise.
(TCB_SIZE): Define.
(elf_xtensa_link_hash_entry): New.
(GOT_UNKNOWN, GOT_NORMAL, GOT_TLS_GD, GOT_TLS_IE, GOT_TLS_ANY): Define.
(elf_xtensa_hash_entry): Define.
(elf_xtensa_obj_tdata): New.
(elf_xtensa_tdata): Define.
(elf_xtensa_local_got_tls_type): Define.
(elf_xtensa_local_tlsfunc_refcounts): Define.
(is_xtensa_elf): Define.
(elf_xtensa_mkobject): New.
(elf_xtensa_link_hash_table): Add tlsbase field.
(elf_xtensa_link_hash_newfunc): New.
(elf_xtensa_link_hash_table_create): Use elf_xtensa_link_hash_newfunc.
Create an entry for "_TLS_MODULE_BASE_" and save it in tlsbase field.
(elf_xtensa_copy_indirect_symbol): New.
(elf_xtensa_check_relocs): Rewrite to handle TLS relocations.
(elf_xtensa_gc_sweep_hook): Likewise.
(elf_xtensa_allocate_dynrelocs): Optimize away GOT entries for
TLSDESC_FN relocations when an IE reference is seen.
(elf_xtensa_allocate_local_got_size): Likewise.
(elf_xtensa_always_size_sections): New.
(dtpoff_base, tpoff): New.
(elf_xtensa_do_reloc): Handle TLS relocations.
(replace_tls_insn): New.
(IS_XTENSA_TLS_RELOC): Define.
(elf_xtensa_relocate_section): Handle TLS relocations.
(get_indirect_call_dest_reg): New.
(bfd_elf32_mkobject): Define.
(elf_backend_always_size_sections): New.
(elf_backend_copy_indirect_symbol): New.
* reloc.c (BFD_RELOC_XTENSA_TLSDESC_FN, BFD_RELOC_XTENSA_TLSDESC_ARG)
(BFD_RELOC_XTENSA_TLS_DTPOFF, BFD_RELOC_XTENSA_TLS_TPOFF)
(BFD_RELOC_XTENSA_TLS_FUNC, BFD_RELOC_XTENSA_TLS_ARG)
(BFD_RELOC_XTENSA_TLS_CALL): New.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/
* config/tc-xtensa.c (O_tlsfunc, O_tlsarg, O_tlscall): Define.
(O_tpoff, O_dtpoff): Define.
(suffix_relocs): Add entries for TLS suffixes.
(xtensa_elf_cons): Check for invalid use of TLS relocations.
(map_operator_to_reloc): Add is_literal parameter and use it to
control translating TLS instruction relocations to the corresponding
literal relocations.
(xg_valid_literal_expression): Allow TLS operators.
(xg_build_to_insn): Copy TLS operators from pseudo-instruction
operands to generated literals.
(xg_assemble_literal): Handle TLS operators. Update call to
map_operator_to_reloc.
(md_assemble): Handle CALLXn.TLS pseudo-instruction.
(md_apply_fix): Handle TLS relocations.
(emit_single_op): Handle TLS operators.
(convert_frag_immed): Update call to map_operator_to_reloc.
(vinsn_to_insnbuf): Emit relocations for TLS-related instructions.
* config/xtensa-istack.h (tinsn_struct): Add tls_reloc field.
* config/xtensa-relax.c (append_literal_op): Add src_op parameter
to initialize the op_data field of the BuildOp.
(build_transition): Use it here to record the source operand
corresponding to a generated literal.
* config/xtensa-relax.h (build_op): Comment op_data use for literals.
include/elf/
* xtensa.h (R_XTENSA_TLSDESC_FN, R_XTENSA_TLSDESC_ARG)
(R_XTENSA_TLS_DTPOFF, R_XTENSA_TLS_TPOFF, R_XTENSA_TLS_FUNC)
(R_XTENSA_TLS_ARG, R_XTENSA_TLS_CALL): New.
ld/testsuite/
* ld-xtensa/tlsbin.dd, ld-xtensa/tlsbin.rd, ld-xtensa/tlsbin.s,
ld-xtensa/tlsbin.sd, ld-xtensa/tlsbin.td, ld-xtensa/tlslib.s,
ld-xtensa/tlspic.dd, ld-xtensa/tlspic.rd, ld-xtensa/tlspic.sd,
ld-xtensa/tlspic.td, ld-xtensa/tlspic1.s, ld-xtensa/tlspic2.s: New.
* ld-xtensa/xtensa.exp: Run them.
|
|
* bfd.c (struct _bfd): Correct outsymbols comment.
* bfd-in2.h: Regenerate.
* linker.c (bfd_generic_link_read_symbols): Renamed from..
(generic_link_read_symbols): ..this, and made global.
include/
* bfdlink.h (bfd_generic_link_read_symbols): Declare.
ld/
PR 6478
* ldcref.c (check_local_sym_xref): Use bfd_generic_link_read_symbols.
Don't free symbol pointer array.
(check_refs): Likewise.
* ldmain.c (warning_callback): Likewise.
* ldmisc.c (vfinfo): Likewise.
* pe-dll.c (process_def_file): Likewise.
(pe_walk_relocs_of_symbol, generate_reloc): Likewise.
* emultempl/pe.em (pe_find_data_imports): Likewise.
(gld_${EMULATION_NAME}_after_open): Likewise.
* emultempl/pep.em (pep_find_data_imports): Likewise.
(gld_${EMULATION_NAME}_after_open): Likewise.
* ldlang.h (lang_input_statement_type): Delete asymbols, symbol_count,
passive_position, closed.
* ldlang.c (new_afile): Don't set asymbols and symbol_count.
* ldmain.c (add_archive_element): xcalloc lang_input_statement_type.
|
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bfd/
* archures.c (bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35,
bfd_mach_avr51): New.
* bfd-in2.h: Regenerate.
* cpu-avr.c (arch_info_struct): Add avr25, avr31, avr35, and avr51
architectures. Change comments to match architecture comments in GCC.
(compatible): Add test for new AVR architectures.
* elf32-avr.c (bfd_elf_avr_final_write_processing): Recognize
bfd_mach_avr25, bfd_mach_avr31, bfd_mach_avr35 and bfd_mach_avr51.
(elf32_avr_object_p): Recognize E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35 and E_AVR_MACH_AVR51.
gas/
* config/tc-avr.c (mcu_types): Add avr25, avr31, avr35, and avr51
architectures. Reorganize list to put mcu types in correct architectures
and to order list same as in GCC. Use new ISA definitions in
include/opcode/avr.h.
* doc/c-avr.texi: Add avr25, avr31, avr35, and avr51 architecture
descriptions. Reorganize descriptions to put mcu types in correct
architectures and to order lists same as in GCC.
include/
* elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31,
E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define.
(EF_AVR_MACH): Redefine to 0x7F.
* opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove.
(AVR_ISA_AVR3): Redefine.
(AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35,
AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51,
AVR_ISA_AVR6): Define.
ld/
* Makefile.am (ALL_EMULATIONS): Add eavr25.o, eavr31.o, eavr35.o,
and eavr51.o.
Add rules for eavr25.c, eavr31.c, eavr35.c, eavr51.c.
* Makefile.in: Regenerate.
* configure.tgt (avr-*-*, targ_extra_emuls): Add avr25, avr31, avr35
and avr51.
* emulparams/avr25.sh: New file.
* emulparams/avr31.sh: New file.
* emulparams/avr35.sh: New file.
* emulparams/avr51.sh: New file.
|
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Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>
* elf32-mips.c (mips_vxworks_copy_howto_rela): Replace with...
(elf_mips_copy_howto): ...this howto. Clear the size fields.
(mips_vxworks_jump_slot_howto_rela): Replace with...
(elf_mips_jump_slot_howto): ...this howto.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_plt_readonly): Define.
(elf_backend_plt_sym_val): Define for non-VxWorks targets.
(mips_vxworks_bfd_reloc_type_lookup): Delete.
(mips_vxworks_bfd_reloc_name_lookup): Likewise.
(mips_vxworks_rtype_to_howto): Likewise.
(elf_backend_want_dynbss): Don't define for VxWorks.
(elf_backend_plt_readonly): Likewise.
(bfd_elf32_bfd_reloc_type_lookup): Likewise.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(elf_backend_mips_rtype_to_howto): Likewise.
(elf_backend_adjust_dynamic_symbol): Likewise.
(elf_backend_got_symbol_offset): Don't define.
* elfn32-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf32_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf32_n32_rtype_to_howto): Handle R_MIPS_COPY and
R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elf64-mips.c (elf_mips_copy_howto, elf_mips_jump_slot_howto): New.
(bfd_elf64_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS_COPY
and BFD_RELOC_MIPS_JUMP_SLOT.
(bfd_elf64_bfd_reloc_name_lookup): Handle "R_MIPS_COPY" and
"R_MIPS_JUMP_SLOT".
(mips_elf64_rtype_to_howto): Handle R_MIPS_COPY and R_MIPS_JUMP_SLOT.
(elf_backend_rela_plts_and_copies_p, elf_backend_plt_readonly)
(elf_backend_plt_sym_val): Define.
* elfxx-mips.h (_bfd_mips_vxworks_adjust_dynamic_symbol): Delete.
(_bfd_mips_elf_use_plts_and_copy_relocs, _bfd_mips_elf_init_stubs)
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): Declare.
* elfxx-mips.c (mips_elf_la25_stub): New structure.
(LA25_LUI, LA25_J, LA25_ADDIU): New macros.
(mips_elf_link_hash_entry): Add "la25_stubs", "has_static_relocs"
and "has_nonpic_branches" fields. Remove "is_relocation_target" and
"is_branch_target".
(mips_elf_link_hash_table): Add blank lines. Add
"use_plts_and_copy_relocs", "reserved_gotno", "strampoline",
"la25_stubs" and "add_stub_section" fields.
(mips_htab_traverse_info): New structure.
(PIC_OBJECT_P, MIPS_ELF_LOAD_WORD): New macros.
(MIPS_RESERVED_GOTNO): Delete.
(mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry)
(mips_n64_exec_plt0_entry, mips_exec_plt_entry): New tables.
(mips_elf_link_hash_newfunc): Update after the changes to
mips_elf_link_hash_entry.
(mips_elf_check_mips16_stubs): Replace the DATA parameter with
an INFO parameter. Don't look through warnings symbols here;
do it in mips_elf_check_symbols instead.
(mips_elf_create_stub_symbol): New function.
(mips_elf_la25_stub_hash, mips_elf_la25_stub_eq): New functions.
(_bfd_mips_elf_init_stubs, mips_elf_local_pic_function_p): Likewise.
(mips_elf_add_la25_intro, mips_elf_add_la25_trampoline): Likewise.
(mips_elf_add_la25_stub, mips_elf_check_symbols): New functions.
(mips_elf_gotplt_index): Check for VxWorks.
(mips_elf_output_dynamic_relocation): Take the relocation index
as an extra parameter. Do not increment reloc_count here.
(mips_elf_initialize_tls_slots): Update the calls to
mips_elf_output_dynamic_relocation accordingly.
(mips_elf_multi_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(mips_elf_create_got_section): Don't allocate reserved GOT
entries here. Unconditionally create .got.plt, but don't
set its alignment here.
(mips_elf_relocation_needs_la25_stub): New function.
(mips_elf_calculate_relocation): Redirect branches and jumps to
a non-PIC stub if one exists. Check !h->has_static_relocs instead
of !htab->is_vxworks when deciding whether to create dynamic
relocations for R_MIPS_32, R_MIPS_REL32 and R_MIPS_64.
(_bfd_mips_elf_create_dynamic_sections): Unconditionally call
_bfd_elf_create_dynamic_sections. Unconditionally set up
htab->splt and htab->sdynbss. Set htab->srelplt to ".rel.plt"
if !htab->is_vxworks. Add non-VxWorks values of
htab->plt_header_size and htab->plt_entry_size.
(_bfd_mips_elf_check_relocs): Set pointer_equality_needed for
non-branch static relocations. Set has_nonpic_branches when an la25
stub might be required. Set can_make_dynamic_p to TRUE if R_MIPS_32,
R_MIPS_REL32 and R_MIPS_64 relocations can be made dynamic,
rather than duplicating the condition. Do not make them dynamic
for read-only sections in non-PIC executable objects.
Do not protect this code with dynobj == NULL || htab->sgot == NULL;
handle each group of cases separately. Add a default case that
sets has_static_relocs for non-GOT relocations that cannot be
made dynamic. Don't set is_relocation_target and is_branch_target.
Reject non-PIC static relocations in shared objects.
(_bfd_mips_vxworks_adjust_dynamic_symbol): Fold into...
(_bfd_mips_elf_adjust_dynamic_symbol): ...here, using
htab->use_plts_and_copy_relocs instead of htab->is_vxworks
to select PLT and copy-reloc handling. Set the alignment of
.plt and .got.plt when allocating the first entry. Generalize
code to handle REL as well as RELA sections and 64-bit as well as
32-bit GOT entries. Complain if we find a static-only reloc
against an externally-defined symbol and if we cannot create
dynamic relocations for it. Allocate copy relocs using
mips_elf_allocate_dynamic_relocations on non-VxWorks targets.
Set possibly_dynamic_relocs to 0 when using PLTs or copy relocs.
Skip reserved .got.plt entries.
(_bfd_mips_elf_always_size_sections): Use mips_elf_check_symbols
instead of mips_elf_check_mips16_stubs to process each symbol.
Do the traversal for relocatable objects too.
(mips_elf_lay_out_got): Use htab->reserved_gotno instead of
MIPS_RESERVED_GOTNO.
(_bfd_mips_elf_size_dynamic_sections): Exclude sdynbss if it
is empty. Extend the DT_PLTREL, DT_JMPREL and DT_PLTRELSZ handling
to non-VxWorks targets. Only add DT_REL{,A}, DT_REL{,A}SZ and
DT_REL{,A}ENT if .rel.dyn is nonempty. Create a symbol for the
PLT. Allocate a nop at the end of the PLT. Allocate DT_MIPS_PLTGOT.
(mips_elf_create_la25_stub_info): New function.
(_bfd_mips_elf_finish_dynamic_symbol): Write out PLT entries
and copy relocs where necessary. Check pointer_equality_needed.
(mips_finish_exec_plt): New function.
(_bfd_mips_elf_finish_dynamic_sections): Always set DT_PLTGOT
to the beginning of htab->sgot. Use htab->reserved_gotno instead
of MIPS_RESERVED_GOTNO. Assert htab->use_plts_and_copy_relocs
instead of htab->is_vxworks for DT_PLTREL, DT_PLTRELSZ and DT_JMPREL.
Set DT_PLTREL to DT_REL instead of DT_RELA on non-VxWorks targets.
Use mips_finish_exec_plt to create non-VxWorks PLT headers. Set
DT_MIPS_PLTGOT.
(_bfd_mips_elf_copy_indirect_symbol): Copy has_static_relocs
from the indirect symbol to the direct symbol. Also copy
has_nonpic_branches for indirect symbols.
(_bfd_mips_elf_get_target_dtag): Handle DT_MIPS_PLTGOT and
DT_MIPS_RWPLT.
(_bfd_mips_elf_link_hash_table_create): Initialize the new
mips_elf_link_hash_table fields.
(_bfd_mips_vxworks_link_hash_table_create): Set
use_plts_and_copy_relocs to TRUE. Use TRUE rather than 1
when setting is_vxworks.
(_bfd_mips_elf_use_plts_and_copy_relocs): New function.
(_bfd_mips_elf_final_link): Call mips_elf_create_la25_stub for
each la25_stub.
(_bfd_mips_elf_merge_private_bfd_data): Treat dynamic objects
as PIC. Generalize message about linking PIC and non-PIC.
(_bfd_mips_elf_plt_sym_val, _bfd_mips_post_process_headers): New
functions.
* reloc.c: Update comment near BFD_RELOC_MIPS_JUMP_SLOT.
* bfd-in2.h: Regenerated.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* readelf.c (get_mips_symbol_other): Handle STO_MIPS_PLT and
STO_MIPS_PIC.
(slurp_rela_relocs, slurp_rel_relocs): Handle MIPS ELF64 here.
(dump_relocations, debug_apply_relocations): Don't handle it here.
(get_mips_dynamic_type): Handle DT_MIPS_PLTGOT and DT_MIPS_RWPLT.
(print_mips_pltgot_entry): New function.
(process_mips_specific): Dump the PLT GOT.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* config/tc-mips.c (OPTION_CALL_NONPIC): New macro.
(OPTION_NON_SHARED, OPTION_XGOT, OPTION_MABI, OPTION_32)
(OPTION_N32, OPTION_64, OPTION_MDEBUG, OPTION_NO_MDEBUG)
(OPTION_PDR, OPTION_NO_PDR, OPTION_MVXWORKS_PIC): Bump by 1.
(md_longopts): Add -call_nonpic.
(md_parse_option): Handle OPTION_CALL_NONPIC.
(md_show_usage): Add -call_nonpic.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
* gas/mips/call-nonpic-1.s, gas/mips/call-nonpic-1.d: New test.
* gas/mips/mips.exp: Run it.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
* mips.h (STO_MIPS_PLT, ELF_ST_IS_MIPS_PLT, ELF_ST_SET_MIPS_PLT)
(STO_MIPS_PIC, DT_MIPS_PLTGOT, DT_MIPS_RWPLT): New macros.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* emulparams/elf32bmip.sh (GOT): Define, moving .got.plt to...
(OTHER_RELRO_SECTIONS, OTHER_READWRITE_SECTIONS): ...one of these
two variables.
* emulparams/elf32bmipn32-defs.sh: Likewise.
* emultempl/mipself.em: Include ldctor.h, elf/mips.h and elfxx-mips.h.
(is_mips_elf): New macro.
(stub_file, stub_bfd): New variables.
(hook_stub_info): New structure.
(hook_in_stub): New function.
(mips_add_stub_section): Likewise.
(mips_create_output_section_statements): Likewise.
(mips_before_allocation): Likewise.
(real_func): New variable.
(mips_for_each_input_file_wrapper): New function.
(mips_lang_for_each_input_file): Likewise.
(lang_for_each_input_file): Define.
(LDEMUL_BEFORE_ALLOCATION): Likewise.
(LDEMUL_CREATE_OUTPUT_SECTION_STATEMENTS): Likewise.
2008-08-08 Richard Sandiford <rdsandiford@googlemail.com>
Daniel Jacobowitz <dan@codesourcery.com>
* ld-mips-elf/mips16-pic-3a.s,
ld-mips-elf/mips16-pic-3b.s,
ld-mips-elf/mips16-pic-3.dd,
ld-mips-elf/mips16-pic-3.gd,
ld-mips-elf/mips16-pic-3.rd,
ld-mips-elf/mips16-pic-3.inc,
ld-mips-elf/pic-and-nonpic-1a.s,
ld-mips-elf/pic-and-nonpic-1b.s,
ld-mips-elf/pic-and-nonpic-1.ld,
ld-mips-elf/pic-and-nonpic-1.dd,
ld-mips-elf/pic-and-nonpic-1.nd,
ld-mips-elf/pic-and-nonpic-1-rel.dd,
ld-mips-elf/pic-and-nonpic-1-rel.nd,
ld-mips-elf/pic-and-nonpic-2a.s,
ld-mips-elf/pic-and-nonpic-2b.s,
ld-mips-elf/pic-and-nonpic-2.d,
ld-mips-elf/pic-and-nonpic-3a.s,
ld-mips-elf/pic-and-nonpic-3a.ld,
ld-mips-elf/pic-and-nonpic-3a.dd,
ld-mips-elf/pic-and-nonpic-3a.gd,
ld-mips-elf/pic-and-nonpic-3a.sd,
ld-mips-elf/pic-and-nonpic-3b.s,
ld-mips-elf/pic-and-nonpic-3b.ld,
ld-mips-elf/pic-and-nonpic-3b.ad,
ld-mips-elf/pic-and-nonpic-3b.dd,
ld-mips-elf/pic-and-nonpic-3b.gd,
ld-mips-elf/pic-and-nonpic-3b.nd,
ld-mips-elf/pic-and-nonpic-3b.pd,
ld-mips-elf/pic-and-nonpic-3b.rd,
ld-mips-elf/pic-and-nonpic-3b.sd,
ld-mips-elf/pic-and-nonpic-3-error.d,
ld-mips-elf/pic-and-nonpic-4a.s,
ld-mips-elf/pic-and-nonpic-4b.s,
ld-mips-elf/pic-and-nonpic-4b.ld,
ld-mips-elf/pic-and-nonpic-4b.ad,
ld-mips-elf/pic-and-nonpic-4b.dd,
ld-mips-elf/pic-and-nonpic-4b.gd,
ld-mips-elf/pic-and-nonpic-4b.nd,
ld-mips-elf/pic-and-nonpic-4b.rd,
ld-mips-elf/pic-and-nonpic-4b.sd,
ld-mips-elf/pic-and-nonpic-4-error.d,
ld-mips-elf/pic-and-nonpic-5a.s,
ld-mips-elf/pic-and-nonpic-5b.s,
ld-mips-elf/pic-and-nonpic-5b.ld,
ld-mips-elf/pic-and-nonpic-5b.ad,
ld-mips-elf/pic-and-nonpic-5b.dd,
ld-mips-elf/pic-and-nonpic-5b.gd,
ld-mips-elf/pic-and-nonpic-5b.nd,
ld-mips-elf/pic-and-nonpic-5b.rd,
ld-mips-elf/pic-and-nonpic-5b.sd,
ld-mips-elf/pic-and-nonpic-5b.pd,
ld-mips-elf/pic-and-nonpic-6.ld,
ld-mips-elf/pic-and-nonpic-6-o32a.s,
ld-mips-elf/pic-and-nonpic-6-o32b.s,
ld-mips-elf/pic-and-nonpic-6-o32c.s,
ld-mips-elf/pic-and-nonpic-6-o32.ad,
ld-mips-elf/pic-and-nonpic-6-o32.dd,
ld-mips-elf/pic-and-nonpic-6-o32.gd,
ld-mips-elf/pic-and-nonpic-6-o32.nd,
ld-mips-elf/pic-and-nonpic-6-o32.pd,
ld-mips-elf/pic-and-nonpic-6-o32.rd,
ld-mips-elf/pic-and-nonpic-6-o32.sd,
ld-mips-elf/pic-and-nonpic-6-n32a.s,
ld-mips-elf/pic-and-nonpic-6-n32b.s,
ld-mips-elf/pic-and-nonpic-6-n32c.s,
ld-mips-elf/pic-and-nonpic-6-n32.ad,
ld-mips-elf/pic-and-nonpic-6-n32.dd,
ld-mips-elf/pic-and-nonpic-6-n32.gd,
ld-mips-elf/pic-and-nonpic-6-n32.nd,
ld-mips-elf/pic-and-nonpic-6-n32.pd,
ld-mips-elf/pic-and-nonpic-6-n32.rd,
ld-mips-elf/pic-and-nonpic-6-n32.sd,
ld-mips-elf/pic-and-nonpic-6-n64a.s,
ld-mips-elf/pic-and-nonpic-6-n64b.s,
ld-mips-elf/pic-and-nonpic-6-n64c.s,
ld-mips-elf/pic-and-nonpic-6-n64.ad,
ld-mips-elf/pic-and-nonpic-6-n64.dd,
ld-mips-elf/pic-and-nonpic-6-n64.gd,
ld-mips-elf/pic-and-nonpic-6-n64.nd,
ld-mips-elf/pic-and-nonpic-6-n64.pd,
ld-mips-elf/pic-and-nonpic-6-n64.rd,
ld-mips-elf/pic-and-nonpic-6-n64.sd: New tests.
* ld-mips-elf/mips-elf.exp: Run them.
|
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|
* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags.
Handle -mvsx and -mpower7.
(md_show_usage): Document -mpower7 and -mvsx.
* doc/as.texinfo (Target PowerPC): Document -mvsx.
* doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7.
gas/testsuite/
* gas/ppc/power7.d: New.
* gas/ppc/power7.s: Likewise.
* gas/ppc/ppc.exp: Run power7 test.
include/opcode/
* ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New.
opcodes/
* ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
(print_insn_powerpc): Prepend 'vs' when printing VSX registers.
(print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
* ppc-opc.c (insert_xt6): New static function.
(extract_xt6): Likewise.
(insert_xa6): Likewise.
(extract_xa6: Likewise.
(insert_xb6): Likewise.
(extract_xb6): Likewise.
(insert_xb6s): Likewise.
(extract_xb6s): Likewise.
(XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
XX3DM_MASK, PPCVSX): New.
(powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
"stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
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* ppc.h (PPC_OPCODE_405): Define.
(PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI): Define.
gas/
* config/tc-ppc.c (parse_cpu): Separate handling of -m403/405.
(md_show_usage): Likewise.
opcodes/
* ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
* ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
(insert_sprg, PPC405): Use PPC_OPCODE_405.
(powerpc_opcodes): Add Xilinx APU related opcodes.
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* bfd/elf.c (elfcore_grok_ppc_vsx): New function.
(elfcore_write_ppc_vsx): New function
(elfcore_grok_note): Handle VSX notes.
(elfcore_write_register_note): Handle VSX notes.
* include/elf/common.h: Define NT_PPC_VSX.
* binutils/readelf.c (get_note_type): Handle VSX notes.
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* elf.c (_bfd_elf_map_sections_to_segments): Don't put
executable sections into the same segment with other
read only sections if --sep-code.
* elf32-bfin.c (elf32_bfin_code_in_l1): New variable.
(elf32_bfin_data_in_l1): New variable.
(elf32_bfin_final_write_processing): New.
(elf32_bfin_special_sections[]): New.
(elf_backend_final_write_processing): Define.
(elf_backend_special_sections): Define.
binutils/
* readelf.c (get_machine_flags): Deal with Blackfin specific
flags.
include/
* bfdlink.h (struct bfd_link_info): Add sep_code member
variable.
* elf/bfin.h (EF_BFIN_CODE_IN_L1): Define.
(EF_BFIN_DATA_IN_L1): Define.
ld/
* Makefile.am (eelf32bfin.c): Depend on bfin.em.
(eelf32bfinfd.c): Likewise.
* Makefile.in: Regenerate.
* gen-doc.texi: Set Blackfin.
* ld.texinfo: Document --sep-code and Blackfin specific
options.
* ldmain.c (main): Initialize link_info.sep_code.
* lexsup.c (enum option_values): Add OPTION_SEP_CODE.
(ld_options[]): Add --sep-code.
(parse_args): Deal with --sep-code.
* emulparams/bfin.sh (EXTRA_EM_FILE): Define.
* emulparams/elf32bfinfd.sh (OTHER_SECTIONS): Define.
* emultempl/bfin.em: New file.
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* mips.h (ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): New macros.
bfd/
* elfxx-mips.c (mips_elf_check_mips16_stubs): Use ELF_ST_IS_MIPS16.
(mips_elf_calculate_relocation): Likewise.
(_bfd_mips_elf_add_symbol_hook): Likewise.
(_bfd_mips_elf_finish_dynamic_symbol): Likewise.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
opcodes/
* mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
gas/
* config/tc-mips.c (mips16_mark_labels): Use ELF_ST_SET_MIPS16.
(mips_fix_adjustable): Likewise.
(mips_frob_file_after_relocs): Likewise.
gas/testsuite/
* gas/mips/mips16-vis-1.d, gas/mips/mips16-vis-1.s: New tests.
* gas/mips/mips.exp: Run them.
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* dis-asm.h (struct disassemble_info): Add endian_code field.
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the ctype.h macros.
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included. Redefine the various macros provided by ctype.h as
undefined variables.
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(EM_CR16): Rename to EM_CR16_OLD.
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(EM_CR16): Rename to EM_CR16_OLD.
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* ti.h (GET_SCNHDR_NLNNO): Provide an alternative version of this
macro which does not trigger an array bounds warning in gcc.
(PUT_SCNHDR_NLNNO): Likewise.
(GET_SCNHDR_FLAGS): Likewise.
(PUT_SCNHDR_FLAGS): Likewise.
(GET_SCNHDR_PAGE): Likewise.
(PUT_SCNHDR_PAGE): Likewise.
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* ppc.h (ppc_cpu_t): New typedef.
(struct powerpc_opcode <flags>): Use it.
(struct powerpc_operand <insert, extract>): Likewise.
(struct powerpc_macro <flags>): Likewise.
gas/
* config/tc-ppc.c (ppc_cpu): Use ppc_cpu_t typedef.
(ppc_insert_operand): Likewise.
(ppc_machine): Likewise.
* config/tc-ppc.h: #include "opcode/ppc.h"
(struct _ppc_fix_extra <ppc_cpu>): Use ppc_cpu_t typedef.
(ppc_cpu): Update extern decl.
opcodes/
* ppc-dis.c (print_insn_powerpc): Update prototye to use new
ppc_cpu_t typedef.
(struct dis_private): New.
(POWERPC_DIALECT): New define.
(powerpc_dialect): Renamed to...
(powerpc_init_dialect): This. Update to use ppc_cpu_t and
struct dis_private.
(print_insn_big_powerpc): Update for using structure in
info->private_data.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
(skip_optional_operands): Likewise.
(print_insn_powerpc): Likewise. Remove initialization of dialect.
* ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
param to be of type ppc_cpu_t. Update prototype.
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