| Age | Commit message (Collapse) | Author |
|---|
|
|
|
Contributor list:
- Lifang Xia <lifang_xia@c-sky.com>
- Jojo R <jiejie_rong@c-sky.com>
- Xianmiao Qu <xianmiao_qu@c-sky.com>
- Yunhai Shang <yunhai_shang@c-sky.com>
|
|
The previous fenv support for ARM used the soft-float implementation of
FreeBSD. Newlib uses the one from libgcc by default. They are not
compatible. Having an GCC incompatible soft-float fenv support in
Newlib makes no sense. A long-term solution could be to provide a
libgcc compatible soft-float support. This likely requires changes in
the GCC configuration. For now, provide a stub implementation for
soft-float multilibs similar to RISC-V.
Move implementation to one file and delete now unused files. Hide
implementation details. Remove function parameter names from header
file to avoid name conflicts.
Provide VFP support if __SOFTFP__ is not defined like glibc.
Reviewed-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Signed-off-by: Eshan dhawan <eshandhawan51@gmail.com>
|
|
This patch fixes a bug in RISC-V's memcpy implementation where an
integer wraparound occurs when src + size < 8 * sizeof(long), causing
the word-sized copy loop to be incorrectly entered.
Signed-off-by: Chih-Mao Chen <cmchen@andestech.com>
|
|
Signed-off-by: Eshan dhawan <eshandhawan51@gmail.com>
|
|
Signed-off-by: Eshan dhawan <eshandhawan51@gmail.com>
|
|
Signed-off-by: Eshan dhawan <eshandhawan51@gmail.com>
|
|
Signed-off-by: Eshan dhawan <eshandhawan51@gmail.com>
|
|
Signed-off-by: Eshan dhawan <eshandhawan51@gmail.com>
|
|
Signed-off-by: Eshan dhawan <eshandhawan51@gmail.com>
|
|
Most code in newlib already uses unified syntax, but just a couple of
laggards remain. This patch removes these and means the the entire
code base has now been converted.
|
|
This edits licenses held by Berkeley and NetBSD, both of which
have removed the advertising requirement from their licenses.
Signed-off-by: Keith Packard <keithp@keithp.com>
|
|
|
|
If we had architecture-specific exception bits, we could just set them
to match the processor, but instead ieeefp.h is shared by all targets
so we need to map between the public values and the register contents.
Signed-off-by: Keith Packard <keithp@keithp.com>
|
|
This makes the fpsetround function actually do something rather than
just return -1 due to the default 'fall-through' behavior of the switch
statement.
Signed-off-by: Keith Packard <keithp@keithp.com>
|
|
Use fscsr and frcsr to store and read the FCSR register instead of
fssr and frsr.
Signed-off-by: Keith Packard <keithp@keithp.com>
|
|
|
|
We don't need to save/restore every register -- just those
we don't expect to be trashed by function calls.
|
|
These functions needs to save and restore the stack frame, because
that's where the return address is stored.
|
|
s[0:3] contain a descriptor used to set up the initial value of the
stack, but only the lower 48 bits of s[0:1] are currently used.
The reent marker is currently set in s3, but by stashing it in the
upper 16 bits of s[0:1] instead, s3 can be freed up for other purposes.
|
|
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
|
|
|
|
|
|
ARMv5 and above supports arm/thumb interworking using POP, so we can
improve the exit sequence in this case.
|
|
libc/include/fenv.h was a direct copy of this file.
|
|
|
|
|
|
Update the offsets used to save registers into the stejmp jmp_buf
structure in order to:
* Avoid writing the supervision register outside the buffer and thus
clobbering something on the stack. Previously the supervision register
was written at offset 124 while the buffer was of length 124.
* Shrink the jmp_buf down to the size actually needed, by avoiding holes
at the locations of omitted registers.
|
|
Invert equality check instruction to correct the return value handling
in longjmp.
The return value should be the value of the second argument to longjmp,
unless the argument value was 0 in which case it should be 1.
Previously, longjmp would set return value 1 if the second argument was
non-zero, and 0 if it was 0, which was incorrect.
|
|
From: Andrew Stubbs <ams@codesourcery.com>
Fix a bug in which the high-part of 64-bit values are being corrupted, leading
to erroneous stack overflow errors. The problem was only that the mixed-size
calculations are being treated as signed when they should be unsigned.
|
|
This patch adds implementations of memcpy, memmove, memset and strcmp
optimized for size. The changes have been tested in
riscv/riscv-gnu-toolchain by riscv-dejagnu with
riscv-sim.exp/riscv-sim-nano.exp.
|
|
"tiny" printf is derived from _vfprintf_r in libc/stdio/nano-vfprintf.c.
"tiny" puts has been implemented so that it just calls write, without
any other processing.
Support for buffering, reentrancy and streams has been removed from
these functions to achieve reduced code size.
This reduced code size implementation of printf and puts can be enabled
in an application by passing "--wrap printf" and "--wrap puts" to the
GNU linker. This will replace references to "printf" and "puts" in user
code with "__wrap_printf" and "__wrap_puts" respectively.
If there is no implementation of these __wrap* functions in user code,
these "tiny" printf and puts implementations will be linked into the
final executable.
The wrapping mechanism is supposed to be invisible to the user:
- A GCC wrapper option such as "-mtiny-printf" will be added to alias
these wrap commands.
- If the user is unaware of the "tiny" implementation, and chooses to
implement their own __wrap_printf and __wrap_puts, their own
implementation will be automatically chosen over the "tiny" printf and
puts from the library.
Newlib must be configured with --enable-newlib-nano-formatted-io for
the "tiny" printf and puts functions to be built into the library.
Code size reduction examples:
printf("Hello World\n")
baseline - msp430-elf-gcc gcc-8_3_0-release
text data bss
5638 214 26
"tiny" puts enabled
text data bss
714 90 20
printf("Hello %d\n", a)
baseline - msp430-elf-gcc gcc-8_3_0-release
text data bss
10916 614 28
"tiny" printf enabled
text data bss
4632 280 20
|
|
Use newlib/libc/stdio/nano-vfprintf.c as baseline for tiny-printf.c
|
|
These missing includes were causing build warnings, but also a real bug in
which the "size" parameter to "write" was being passed in 32-bit, whereas it
ought to be 64-bit. This led to intermittent bad behaviour.
|
|
Default math library configuration is now IEEE
|
|
Add support for the AMD GCN GPU architecture. This is primarily intended for
use with OpenMP and OpenACC offloading. It can also be used for stand-alone
programs, but this is intended mostly for testing the compiler and is not
expected to be useful in general.
The GPU architecture is highly parallel, and therefore Newlib must be
configured to use dynamic re-entrancy, and thread-safe malloc.
The only I/O available is a via a shared-memory interface provided by libgomp
and the gcn-run tool included with GCC. At this time this is limited to
stdout, argc/argv, and the return code.
|
|
|
|
This patch fixes an issue in the previous memset loop change. If the
zva size is >= 256 and there are more than 64 bytes left in the
tail, we could enter the loop and thus need to rebias dst by 32 as
well.
Since no known CPUs use this size this can't be tested natively, so I've
tested it on a simulator initialized with a large zva size.
--
|
|
This fixes an ineffiency in the non-zero memset. Delaying the writeback
until the end of the loop is slightly faster on some cores - this shows
~5% performance gain on Cortex-A53 when doing large non-zero memsets.
Tested against the GLIBC testsuite.
|
|
Move common content of the various <sys/dirent.h> and the latest FreeBSD
<dirent.h> to <dirent.h>.
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
|
|
for smaller and faster code.
|
|
This macro selects a compiler option that disables recognition of
common memset/memcpy patterns and converting those to direct
memset/memcpy calls.
Signed-off-by: Keith Packard <keithp@keithp.com>
|
|
Replace the simple byte-wise compare in the misaligned case with a
dword compare with page boundary checks in place. For simplicity I've
chosen a 4K page boundary so that we don't have to query the actual
page size on the system.
This results in up to 3x improvement in performance in the unaligned
case on falkor and about 2.5x improvement on mustang as measured using
bench-strcmp in glibc.
|
|
This improved memcmp provides a fast path for compares up to 16 bytes
and then compares 16 bytes at a time, thus optimizing loads from both
sources. The glibc memcmp microbenchmark retains performance (with an
error of ~1ns) for smaller compare sizes and reduces up to 31% of
execution time for compares up to 4K on the APM Mustang. On Qualcomm
Falkor this improves to almost 48%, i.e. it is almost 2x improvement
for sizes of 2K and above.
|
|
The mutually misaligned inputs on aarch64 are compared with a simple
byte copy, which is not very efficient. Enhance the comparison
similar to strcmp by loading a double-word at a time. The peak
performance improvement (i.e. 4k maxlen comparisons) due to this on
the strncmp microbenchmark in glibc is as follows:
falkor: 3.5x (up to 72% time reduction)
cortex-a73: 3.5x (up to 71% time reduction)
cortex-a53: 3.5x (up to 71% time reduction)
All mutually misaligned inputs from 16 bytes maxlen onwards show
upwards of 15% improvement and there is no measurable effect on the
performance of aligned/mutually aligned inputs.
|
|
- From: Cesar Philippidis <cesar@codesourcery.com>
Date: Tue, 10 Apr 2018 14:43:42 -0700
Subject: [PATCH] nvptx port
This port adds support for Nvidia GPU's, which are primarily used as
offload accelerators in OpenACC and OpenMP.
|
|
At least with Binutils 2.30 and GCC 7.3 we need symbol definitions
without the leading underscore.
Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
|
|
- major release required due to removal of K&R support
|
|
Signed-off-by: Yaakov Selkowitz <yselkowi@redhat.com>
|
|
Signed-off-by: Yaakov Selkowitz <yselkowi@redhat.com>
|
