From 95d64ccd4e4fd31d850f027fdc1030548e7a2d1e Mon Sep 17 00:00:00 2001 From: Andrew Haley Date: Tue, 22 Feb 2000 14:39:20 +0000 Subject: 1999-12-30 Andrew Haley * mips.h (OPCODE_IS_MEMBER): Add gp32 arg. --- include/opcode/mips.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'include/opcode/mips.h') diff --git a/include/opcode/mips.h b/include/opcode/mips.h index 8c93d1bd7..3f9207ff3 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -320,14 +320,18 @@ struct mips_opcode /* Toshiba R3900 instruction. */ #define INSN_3900 0x00000080 +/* 32-bit code running on a ISA3+ CPU. */ +#define INSN_GP32 0x00001000 + /* Test for membership in an ISA including chip specific ISAs. INSN is pointer to an element of the opcode table; ISA is the specified ISA to test against; and CPU is the CPU specific ISA to test, or zero if no CPU specific ISA test is desired. */ -#define OPCODE_IS_MEMBER(insn,isa,cpu) \ +#define OPCODE_IS_MEMBER(insn,isa,cpu,gp32) \ ((((insn)->membership & INSN_ISA) != 0 \ - && ((insn)->membership & INSN_ISA) <= isa) \ + && ((insn)->membership & INSN_ISA) <= isa \ + && ((insn)->membership & INSN_GP32 ? gp32 : 1)) \ || (cpu == 4650 \ && ((insn)->membership & INSN_4650) != 0) \ || (cpu == 4010 \ -- cgit v1.2.3