From 6c2c3ed2c9befaef5a6402388732c1c2057f1787 Mon Sep 17 00:00:00 2001 From: Miguel Pozo Date: Tue, 4 Oct 2022 13:31:59 +0200 Subject: Fix T101438: Wrong LOD selection after clamping the mip value (Nvidia) Fix for T101438 Clamping the mip seems to always set it to 9.0. I couldn't find an alternative way to avoid triggering the error (ie. min(mip, 9.0)). In any case, the results with this patch applied look the same to the (correct) ones on AMD. And, since clamping the max mip to a hardcoded value could result in resolution-depended behavior, I guess disabling the clamp should be ok anyway. Reviewed By: fclem Maniphest Tasks: T101438 Differential Revision: https://developer.blender.org/D16129 --- source/blender/draw/engines/eevee/shaders/ssr_lib.glsl | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'source/blender') diff --git a/source/blender/draw/engines/eevee/shaders/ssr_lib.glsl b/source/blender/draw/engines/eevee/shaders/ssr_lib.glsl index a563291bb90..ea227ea9efd 100644 --- a/source/blender/draw/engines/eevee/shaders/ssr_lib.glsl +++ b/source/blender/draw/engines/eevee/shaders/ssr_lib.glsl @@ -79,7 +79,10 @@ vec4 screen_space_refraction(vec3 vP, vec3 N, vec3 V, float ior, float roughness /* Texel footprint */ vec2 texture_size = vec2(textureSize(refractColorBuffer, 0).xy) / hizUvScale.xy; - float mip = clamp(log2(cone_footprint * max(texture_size.x, texture_size.y)), 0.0, 9.0); + float mip = log2(cone_footprint * max(texture_size.x, texture_size.y)); + + // Disabled. Causes incorrect LOD sampling on Nvidia cards. (T101438) + // mip = clamp(mip, 0.0, 9.0); vec3 spec = textureLod(refractColorBuffer, hit_uvs * hizUvScale.xy, mip).xyz; float mask = screen_border_mask(hit_uvs); -- cgit v1.2.3