diff options
author | David Crocker <dcrocker@eschertech.com> | 2020-06-26 22:07:08 +0300 |
---|---|---|
committer | David Crocker <dcrocker@eschertech.com> | 2020-06-26 22:07:08 +0300 |
commit | 79209f7c76ced9d68afc353443c583fbee40f6ff (patch) | |
tree | ae632203302dcd83029ceab0e07de25f77ca7760 /src | |
parent | 75ae6801b4bc5a9b83222333558230b2f462bd0f (diff) |
Improved SD card write speed
Diffstat (limited to 'src')
-rw-r--r-- | src/Hardware/SAME5x/AtmelStart_SAME5x/Config/peripheral_clk_config.h | 4 | ||||
-rw-r--r-- | src/Hardware/SAME5x/AtmelStart_SAME5x/hpl/sdhc/hpl_sdhc.c | 66 | ||||
-rw-r--r-- | src/Networking/ESP8266WiFi/WiFiInterface.cpp | 1 | ||||
-rw-r--r-- | src/Tasks.cpp | 3 | ||||
-rw-r--r-- | src/Version.h | 2 |
5 files changed, 72 insertions, 4 deletions
diff --git a/src/Hardware/SAME5x/AtmelStart_SAME5x/Config/peripheral_clk_config.h b/src/Hardware/SAME5x/AtmelStart_SAME5x/Config/peripheral_clk_config.h index 2a59a018..1fef7b8c 100644 --- a/src/Hardware/SAME5x/AtmelStart_SAME5x/Config/peripheral_clk_config.h +++ b/src/Hardware/SAME5x/AtmelStart_SAME5x/Config/peripheral_clk_config.h @@ -74,7 +74,7 @@ // <i> Select the clock source for SDHC. // <id> sdhc_slow_gclk_selection #ifndef CONF_GCLK_SDHC1_SLOW_SRC -#define CONF_GCLK_SDHC1_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK0_Val +#define CONF_GCLK_SDHC1_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK1_Val #endif // </h> @@ -91,7 +91,7 @@ * \brief SDHC's Clock slow frequency */ #ifndef CONF_SDHC1_SLOW_FREQUENCY -#define CONF_SDHC1_SLOW_FREQUENCY 120000000 +#define CONF_SDHC1_SLOW_FREQUENCY (120000000/3660) #endif // <y> USB Clock Source diff --git a/src/Hardware/SAME5x/AtmelStart_SAME5x/hpl/sdhc/hpl_sdhc.c b/src/Hardware/SAME5x/AtmelStart_SAME5x/hpl/sdhc/hpl_sdhc.c index d3c7f191..940de432 100644 --- a/src/Hardware/SAME5x/AtmelStart_SAME5x/hpl/sdhc/hpl_sdhc.c +++ b/src/Hardware/SAME5x/AtmelStart_SAME5x/hpl/sdhc/hpl_sdhc.c @@ -574,6 +574,37 @@ bool _mci_sync_write_word(struct _mci_sync_device *const mci_dev, uint32_t value */ bool _mci_sync_start_read_blocks(struct _mci_sync_device *const mci_dev, void *dst, uint16_t nb_block) { +#if 1 //dc42 with thanks to alkgrove + do + { + if (hri_sdhc_get_EISTR_reg(mci_dev->hw, SDHC_EISTR_DATTEO | SDHC_EISTR_DATCRC | SDHC_EISTR_DATEND)) + { + _mci_reset(mci_dev->hw); + return false; + } + } while (!hri_sdhc_get_NISTR_BRDRDY_bit(mci_dev->hw)); // until buffer read ready + hri_sdhc_set_NISTR_BRDRDY_bit(mci_dev->hw); // clear the buffer read ready bit + + // dc42 optimised the following loop by examining the generated assembler + const unsigned int num_words = (nb_block * mci_dev->mci_sync_block_size)/4; + uint32_t *p = (uint32_t*)dst; + while (p < (uint32_t*)dst + num_words) + { + while (!hri_sdhc_get_PSR_BUFRDEN_bit(mci_dev->hw)) { } + *p = hri_sdhc_read_BDPR_reg(mci_dev->hw); + ++p; + } + + do + { + if (hri_sdhc_get_EISTR_reg(mci_dev->hw, SDHC_EISTR_DATTEO | SDHC_EISTR_DATCRC | SDHC_EISTR_DATEND)) + { + _mci_reset(mci_dev->hw); + return false; + } + } while (!hri_sdhc_get_NISTR_TRFC_bit(mci_dev->hw)); // wait until transfer complete + hri_sdhc_set_NISTR_TRFC_bit(mci_dev->hw); +#else uint32_t nb_data; uint8_t *ptr = (uint8_t *)dst; uint8_t nbytes = 4; @@ -592,6 +623,7 @@ bool _mci_sync_start_read_blocks(struct _mci_sync_device *const mci_dev, void *d nb_data -= nbytes; ptr += nbytes; } +#endif return true; } @@ -602,6 +634,39 @@ bool _mci_sync_start_read_blocks(struct _mci_sync_device *const mci_dev, void *d */ bool _mci_sync_start_write_blocks(struct _mci_sync_device *const mci_dev, const void *src, uint16_t nb_block) { +#if 1 //dc42 with thanks to alkgrove + do + { + if (hri_sdhc_get_EISTR_reg(mci_dev->hw, SDHC_EISTR_DATTEO | SDHC_EISTR_DATCRC | SDHC_EISTR_DATEND)) + { + _mci_reset(mci_dev->hw); + return false; + } + } while (!hri_sdhc_get_NISTR_BWRRDY_bit(mci_dev->hw)); + hri_sdhc_set_NISTR_BWRRDY_bit(mci_dev->hw); + + // Write data + // dc42 optimised the following loop by examining the assembler + const unsigned int num_words = (nb_block * mci_dev->mci_sync_block_size)/4; + const uint32_t *p = (const uint32_t*)src; + while (p < (const uint32_t*)src + num_words) + { + const uint32_t currentWord = *p++; + while (!hri_sdhc_get_PSR_BUFWREN_bit(mci_dev->hw)) { } + hri_sdhc_write_BDPR_reg(mci_dev->hw, currentWord); + } + + // Wait end of transfer + do + { + if (hri_sdhc_get_EISTR_reg(mci_dev->hw, SDHC_EISTR_DATTEO | SDHC_EISTR_DATCRC | SDHC_EISTR_DATEND)) + { + _mci_reset(mci_dev->hw); + return false; + } + } while (!hri_sdhc_get_NISTR_TRFC_bit(mci_dev->hw)); // wait until transfer complete + hri_sdhc_set_NISTR_TRFC_bit(mci_dev->hw); +#else uint32_t nb_data; uint8_t *ptr = (uint8_t *)src; uint8_t nbytes = 4; @@ -620,6 +685,7 @@ bool _mci_sync_start_write_blocks(struct _mci_sync_device *const mci_dev, const nb_data -= nbytes; ptr += nbytes; } +#endif return true; } diff --git a/src/Networking/ESP8266WiFi/WiFiInterface.cpp b/src/Networking/ESP8266WiFi/WiFiInterface.cpp index 55730945..aa3da5c1 100644 --- a/src/Networking/ESP8266WiFi/WiFiInterface.cpp +++ b/src/Networking/ESP8266WiFi/WiFiInterface.cpp @@ -826,6 +826,7 @@ const char* WiFiInterface::TranslateEspResetReason(uint32_t reason) noexcept // Mapping from known ESP reset codes to reasons static const char * const resetReasonTexts[] = { + "Power up", "Hardware watchdog", "Exception", "Software watchdog", diff --git a/src/Tasks.cpp b/src/Tasks.cpp index d968812f..f653296b 100644 --- a/src/Tasks.cpp +++ b/src/Tasks.cpp @@ -137,7 +137,8 @@ extern "C" [[noreturn]] void AppMain() noexcept } #if SAME5x -# ifndef DEBUG +# if 0 // disable the bootloader protection code until we have a bootloader +//# ifndef DEBUG // Check that the bootloader is protected and EEPROM is configured uint64_t nvmUserRow0 = *reinterpret_cast<const uint64_t*>(NVMCTRL_USER); // we only need values in the first 64 bits of the user area constexpr uint64_t mask = ((uint64_t)0x0F << 32) | ((uint64_t)0x07 << 36) | (0x0F << 26); // we just want NVM_BOOT (bits 26-29), SEE.SBLK (bits 32-35) and SEE.PSZ (bits 36:38) diff --git a/src/Version.h b/src/Version.h index 83611963..f2fd60aa 100644 --- a/src/Version.h +++ b/src/Version.h @@ -19,7 +19,7 @@ #endif #ifndef DATE -# define DATE "2020-06-25b1" +# define DATE "2020-06-26b1" #endif #define AUTHORS "reprappro, dc42, chrishamm, t3p3, dnewman, printm3d" |