diff options
| author | David Crocker <dcrocker@eschertech.com> | 2022-03-07 17:41:53 +0300 |
|---|---|---|
| committer | David Crocker <dcrocker@eschertech.com> | 2022-03-07 17:41:53 +0300 |
| commit | e0dcaa04f0a5d720b003fe6a06b9c451e5cb65c2 (patch) | |
| tree | 778e08003421e2013e5ad7195eed27f4daad3aed /src | |
| parent | 966eebf742e670fe10fb0a2b5f2daa305dc4f30e (diff) | |
Mini4 board pin changes
Diffstat (limited to 'src')
| -rw-r--r-- | src/Config/Pins_Duet3Mini.h | 2 | ||||
| -rw-r--r-- | src/Config/Pins_Duet3Mini4.h | 10 |
2 files changed, 8 insertions, 4 deletions
diff --git a/src/Config/Pins_Duet3Mini.h b/src/Config/Pins_Duet3Mini.h index 3f4af849..185ea3e0 100644 --- a/src/Config/Pins_Duet3Mini.h +++ b/src/Config/Pins_Duet3Mini.h @@ -126,7 +126,9 @@ PortGroup * const StepPio = &(PORT->Group[2]); // The PIO that all the step pin constexpr Pin STEP_PINS[NumDirectDrivers] = { PortCPin(26), PortCPin(25), PortCPin(24), PortCPin(19), PortCPin(16), PortCPin(30), PortCPin(18) }; constexpr Pin DIRECTION_PINS[NumDirectDrivers] = { PortBPin(3), PortBPin(29), PortBPin(28), PortDPin(20), PortDPin(21), PortBPin(0), PortAPin(27) }; constexpr Pin DriverDiagPins[NumDirectDrivers] = { PortAPin(10), PortBPin(8), PortAPin(22), PortAPin(23), PortCPin(21), PortBPin(10), PortCPin(27) }; + // CCL inputs that the DIAG inputs use. Bits 0-1 are the CCL LUT number. Bits 8-19 are the value to OR in to the control register for that LUT. +// LUT 0 is kept free for other uses. constexpr uint32_t CclDiagInputs[NumDirectDrivers] = { 0x01 | CCL_LUTCTRL_INSEL2(0x04), // CCLIN[5] = 1.2 diff --git a/src/Config/Pins_Duet3Mini4.h b/src/Config/Pins_Duet3Mini4.h index c1560506..4fa702f1 100644 --- a/src/Config/Pins_Duet3Mini4.h +++ b/src/Config/Pins_Duet3Mini4.h @@ -118,15 +118,17 @@ constexpr Pin GlobalTmc22xxEnablePin = PortCPin(28); // The pin that drives ENN PortGroup * const StepPio = &(PORT->Group[2]); // The PIO that all the step pins are on (port C) constexpr Pin STEP_PINS[NumDirectDrivers] = { PortCPin(26), PortCPin(25), PortCPin(24), PortCPin(20) }; -constexpr Pin DIRECTION_PINS[NumDirectDrivers] = { PortBPin(3), PortAPin(27), PortCPin(27), PortBPin(2) }; -constexpr Pin DriverDiagPins[NumDirectDrivers] = { PortAPin(10), PortBPin(8), PortBPin(1), PortCPin(21) }; +constexpr Pin DIRECTION_PINS[NumDirectDrivers] = { PortBPin(3), PortAPin(27), PortBPin(1), PortBPin(2) }; +constexpr Pin DriverDiagPins[NumDirectDrivers] = { PortAPin(10), PortBPin(8), PortCPin(27), PortCPin(21) }; + // CCL inputs that the DIAG inputs use. Bits 0-1 are the CCL LUT number. Bits 8-19 are the value to OR in to the control register for that LUT. +// LUT 0 is kept free for other uses. constexpr uint32_t CclDiagInputs[NumDirectDrivers] = { 0x01 | CCL_LUTCTRL_INSEL2(0x04), // CCLIN[5] = 1.2 0x02 | CCL_LUTCTRL_INSEL2(0x04), // CCLIN[8] = 2.2 - 0x00 | CCL_LUTCTRL_INSEL2(0x04), // CCLIN[2] = 0.2 - 0x03 | CCL_LUTCTRL_INSEL1(0x04), // CCLIN[10] = 2.1 + 0x01 | CCL_LUTCTRL_INSEL1(0x04), // CCLIN[4] = 1.1 + 0x03 | CCL_LUTCTRL_INSEL1(0x04), // CCLIN[10] = 3.1 }; // UART interface to stepper drivers |