From d46c789974c2fe60316aed01bb2d7518a88e42fc Mon Sep 17 00:00:00 2001 From: David Crocker Date: Wed, 21 Sep 2022 15:54:22 +0100 Subject: Fixes for XDMAC with WiFi --- src/Config/Pins_Duet3_MB6HC.h | 5 +++++ src/Networking/ESP8266WiFi/WiFiInterface.cpp | 8 ++------ 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/src/Config/Pins_Duet3_MB6HC.h b/src/Config/Pins_Duet3_MB6HC.h index 2af57679..1517acdd 100644 --- a/src/Config/Pins_Duet3_MB6HC.h +++ b/src/Config/Pins_Duet3_MB6HC.h @@ -396,7 +396,12 @@ constexpr Pin SbcTfrReadyPin = PortEPin(2); #define ESP_SPI SPI1 #define ESP_SPI_INTERFACE_ID ID_SPI1 #define ESP_SPI_IRQn SPI1_IRQn + +#if HAS_SBC_INTERFACE #define ESP_SPI_HANDLER SPI1_WiFi_Handler // SBC interface redirects the interrupt to here +#else +#define ESP_SPI_HANDLER SPI1_Handler // SBC interface redirects the interrupt to here +#endif constexpr Pin APIN_ESP_SPI_MOSI = PortCPin(27); constexpr Pin APIN_ESP_SPI_MISO = PortCPin(26); diff --git a/src/Networking/ESP8266WiFi/WiFiInterface.cpp b/src/Networking/ESP8266WiFi/WiFiInterface.cpp index 1b864938..25cc5632 100644 --- a/src/Networking/ESP8266WiFi/WiFiInterface.cpp +++ b/src/Networking/ESP8266WiFi/WiFiInterface.cpp @@ -1536,9 +1536,7 @@ static bool spi_dma_check_rx_complete() noexcept if ((XDMAC->XDMAC_CHID[DmacChanWiFiRx].XDMAC_CC & (XDMAC_CC_RDIP | XDMAC_CC_WRIP)) == 0) { -// XDMAC->XDMAC_GSWF = (1u << DmacChanWiFiRx); // flush the channel -// while ((XDMAC->XDMAC_CHID[DmacChanWiFiRx].XDMAC_CIS & XDMAC_CIS_FIS) == 0) { } - XDMAC->XDMAC_GD = (1u << DmacChanWiFiRx); // disable the channel + XDMAC->XDMAC_GD = (1u << DmacChanWiFiRx); // disable the channel, which flushes the FIFO while ((XDMAC->XDMAC_GS & (1u << DmacChanWiFiRx)) != 0) { } // wait for disable to complete return true; } @@ -1989,10 +1987,8 @@ void WiFiInterface::SpiInterrupt() noexcept # endif # if USE_XDMAC - spi_tx_dma_disable(); - xdmac_channel_readwrite_suspend(XDMAC, DmacChanWiFiRx); // suspend the receive channel + spi_tx_dma_disable(); // don't suspend receive, it prevents the FIFO from being emptied in checkRxComplete # endif - DisableSpi(); if ((status & SPI_SR_OVRES) != 0) { -- cgit v1.2.3