Welcome to mirror list, hosted at ThFree Co, Russian Federation.

github.com/FFmpeg/FFmpeg.git - Unnamed repository; edit this file 'description' to name the repository.
summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorClément Bœsch <u@pkh.me>2016-06-21 22:55:20 +0300
committerClément Bœsch <u@pkh.me>2016-06-21 22:55:34 +0300
commit8ef57a0d6154119e1a616dd8c29e8c32e35808a0 (patch)
tree26c51bc5d99260b44ba3a2585091ca764559f939 /libavcodec/arm
parent373b82066cd4d0c7f42af9b03e8cdc1085e1a6e5 (diff)
parent41ed7ab45fc693f7d7fc35664c0233f4c32d69bb (diff)
Merge commit '41ed7ab45fc693f7d7fc35664c0233f4c32d69bb'
* commit '41ed7ab45fc693f7d7fc35664c0233f4c32d69bb': cosmetics: Fix spelling mistakes Merged-by: Clément Bœsch <u@pkh.me>
Diffstat (limited to 'libavcodec/arm')
-rw-r--r--libavcodec/arm/mlpdsp_armv6.S2
-rw-r--r--libavcodec/arm/mpegvideo_armv5te.c2
-rw-r--r--libavcodec/arm/simple_idct_arm.S6
-rw-r--r--libavcodec/arm/vp8dsp_neon.S2
4 files changed, 6 insertions, 6 deletions
diff --git a/libavcodec/arm/mlpdsp_armv6.S b/libavcodec/arm/mlpdsp_armv6.S
index d98f807559..b7ecf6cfae 100644
--- a/libavcodec/arm/mlpdsp_armv6.S
+++ b/libavcodec/arm/mlpdsp_armv6.S
@@ -240,7 +240,7 @@ DAT3 .req v4
DAT4 .req v5
DAT5 .req v6
DAT6 .req sl // use these rather than the otherwise unused
-DAT7 .req fp // ip and lr so that we can load them usinf LDRD
+DAT7 .req fp // ip and lr so that we can load them using LDRD
.macro output4words tail, head, r0, r1, r2, r3, r4, r5, r6, r7, pointer_dead=0
.if \head
diff --git a/libavcodec/arm/mpegvideo_armv5te.c b/libavcodec/arm/mpegvideo_armv5te.c
index 88c5f4fdad..e20bb4c645 100644
--- a/libavcodec/arm/mpegvideo_armv5te.c
+++ b/libavcodec/arm/mpegvideo_armv5te.c
@@ -29,7 +29,7 @@ void ff_dct_unquantize_h263_armv5te(int16_t *block, int qmul, int qadd, int coun
#ifdef ENABLE_ARM_TESTS
/**
- * h263 dequantizer supplementary function, it is performance critical and needs to
+ * H.263 dequantizer supplementary function, it is performance critical and needs to
* have optimized implementations for each architecture. Is also used as a reference
* implementation in regression tests
*/
diff --git a/libavcodec/arm/simple_idct_arm.S b/libavcodec/arm/simple_idct_arm.S
index c6300737a8..42d79ab95e 100644
--- a/libavcodec/arm/simple_idct_arm.S
+++ b/libavcodec/arm/simple_idct_arm.S
@@ -64,7 +64,7 @@ function ff_simple_idct_arm, export=1
__row_loop:
- @@ read the row and check if it is null, almost null, or not, according to strongarm specs, it is not necessary to optimize ldr accesses (i.e. split 32bits in 2 16bits words), at least it gives more usable registers :)
+ @@ read the row and check if it is null, almost null, or not, according to strongarm specs, it is not necessary to optimize ldr accesses (i.e. split 32 bits in two 16-bit words), at least it gives more usable registers :)
ldr r1, [r14, #0] @ R1=(int32)(R12)[0]=ROWr32[0] (relative row cast to a 32b pointer)
ldr r2, [r14, #4] @ R2=(int32)(R12)[1]=ROWr32[1]
ldr r3, [r14, #8] @ R3=ROWr32[2]
@@ -234,8 +234,8 @@ __end_a_evaluation:
@@ row[7] = (a0 - b0) >> ROW_SHIFT;
add r8, r6, r0 @ R8=a0+b0
add r9, r2, r1 @ R9=a1+b1
- @@ put 2 16 bits half-words in a 32bits word
- @@ ROWr32[0]=ROWr16[0] | (ROWr16[1]<<16) (only Little Endian compliant then!!!)
+ @@ put two 16-bit half-words in a 32-bit word
+ @@ ROWr32[0]=ROWr16[0] | (ROWr16[1]<<16) (only little-endian compliant then!!!)
ldr r10, =MASK_MSHW @ R10=0xFFFF0000
and r9, r10, r9, lsl #ROW_SHIFT2MSHW @ R9=0xFFFF0000 & ((a1+b1)<<5)
mvn r11, r10 @ R11= NOT R10= 0x0000FFFF
diff --git a/libavcodec/arm/vp8dsp_neon.S b/libavcodec/arm/vp8dsp_neon.S
index 5319346951..2e87fb0cc7 100644
--- a/libavcodec/arm/vp8dsp_neon.S
+++ b/libavcodec/arm/vp8dsp_neon.S
@@ -322,7 +322,7 @@ endfunc
vmov.i16 q12, #3
vsubl.s8 q10, d8, d6 @ QS0 - PS0
- vsubl.s8 q11, d9, d7 @ (widened to 16bit)
+ vsubl.s8 q11, d9, d7 @ (widened to 16 bits)
veor q2, q2, q13 @ PS1 = P1 ^ 0x80
veor q5, q5, q13 @ QS1 = Q1 ^ 0x80
vmul.i16 q10, q10, q12 @ w = 3 * (QS0 - PS0)