From 4cb6964244fd6c099383d8b7e99731e72cc844b9 Mon Sep 17 00:00:00 2001 From: Christophe Gisquet Date: Fri, 14 Feb 2014 15:03:13 +0000 Subject: dcadec: simplify decoding of VQ high frequencies The vector dequantization has a test in a loop preventing effective SIMD implementation. By moving it out of the loop, this loop can be DSPized. Therefore, modify the current DSP implementation. In particular, the DSP implementation no longer has to handle null loop sizes. The decode_hf implementations have following timings: For x86 Arrandale: C SSE SSE2 SSE4 win32: 260 162 119 104 win64: 242 N/A 89 72 The arm NEON optimizations follow in a later patch as external asm. The now unused check for the y modifier in arm inline asm is removed from configure. --- configure | 2 -- 1 file changed, 2 deletions(-) (limited to 'configure') diff --git a/configure b/configure index a7c00437b5..a3c744e769 100755 --- a/configure +++ b/configure @@ -1330,7 +1330,6 @@ HAVE_LIST=" altivec_h arpa_inet_h asm_mod_q - asm_mod_y atomic_cas_ptr atomics_native attribute_may_alias @@ -3669,7 +3668,6 @@ EOF $ARCH_EXT_LIST_ARM check_inline_asm asm_mod_q '"add r0, %Q0, %R0" :: "r"((long long)0)' - check_inline_asm asm_mod_y '"vmul.i32 d0, d0, %y0" :: "x"(0)' [ $target_os != win32 ] && enabled_all armv6t2 shared !pic && enable_weak_pic -- cgit v1.2.3