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authorMark Kriegsman <kriegsman@tr.org>2017-05-28 14:52:55 +0300
committerMark Kriegsman <kriegsman@tr.org>2017-05-28 14:52:55 +0300
commitb8f2e356de1c8bc8b28858917c401079dfbeb1d4 (patch)
tree16b78d3e38fe1c39ff5c1355f76d848a9da16977
parentf1a3a82957da40e221015bad0e2e9a3d52edb02f (diff)
parent6330be3211cff458c4ca178cd4c709cc41d39d99 (diff)
Merge branch 'master' of https://github.com/FastLED/FastLED
-rw-r--r--platforms/arm/kl26/clockless_arm_kl26.h11
-rw-r--r--platforms/esp/8266/clockless_block_esp8266.h44
2 files changed, 25 insertions, 30 deletions
diff --git a/platforms/arm/kl26/clockless_arm_kl26.h b/platforms/arm/kl26/clockless_arm_kl26.h
index e270f4d5..7138d0c4 100644
--- a/platforms/arm/kl26/clockless_arm_kl26.h
+++ b/platforms/arm/kl26/clockless_arm_kl26.h
@@ -20,15 +20,18 @@ public:
mPort = FastPinBB<DATA_PIN>::port();
}
- virtual uint16_t getMaxRefreshRate() const { return 400; }
+ virtual uint16_t getMaxRefreshRate() const { return 400; }
virtual void showPixels(PixelController<RGB_ORDER> & pixels) {
mWait.wait();
cli();
- if(!showRGBInternal(pixels)) {
+ uint32_t clocks = showRGBInternal(pixels);
+ if(!clocks) {
sei(); delayMicroseconds(WAIT_TIME); cli();
- showRGBInternal(pixels);
+ clocks = showRGBInternal(pixels);
}
+ long microsTaken = CLKS_TO_MICROS(clocks * ((T1 + T2 + T3) * 24));
+ MS_COUNTER += (microsTaken / 1000);
sei();
mWait.mark();
}
@@ -59,4 +62,4 @@ public:
FASTLED_NAMESPACE_END
-#endif // __INC_CLOCKLESS_ARM_D21
+#endif // __INC_CLOCKLESS_ARM_KL26
diff --git a/platforms/esp/8266/clockless_block_esp8266.h b/platforms/esp/8266/clockless_block_esp8266.h
index 2866b74d..e3341d16 100644
--- a/platforms/esp/8266/clockless_block_esp8266.h
+++ b/platforms/esp/8266/clockless_block_esp8266.h
@@ -3,11 +3,12 @@
#define FASTLED_HAS_BLOCKLESS 1
-#define PORT_MASK (((1<<LANES)-1) & 0x0000FFFFL)
+#define FIX_BITS(bits) (((bits & 0x0fL) << 12) | (bits & 0x30))
+
#define MIN(X,Y) (((X)<(Y)) ? (X):(Y))
-#define USED_LANES (MIN(LANES,4))
-#define REAL_FIRST_PIN 12
-#define LAST_PIN (12 + USED_LANES - 1)
+#define USED_LANES (MIN(LANES, 6))
+#define PORT_MASK (((1 << USED_LANES)-1) & 0x0000FFFFL)
+#define PIN_MASK FIX_BITS(PORT_MASK)
FASTLED_NAMESPACE_BEGIN
@@ -21,8 +22,6 @@ class InlineBlockClocklessController : public CPixelLEDController<RGB_ORDER, LAN
typedef typename FastPin<FIRST_PIN>::port_ptr_t data_ptr_t;
typedef typename FastPin<FIRST_PIN>::port_t data_t;
- data_t mPinMask;
- data_ptr_t mPort;
CMinWait<WAIT_TIME> mWait;
public:
virtual int size() { return CLEDController::size() * LANES; }
@@ -49,22 +48,15 @@ public:
}
template<int PIN> static void initPin() {
- if(PIN >= REAL_FIRST_PIN && PIN <= LAST_PIN) {
_ESPPIN<PIN, 1<<(PIN & 0xFF)>::setOutput();
- // FastPin<PIN>::setOutput();
- }
}
virtual void init() {
- // Only supportd on pins 12-15
- initPin<12>();
- initPin<13>();
- initPin<14>();
- initPin<15>();
- mPinMask = FastPin<FIRST_PIN>::mask();
- mPort = FastPin<FIRST_PIN>::port();
-
- // Serial.print("Mask is "); Serial.println(PORT_MASK);
+ void (* funcs[])() ={initPin<12>, initPin<13>, initPin<14>, initPin<15>, initPin<4>, initPin<5>};
+
+ for (uint8_t i = 0; i < USED_LANES; ++i) {
+ funcs[i]();
+ }
}
virtual uint16_t getMaxRefreshRate() const { return 400; }
@@ -87,14 +79,14 @@ public:
for(register uint32_t i = 0; i < USED_LANES; i++) {
while((__clock_cycles() - last_mark) < (T1+T2+T3));
last_mark = __clock_cycles();
- *FastPin<FIRST_PIN>::sport() = PORT_MASK << REAL_FIRST_PIN;
+ *FastPin<FIRST_PIN>::sport() = PIN_MASK;
- uint32_t nword = ((uint32_t)(~b2.bytes[7-i]) & PORT_MASK) << REAL_FIRST_PIN;
+ uint32_t nword = (uint32_t)(~b2.bytes[7-i]);
while((__clock_cycles() - last_mark) < (T1-6));
- *FastPin<FIRST_PIN>::cport() = nword;
+ *FastPin<FIRST_PIN>::cport() = FIX_BITS(nword);
while((__clock_cycles() - last_mark) < (T1+T2));
- *FastPin<FIRST_PIN>::cport() = PORT_MASK << REAL_FIRST_PIN;
+ *FastPin<FIRST_PIN>::cport() = PIN_MASK;
b.bytes[i] = pixels.template loadAndScale<PX>(pixels,i,d,scale);
}
@@ -102,14 +94,14 @@ public:
for(register uint32_t i = USED_LANES; i < 8; i++) {
while((__clock_cycles() - last_mark) < (T1+T2+T3));
last_mark = __clock_cycles();
- *FastPin<FIRST_PIN>::sport() = PORT_MASK << REAL_FIRST_PIN;
+ *FastPin<FIRST_PIN>::sport() = PIN_MASK;
- uint32_t nword = ((uint32_t)(~b2.bytes[7-i]) & PORT_MASK) << REAL_FIRST_PIN;
+ uint32_t nword = (uint32_t)(~b2.bytes[7-i]);
while((__clock_cycles() - last_mark) < (T1-6));
- *FastPin<FIRST_PIN>::cport() = nword;
+ *FastPin<FIRST_PIN>::cport() = FIX_BITS(nword);
while((__clock_cycles() - last_mark) < (T1+T2));
- *FastPin<FIRST_PIN>::cport() = PORT_MASK << REAL_FIRST_PIN;
+ *FastPin<FIRST_PIN>::cport() = PIN_MASK;
}
}