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authorSam Guyer <sam.guyer@gmail.com>2020-01-08 06:06:58 +0300
committerSam Guyer <sam.guyer@gmail.com>2020-01-08 06:06:58 +0300
commit9ab13502aaef22f92329741e2cbac0310ce60120 (patch)
tree287e6d2a079784b78f4a6db782d238a6fb80c36b
parentda6e00e35b672916140a66325d8846bea80278b1 (diff)
Fixing the conflicts in RMT code
-rw-r--r--platforms/esp/32/clockless_rmt_esp32.h14
1 files changed, 0 insertions, 14 deletions
diff --git a/platforms/esp/32/clockless_rmt_esp32.h b/platforms/esp/32/clockless_rmt_esp32.h
index 1496dc19..de5b7c98 100644
--- a/platforms/esp/32/clockless_rmt_esp32.h
+++ b/platforms/esp/32/clockless_rmt_esp32.h
@@ -123,12 +123,8 @@ __attribute__ ((always_inline)) inline static uint32_t __clock_cycles() {
// -- Configuration constants
#define DIVIDER 2 /* 4, 8 still seem to work, but timings become marginal */
-<<<<<<< HEAD
#define MAX_PULSES 64 /* A channel has a 64 "pulse" buffer */
#define PULSES_PER_FILL 24 /* One pixel's worth of pulses */
-=======
-#define MAX_PULSES 32 /* A channel has a 64 "pulse" buffer - we use half per pass */
->>>>>>> upstream/master
// -- Convert ESP32 CPU cycles to RMT device cycles, taking into account the divider
#define F_CPU_RMT ( 80000000L)
@@ -507,7 +503,6 @@ protected:
}
}
-<<<<<<< HEAD
// -- Fill RMT buffer
// Puts one pixel's worth of data into the next 24 slots in the RMT memory
void IRAM_ATTR fillNext()
@@ -560,8 +555,6 @@ protected:
}
// NO LONGER USED
-=======
->>>>>>> upstream/master
uint8_t IRAM_ATTR getNextByte() __attribute__ ((always_inline))
{
uint8_t byte;
@@ -655,17 +648,10 @@ protected:
}
// -- When we have filled the back half the buffer, reset the position to the first half
-<<<<<<< HEAD
if (mCurPulse == MAX_PULSES) {
mRMT_mem_ptr = & (RMTMEM.chan[mRMT_channel].data32[0].val);
mCurPulse = 0;
}
-=======
- if (mCurPulse >= MAX_PULSES*2) {
- mRMT_mem_ptr = & (RMTMEM.chan[mRMT_channel].data32[0].val);
- mCurPulse = 0;
- }
->>>>>>> upstream/master
}
};