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author | danielgarcia@gmail.com <danielgarcia@gmail.com@4ad4ec5c-605d-bd5c-5796-512c9b60011b> | 2013-02-09 11:53:18 +0400 |
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committer | danielgarcia@gmail.com <danielgarcia@gmail.com@4ad4ec5c-605d-bd5c-5796-512c9b60011b> | 2013-02-09 11:53:18 +0400 |
commit | b9bfc26db78d337ec2a02e24210d9e9ce55bd3de (patch) | |
tree | bd6ae435bf2e671249d15fed8607c2df78b50c2f /clockless.h | |
parent | 9e0f1e14b78b9ce9e7d79de74a67b54dbdb22dbf (diff) |
* Fix latch handling in the SPI classes (lo when transmitting, hi when not)
* Make it so that the template parameters for adjusting timing are based on NS timing values of the underlying chip
* preliminary code (untested) for putting output over the USART chip instead of the SPI chip.
Diffstat (limited to 'clockless.h')
-rw-r--r-- | clockless.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/clockless.h b/clockless.h index 6a62a52c..631adc86 100644 --- a/clockless.h +++ b/clockless.h @@ -4,6 +4,12 @@ #include "controller.h" #include <avr/interrupt.h> // for cli/se definitions +// Macro to convert from nano-seconds to clocks +#define NS(_NS) (_NS / (1000 / (F_CPU / 1000000L))) + +// Macro for making sure there's enough time available +#define NO_TIME(A, B, C) (NS(A) < 3 || NS(B) < 2 || NS(C) < 6) + ////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////// // // Base template for clockless controllers. These controllers have 3 control points in their cycle for each bit. The first point |