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authorDaniel Garcia <danielgarcia@gmail.com>2014-03-09 07:45:35 +0400
committerDaniel Garcia <danielgarcia@gmail.com>2014-03-09 07:45:35 +0400
commitcb7f6b15ebf5e8f7dc131c82222b0c4333d9acd0 (patch)
tree952fa5e4441c078c18cf1a2e3a141b7518d6fa47 /clockless_trinket.h
parent47fec8524446bcb982a7ea20d726fac27bd1d3df (diff)
Cleanup some spurious code from the asm
Diffstat (limited to 'clockless_trinket.h')
-rw-r--r--clockless_trinket.h21
1 files changed, 6 insertions, 15 deletions
diff --git a/clockless_trinket.h b/clockless_trinket.h
index aff80d8f..2d5621e2 100644
--- a/clockless_trinket.h
+++ b/clockless_trinket.h
@@ -115,12 +115,9 @@ public:
[s0] "r" (s0), \
[s1] "r" (s1), \
[s2] "r" (s2), \
- [d0] "r" (d0), \
- [d1] "r" (d1), \
- [d2] "r" (d2), \
- [e0] "r" (e0), \
- [e1] "r" (e1), \
- [e2] "r" (e2), \
+ [d0] "r" (pixels.d[RO(0)]), \
+ [d1] "r" (pixels.d[RO(1)]), \
+ [d2] "r" (pixels.d[RO(2)]), \
[PORT] "M" (FastPin<DATA_PIN>::port()-0x20), \
[O0] "M" (RGB_BYTE0(RGB_ORDER)), \
[O1] "M" (RGB_BYTE1(RGB_ORDER)), \
@@ -224,12 +221,6 @@ public:
uint8_t s0 = scale.raw[RO(0)];
uint8_t s1 = scale.raw[RO(1)];
uint8_t s2 = scale.raw[RO(2)];
- uint8_t d0 = pixels.d[RO(0)];
- uint8_t d1 = pixels.d[RO(1)];
- uint8_t d2 = pixels.d[RO(2)];
- uint8_t e0 = pixels.e[RO(0)];
- uint8_t e1 = pixels.e[RO(1)];
- uint8_t e2 = pixels.e[RO(2)];
register uint8_t loopvar=0;
{
@@ -237,9 +228,9 @@ public:
// Loop beginning, does some stuff that's outside of the pixel write cycle, namely incrementing d0-2 and masking off
// by the E values (see the definition )
LOOP;
- ADJDITHER2(d0,e0)
- ADJDITHER2(d1,e1)
- ADJDITHER2(d2,e2)
+ ADJDITHER2(pixels.d[RO(0)],pixels.e[RO(0)])
+ ADJDITHER2(pixels.d[RO(1)],pixels.e[RO(1)])
+ ADJDITHER2(pixels.d[RO(2)],pixels.e[RO(2)])
VIDADJ2(b0);
// Sum of the clock counts across each row should be 10 for 8Mhz, WS2811
// The values in the D1/D2/D3 indicate how many cycles the previous column takes