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authordanielgarcia@gmail.com <danielgarcia@gmail.com@4ad4ec5c-605d-bd5c-5796-512c9b60011b>2013-06-20 22:53:53 +0400
committerdanielgarcia@gmail.com <danielgarcia@gmail.com@4ad4ec5c-605d-bd5c-5796-512c9b60011b>2013-06-20 22:53:53 +0400
commit9cbddfc41dea1f25e2668fb3843e0eca430fc14a (patch)
tree0f0962b1cdb375757f9302ef4e432276c1bdb0d8 /delay.h
parentae8c92019f7fda09df0522ee35dad8be7e58d181 (diff)
cleanup andcheckpointing
Diffstat (limited to 'delay.h')
-rw-r--r--delay.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/delay.h b/delay.h
index 937e9b2a..554705fe 100644
--- a/delay.h
+++ b/delay.h
@@ -40,7 +40,23 @@ template<int CYCLES> __attribute__((always_inline)) inline void delaycycles() {
_delaycycles_AVR<CYCLES / 3, CYCLES % 3>();
}
#else
+// template<int LOOP, int PAD> inline void _delaycycles_ARM() {
+// delaycycles<PAD>();
+// // the loop below is 3 cycles * LOOP. the LDI is one cycle,
+// // the DEC is 1 cycle, the BRNE is 2 cycles if looping back and
+// // 1 if not (the LDI balances out the BRNE being 1 cycle on exit)
+// __asm__ __volatile__ (
+// " mov.w r9, %0\n"
+// "L_%=: subs.w r9, r9, #1\n"
+// " bne.n L_%=\n"
+// : /* no outputs */
+// : "M" (LOOP)
+// : "r9"
+// );
+// }
+
template<int CYCLES> __attribute__((always_inline)) inline void delaycycles() {
+ // _delaycycles_ARM<CYCLES / 3, CYCLES % 3>();
NOP; delaycycles<CYCLES-1>();
}
#endif