diff options
author | Daniel Garcia <dgarcia@dgarcia.net> | 2019-08-15 08:27:18 +0300 |
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committer | Daniel Garcia <dgarcia@dgarcia.net> | 2019-08-15 08:27:18 +0300 |
commit | dcb3a4f93f5e45615e397a2250bc1c51748857f5 (patch) | |
tree | b76dc6e0cc17f0d388eabfd960612b02a88781af /platforms/arm/kl26/fastpin_arm_kl26.h | |
parent | 958a83e1acd346752d6077b8289ba1ebb45bfe14 (diff) |
Kick all the pin definitions to allow for some runtime querying of ports and tweak pintest to have it provide pin definitions for platforms that have port definitions but might be missing pin specifics (e.g. not yet-supported avr platformsdefpin_cleanup
Diffstat (limited to 'platforms/arm/kl26/fastpin_arm_kl26.h')
-rw-r--r-- | platforms/arm/kl26/fastpin_arm_kl26.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/platforms/arm/kl26/fastpin_arm_kl26.h b/platforms/arm/kl26/fastpin_arm_kl26.h index b66948cd..8b3cbdfe 100644 --- a/platforms/arm/kl26/fastpin_arm_kl26.h +++ b/platforms/arm/kl26/fastpin_arm_kl26.h @@ -50,18 +50,18 @@ public: #define _R(T) struct __gen_struct_ ## T #define _RD32(T) struct __gen_struct_ ## T { static __attribute__((always_inline)) inline reg32_t r() { return T; } \ template<int BIT> static __attribute__((always_inline)) inline ptr_reg32_t rx() { return GPIO_BITBAND_PTR(T, BIT); } }; -#define _FL_IO(L) _RD32(FGPIO ## L ## _PDOR); _RD32(FGPIO ## L ## _PSOR); _RD32(FGPIO ## L ## _PCOR); _RD32(GPIO ## L ## _PTOR); _RD32(FGPIO ## L ## _PDIR); _RD32(FGPIO ## L ## _PDDR); +#define _FL_IO(L,C) _RD32(FGPIO ## L ## _PDOR); _RD32(FGPIO ## L ## _PSOR); _RD32(FGPIO ## L ## _PCOR); _RD32(GPIO ## L ## _PTOR); _RD32(FGPIO ## L ## _PDIR); _RD32(FGPIO ## L ## _PDDR); _FL_DEFINE_PORT3(L,C,_R(FGPIO ## L ## _PDOR)); #define _FL_DEFPIN(PIN, BIT, L) template<> class FastPin<PIN> : public _ARMPIN<PIN, 1 << BIT, _R(FGPIO ## L ## _PDOR), _R(FGPIO ## L ## _PSOR), _R(FGPIO ## L ## _PCOR), \ _R(GPIO ## L ## _PTOR), _R(FGPIO ## L ## _PDIR), _R(FGPIO ## L ## _PDDR)> {}; \ /* template<> class FastPinBB<PIN> : public _ARMPIN_BITBAND<PIN, BIT, _R(GPIO ## L ## _PDOR), _R(GPIO ## L ## _PSOR), _R(GPIO ## L ## _PCOR), \ _R(GPIO ## L ## _PTOR), _R(GPIO ## L ## _PDIR), _R(GPIO ## L ## _PDDR)> {}; */ +_FL_IO(A,0); _FL_IO(B,1); _FL_IO(C,2); _FL_IO(D,3); _FL_IO(E,4); + // Actual pin definitions #if defined(FASTLED_TEENSYLC) && defined(CORE_TEENSY) -_FL_IO(A); _FL_IO(B); _FL_IO(C); _FL_IO(D); _FL_IO(E); - #define MAX_PIN 26 _FL_DEFPIN(0, 16, B); _FL_DEFPIN(1, 17, B); _FL_DEFPIN(2, 0, D); _FL_DEFPIN(3, 1, A); _FL_DEFPIN(4, 2, A); _FL_DEFPIN(5, 7, D); _FL_DEFPIN(6, 4, D); _FL_DEFPIN(7, 2, D); |