diff options
Diffstat (limited to 'platforms/arm/d51/clockless_arm_d51.h')
| -rw-r--r-- | platforms/arm/d51/clockless_arm_d51.h | 140 |
1 files changed, 103 insertions, 37 deletions
diff --git a/platforms/arm/d51/clockless_arm_d51.h b/platforms/arm/d51/clockless_arm_d51.h index a543ec18..0c3f6d4d 100644 --- a/platforms/arm/d51/clockless_arm_d51.h +++ b/platforms/arm/d51/clockless_arm_d51.h @@ -1,62 +1,128 @@ #ifndef __INC_CLOCKLESS_ARM_D51 #define __INC_CLOCKLESS_ARM_D51 -// D51 is an M4 chip, however the M0 clockless logic seems to work. -#include "../common/m0clockless.h" FASTLED_NAMESPACE_BEGIN + +// Definition for a single channel clockless controller for SAMD51 +// See clockless.h for detailed info on how the template parameters are used. +#define ARM_DEMCR (*(volatile uint32_t *)0xE000EDFC) // Debug Exception and Monitor Control +#define ARM_DEMCR_TRCENA (1 << 24) // Enable debugging & monitoring blocks +#define ARM_DWT_CTRL (*(volatile uint32_t *)0xE0001000) // DWT control register +#define ARM_DWT_CTRL_CYCCNTENA (1 << 0) // Enable cycle count +#define ARM_DWT_CYCCNT (*(volatile uint32_t *)0xE0001004) // Cycle count register + + #define FASTLED_HAS_CLOCKLESS 1 -template <uint8_t DATA_PIN, int T1, int T2, int T3, EOrder RGB_ORDER = RGB, int XTRA0 = 0, bool FLIP = false, int WAIT_TIME = 50> +template <int DATA_PIN, int T1, int T2, int T3, EOrder RGB_ORDER = RGB, int XTRA0 = 0, bool FLIP = false, int WAIT_TIME = 50> class ClocklessController : public CPixelLEDController<RGB_ORDER> { - typedef typename FastPinBB<DATA_PIN>::port_ptr_t data_ptr_t; - typedef typename FastPinBB<DATA_PIN>::port_t data_t; + typedef typename FastPin<DATA_PIN>::port_ptr_t data_ptr_t; + typedef typename FastPin<DATA_PIN>::port_t data_t; - data_t mPinMask; - data_ptr_t mPort; - CMinWait<WAIT_TIME> mWait; + data_t mPinMask; + data_ptr_t mPort; + CMinWait<WAIT_TIME> mWait; public: - virtual void init() { - FastPinBB<DATA_PIN>::setOutput(); - mPinMask = FastPinBB<DATA_PIN>::mask(); - mPort = FastPinBB<DATA_PIN>::port(); - } + virtual void init() { + FastPin<DATA_PIN>::setOutput(); + mPinMask = FastPin<DATA_PIN>::mask(); + mPort = FastPin<DATA_PIN>::port(); + } virtual uint16_t getMaxRefreshRate() const { return 400; } - virtual void showPixels(PixelController<RGB_ORDER> & pixels) { +protected: + + virtual void showPixels(PixelController<RGB_ORDER> & pixels) { mWait.wait(); - cli(); - if(!showRGBInternal(pixels)) { + if(!showRGBInternal(pixels)) { sei(); delayMicroseconds(WAIT_TIME); cli(); showRGBInternal(pixels); } - sei(); mWait.mark(); } - // This method is made static to force making register Y available to use for data on AVR - if the method is non-static, then - // gcc will use register Y for the this pointer. - static uint32_t showRGBInternal(PixelController<RGB_ORDER> pixels) { - struct M0ClocklessData data; - data.d[0] = pixels.d[0]; - data.d[1] = pixels.d[1]; - data.d[2] = pixels.d[2]; - data.s[0] = pixels.mScale[0]; - data.s[1] = pixels.mScale[1]; - data.s[2] = pixels.mScale[2]; - data.e[0] = pixels.e[0]; - data.e[1] = pixels.e[1]; - data.e[2] = pixels.e[2]; - data.adj = pixels.mAdvance; - - typename FastPin<DATA_PIN>::port_ptr_t portBase = FastPin<DATA_PIN>::port(); - return showLedData<8,4,T1,T2,T3,RGB_ORDER, WAIT_TIME>(portBase, FastPin<DATA_PIN>::mask(), pixels.mData, pixels.mLen, &data); - } + template<int BITS> __attribute__ ((always_inline)) inline static void writeBits(register uint32_t & next_mark, register data_ptr_t port, register data_t hi, register data_t lo, register uint8_t & b) { + for(register uint32_t i = BITS-1; i > 0; i--) { + while(ARM_DWT_CYCCNT < next_mark); + next_mark = ARM_DWT_CYCCNT + (T1+T2+T3); + FastPin<DATA_PIN>::fastset(port, hi); + if(b&0x80) { + while((next_mark - ARM_DWT_CYCCNT) > (T3+(2*(F_CPU/24000000)))); + FastPin<DATA_PIN>::fastset(port, lo); + } else { + while((next_mark - ARM_DWT_CYCCNT) > (T2+T3+(2*(F_CPU/24000000)))); + FastPin<DATA_PIN>::fastset(port, lo); + } + b <<= 1; + } + + while(ARM_DWT_CYCCNT < next_mark); + next_mark = ARM_DWT_CYCCNT + (T1+T2+T3); + FastPin<DATA_PIN>::fastset(port, hi); + + if(b&0x80) { + while((next_mark - ARM_DWT_CYCCNT) > (T3+(2*(F_CPU/24000000)))); + FastPin<DATA_PIN>::fastset(port, lo); + } else { + while((next_mark - ARM_DWT_CYCCNT) > (T2+T3+(2*(F_CPU/24000000)))); + FastPin<DATA_PIN>::fastset(port, lo); + } + } + // This method is made static to force making register Y available to use for data on AVR - if the method is non-static, then + // gcc will use register Y for the this pointer. + static uint32_t showRGBInternal(PixelController<RGB_ORDER> pixels) { + // Get access to the clock + ARM_DEMCR |= ARM_DEMCR_TRCENA; + ARM_DWT_CTRL |= ARM_DWT_CTRL_CYCCNTENA; + ARM_DWT_CYCCNT = 0; + register data_ptr_t port = FastPin<DATA_PIN>::port(); + register data_t hi = *port | FastPin<DATA_PIN>::mask();; + register data_t lo = *port & ~FastPin<DATA_PIN>::mask();; + *port = lo; + + // Setup the pixel controller and load/scale the first byte + pixels.preStepFirstByteDithering(); + register uint8_t b = pixels.loadAndScale0(); + + cli(); + uint32_t next_mark = ARM_DWT_CYCCNT + (T1+T2+T3); + + while(pixels.has(1)) { + pixels.stepDithering(); + #if (FASTLED_ALLOW_INTERRUPTS == 1) + cli(); + // if interrupts took longer than 45µs, punt on the current frame + if(ARM_DWT_CYCCNT > next_mark) { + if((ARM_DWT_CYCCNT-next_mark) > ((WAIT_TIME-INTERRUPT_THRESHOLD)*CLKS_PER_US)) { sei(); return 0; } + } + + hi = *port | FastPin<DATA_PIN>::mask(); + lo = *port & ~FastPin<DATA_PIN>::mask(); + #endif + // Write first byte, read next byte + writeBits<8+XTRA0>(next_mark, port, hi, lo, b); + b = pixels.loadAndScale1(); + + // Write second byte, read 3rd byte + writeBits<8+XTRA0>(next_mark, port, hi, lo, b); + b = pixels.loadAndScale2(); + + // Write third byte, read 1st byte of next pixel + writeBits<8+XTRA0>(next_mark, port, hi, lo, b); + b = pixels.advanceAndLoadAndScale0(); + #if (FASTLED_ALLOW_INTERRUPTS == 1) + sei(); + #endif + }; + + sei(); + return ARM_DWT_CYCCNT; + } }; FASTLED_NAMESPACE_END - -#endif // __INC_CLOCKLESS_ARM_D51 +#endif |