1 files changed, 82 insertions, 62 deletions

diff --git a/platforms/arm/stm32/fastpin_arm_stm32.h b/platforms/arm/stm32/fastpin_arm_stm32.h
index 57309cd9..274d0f60 100644
--- a/platforms/arm/stm32/fastpin_arm_stm32.h
+++ b/platforms/arm/stm32/fastpin_arm_stm32.h
@@ -56,45 +56,67 @@ public:
 };
 
 #if defined(STM32F10X_MD)
- #define _RD32(T) struct __gen_struct_ ## T { static __attribute__((always_inline)) inline volatile GPIO_TypeDef * r() { return T; } };
- #define _IO32(L) _RD32(GPIO ## L)
+  #define _R(T) struct __gen_struct_ ## T
+  #define _RD32(T) struct __gen_struct_ ## T { static __attribute__((always_inline)) inline volatile GPIO_TypeDef * r() { return T; } };
+  #define _FL_IO(L,C) _RD32(GPIO ## L);  _FL_DEFINE_PORT3(L, C, _R(GPIO ## L));
 #elif defined(__STM32F1__)
- #define _RD32(T) struct __gen_struct_ ## T { static __attribute__((always_inline)) inline gpio_reg_map* r() { return T->regs; } };
- #define _IO32(L) _RD32(GPIO ## L)
+  #define _R(T) struct __gen_struct_ ## T
+  #define _RD32(T) struct __gen_struct_ ## T { static __attribute__((always_inline)) inline gpio_reg_map* r() { return T->regs; } };
+  #define _FL_IO(L,C) _RD32(GPIO ## L); _FL_DEFINE_PORT3(L, C, _R(GPIO ## L));
 #else
  #error "Platform not supported"
 #endif
 
-#define _R(T) struct __gen_struct_ ## T
-#define _DEFPIN_ARM(PIN, BIT, L) template<> class FastPin<PIN> : public _ARMPIN<PIN, BIT, 1 << BIT, _R(GPIO ## L)> {};
+#define _FL_DEFPIN(PIN, BIT, L) template<> class FastPin<PIN> : public _ARMPIN<PIN, BIT, 1 << BIT, _R(GPIO ## L)> {};
+
+#ifdef GPIOA
+_FL_IO(A,0);
+#endif
+#ifdef GPIOB
+_FL_IO(B,1);
+#endif
+#ifdef GPIOC
+_FL_IO(C,2);
+#endif
+#ifdef GPIOD
+_FL_IO(D,3);
+#endif
+#ifdef GPIOE
+_FL_IO(E,4);
+#endif
+#ifdef GPIOF
+_FL_IO(F,5);
+#endif
+#ifdef GPIOG
+_FL_IO(G,6);
+#endif
 
 // Actual pin definitions
 #if defined(SPARK) // Sparkfun STM32F103 based board
 
-_IO32(A); _IO32(B); _IO32(C); _IO32(D); _IO32(E); _IO32(F); _IO32(G);
 
 
 #define MAX_PIN 19
-_DEFPIN_ARM(0, 7, B);
-_DEFPIN_ARM(1, 6, B);
-_DEFPIN_ARM(2, 5, B);
-_DEFPIN_ARM(3, 4, B);
-_DEFPIN_ARM(4, 3, B);
-_DEFPIN_ARM(5, 15, A);
-_DEFPIN_ARM(6, 14, A);
-_DEFPIN_ARM(7, 13, A);
-_DEFPIN_ARM(8, 8, A);
-_DEFPIN_ARM(9, 9, A);
-_DEFPIN_ARM(10, 0, A);
-_DEFPIN_ARM(11, 1, A);
-_DEFPIN_ARM(12, 4, A);
-_DEFPIN_ARM(13, 5, A);
-_DEFPIN_ARM(14, 6, A);
-_DEFPIN_ARM(15, 7, A);
-_DEFPIN_ARM(16, 0, B);
-_DEFPIN_ARM(17, 1, B);
-_DEFPIN_ARM(18, 3, A);
-_DEFPIN_ARM(19, 2, A);
+_FL_DEFPIN(0, 7, B);
+_FL_DEFPIN(1, 6, B);
+_FL_DEFPIN(2, 5, B);
+_FL_DEFPIN(3, 4, B);
+_FL_DEFPIN(4, 3, B);
+_FL_DEFPIN(5, 15, A);
+_FL_DEFPIN(6, 14, A);
+_FL_DEFPIN(7, 13, A);
+_FL_DEFPIN(8, 8, A);
+_FL_DEFPIN(9, 9, A);
+_FL_DEFPIN(10, 0, A);
+_FL_DEFPIN(11, 1, A);
+_FL_DEFPIN(12, 4, A);
+_FL_DEFPIN(13, 5, A);
+_FL_DEFPIN(14, 6, A);
+_FL_DEFPIN(15, 7, A);
+_FL_DEFPIN(16, 0, B);
+_FL_DEFPIN(17, 1, B);
+_FL_DEFPIN(18, 3, A);
+_FL_DEFPIN(19, 2, A);
 
 
 #define SPI_DATA 15
@@ -106,43 +128,41 @@ _DEFPIN_ARM(19, 2, A);
 
 #if defined(__STM32F1__) // Generic STM32F103 aka "Blue Pill"
 
-_IO32(A); _IO32(B); _IO32(C);
-
 #define MAX_PIN 46
 
-_DEFPIN_ARM(10, 0, A);	// PA0 - PA7
-_DEFPIN_ARM(11, 1, A);
-_DEFPIN_ARM(12, 2, A);
-_DEFPIN_ARM(13, 3, A);
-_DEFPIN_ARM(14, 4, A);
-_DEFPIN_ARM(15, 5, A);
-_DEFPIN_ARM(16, 6, A);
-_DEFPIN_ARM(17, 7, A);
-_DEFPIN_ARM(29, 8, A);	// PA8 - PA15
-_DEFPIN_ARM(30, 9, A);
-_DEFPIN_ARM(31, 10, A);
-_DEFPIN_ARM(32, 11, A);
-_DEFPIN_ARM(33, 12, A);
-_DEFPIN_ARM(34, 13, A);
-_DEFPIN_ARM(37, 14, A);
-_DEFPIN_ARM(38, 15, A);
-
-_DEFPIN_ARM(18, 0, B);	// PB0 - PB11
-_DEFPIN_ARM(19, 1, B);
-_DEFPIN_ARM(20, 2, B);
-_DEFPIN_ARM(39, 3, B);
-_DEFPIN_ARM(40, 4, B);
-_DEFPIN_ARM(41, 5, B);
-_DEFPIN_ARM(42, 6, B);
-_DEFPIN_ARM(43, 7, B);
-_DEFPIN_ARM(45, 8, B);
-_DEFPIN_ARM(46, 9, B);
-_DEFPIN_ARM(21, 10, B);
-_DEFPIN_ARM(22, 11, B);
-
-_DEFPIN_ARM(2, 13, C);	// PC13 - PC15
-_DEFPIN_ARM(3, 14, C);
-_DEFPIN_ARM(4, 15, C);
+_FL_DEFPIN(10, 0, A);	// PA0 - PA7
+_FL_DEFPIN(11, 1, A);
+_FL_DEFPIN(12, 2, A);
+_FL_DEFPIN(13, 3, A);
+_FL_DEFPIN(14, 4, A);
+_FL_DEFPIN(15, 5, A);
+_FL_DEFPIN(16, 6, A);
+_FL_DEFPIN(17, 7, A);
+_FL_DEFPIN(29, 8, A);	// PA8 - PA15
+_FL_DEFPIN(30, 9, A);
+_FL_DEFPIN(31, 10, A);
+_FL_DEFPIN(32, 11, A);
+_FL_DEFPIN(33, 12, A);
+_FL_DEFPIN(34, 13, A);
+_FL_DEFPIN(37, 14, A);
+_FL_DEFPIN(38, 15, A);
+
+_FL_DEFPIN(18, 0, B);	// PB0 - PB11
+_FL_DEFPIN(19, 1, B);
+_FL_DEFPIN(20, 2, B);
+_FL_DEFPIN(39, 3, B);
+_FL_DEFPIN(40, 4, B);
+_FL_DEFPIN(41, 5, B);
+_FL_DEFPIN(42, 6, B);
+_FL_DEFPIN(43, 7, B);
+_FL_DEFPIN(45, 8, B);
+_FL_DEFPIN(46, 9, B);
+_FL_DEFPIN(21, 10, B);
+_FL_DEFPIN(22, 11, B);
+
+_FL_DEFPIN(2, 13, C);	// PC13 - PC15
+_FL_DEFPIN(3, 14, C);
+_FL_DEFPIN(4, 15, C);
 
 #define SPI_DATA BOARD_SPI1_MOSI_PIN
 #define SPI_CLOCK BOARD_SPI1_SCK_PIN