Welcome to mirror list, hosted at ThFree Co, Russian Federation.

fastspi.h - github.com/FastLED/FastLED.git - Unnamed repository; edit this file 'description' to name the repository.
summaryrefslogtreecommitdiff
blob: 60c70a964e853f1c41237ebefbb24e830350d026 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
#ifndef __INC_FASTSPI_H
#define __INC_FASTSPI_H

////////////////////////////////////////////////////////////////////////////////////////////
//
// Clock cycle counted delay loop
//
////////////////////////////////////////////////////////////////////////////////////////////

#if defined(__arm__) 
# define NOP __asm__ __volatile__ ("nop\n");
#else
#  define NOP __asm__ __volatile__ ("cp r0,r0\n");
#endif

// predeclaration to not upset the compiler
template<int CYCLES> inline void delaycycles();

// worker template - this will nop for LOOP * 3 + PAD cycles total
template<int LOOP, int PAD> inline void _delaycycles() { 
	delaycycles<PAD>();
	// the loop below is 3 cycles * LOOP.  the LDI is one cycle,
	// the DEC is 1 cycle, the BRNE is 2 cycles if looping back and
	// 1 if not (the LDI balances out the BRNE being 1 cycle on exit)
	__asm__ __volatile__ ( 
		"		LDI R16, %0\n"
		"L_%=:  DEC R16\n"
		"		BRNE L_%=\n"
		: /* no outputs */ 
		: "M" (LOOP) 
		: "r16"
		);
}

// usable definition
#if 1
template<int CYCLES> inline void delaycycles() { 
	_delaycycles<CYCLES / 3, CYCLES % 3>();	
}
#else
template<int CYCLES> inline void delaycycles() { 
	NOP; delaycycles<CYCLES-1>();
}
#endif

// pre-instantiations for values small enough to not need the loop
template<> inline void delaycycles<0>() {}
template<> inline void delaycycles<1>() {NOP;}
template<> inline void delaycycles<2>() {NOP;NOP;}
template<> inline void delaycycles<3>() {NOP;NOP;NOP;}

class DATA_NOP { 
public:
	static uint8_t adjust(uint8_t data) { return data; } 
};

//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
//
// Software SPI (aka bit-banging) support - with optimizations for when the clock and data pin are on the same port
//
//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

template <uint8_t DATA_PIN, uint8_t CLOCK_PIN, uint8_t LATCH_PIN, uint8_t SPI_SPEED>
class AVRSoftwareSPIOutput { 
public:
	static void init() {
		// set the pins to output
		Pin<DATA_PIN>::setOutput();
		Pin<LATCH_PIN>::setOutput();
		Pin<CLOCK_PIN>::setOutput();
	}

	static void wait() __attribute__((always_inline)) { }
	
	static void writeByte(uint8_t b) __attribute__((always_inline)) { 
		register volatile uint8_t *clockpin = Pin<CLOCK_PIN>::port();
		register volatile uint8_t *datapin = Pin<DATA_PIN>::port();
		writeByte(b, clockpin, datapin);
	}
	
	static void writeByte(uint8_t b, volatile uint8_t* clockpin, volatile uint8_t *datapin) __attribute__((always_inline)) { 
		writeBit<7>(b, clockpin, datapin);
		writeBit<6>(b, clockpin, datapin);
		writeBit<5>(b, clockpin, datapin);
		writeBit<4>(b, clockpin, datapin);
		writeBit<3>(b, clockpin, datapin);
		writeBit<2>(b, clockpin, datapin);
		writeBit<1>(b, clockpin, datapin);
		writeBit<0>(b, clockpin, datapin);
	}

	static void writeByte(uint8_t b, volatile uint8_t *datapin, 
						  uint8_t hival, uint8_t loval, uint8_t hiclock, uint8_t loclock) __attribute__((always_inline, hot)) { 
		writeBit<7>(b, datapin, hival, loval, hiclock, loclock);
		writeBit<6>(b, datapin, hival, loval, hiclock, loclock);
		writeBit<5>(b, datapin, hival, loval, hiclock, loclock);
		writeBit<4>(b, datapin, hival, loval, hiclock, loclock);
		writeBit<3>(b, datapin, hival, loval, hiclock, loclock);
		writeBit<2>(b, datapin, hival, loval, hiclock, loclock);
		writeBit<1>(b, datapin, hival, loval, hiclock, loclock);
		writeBit<0>(b, datapin, hival, loval, hiclock, loclock);
	}

	static void writeByte(uint8_t b, volatile uint8_t* clockpin, volatile uint8_t *datapin, 
						  uint8_t hival, uint8_t loval, uint8_t hiclock, uint8_t loclock) __attribute__((always_inline)) { 
		writeBit<7>(b, clockpin, datapin, hival, loval, hiclock, loclock);
		writeBit<6>(b, clockpin, datapin, hival, loval, hiclock, loclock);
		writeBit<5>(b, clockpin, datapin, hival, loval, hiclock, loclock);
		writeBit<4>(b, clockpin, datapin, hival, loval, hiclock, loclock);
		writeBit<3>(b, clockpin, datapin, hival, loval, hiclock, loclock);
		writeBit<2>(b, clockpin, datapin, hival, loval, hiclock, loclock);
		writeBit<1>(b, clockpin, datapin, hival, loval, hiclock, loclock);
		writeBit<0>(b, clockpin, datapin, hival, loval, hiclock, loclock);
	}

	template <uint8_t BIT> inline static void writeBit(uint8_t b) { 
		register volatile uint8_t *clockpin = Pin<CLOCK_PIN>::port();
		register volatile uint8_t *datapin = Pin<DATA_PIN>::port();
		writeBit<BIT>(b, clockpin, datapin);
	}
	
	template <uint8_t BIT> inline static void writeBit(uint8_t b, volatile uint8_t *clockpin, volatile uint8_t *datapin) { 
		if(b & (1 << BIT)) { 
			Pin<DATA_PIN>::hi(datapin);
		} else { 
			Pin<DATA_PIN>::lo(datapin);
		}

		Pin<CLOCK_PIN>::hi(clockpin);
		Pin<CLOCK_PIN>::lo(clockpin);
	}

	// the version of write to use when clock and data are on separate pins with precomputed values for setting
	// the clock and data pins
	template <uint8_t BIT> inline static void writeBit(uint8_t b, volatile uint8_t *clockpin, volatile uint8_t *datapin, 
													uint8_t hival, uint8_t loval, uint8_t hiclock, uint8_t loclock) { 
		// // only need to explicitly set clock hi if clock and data are on different ports
		if(b & (1 << BIT)) { 
			Pin<DATA_PIN>::fastset(datapin, hival);
		} else { 
			// NOP;
			Pin<DATA_PIN>::fastset(datapin, loval);
		}


		Pin<CLOCK_PIN>::fastset(clockpin, hiclock);
		Pin<CLOCK_PIN>::fastset(clockpin, loclock);
	}

	// the version of write to use when clock and data are on the same pin with precomputed values for the various
	// combinations
	template <uint8_t BIT> inline static void writeBit(uint8_t b, volatile uint8_t *clockdatapin, 
													uint8_t datahiclockhi, uint8_t dataloclockhi, 
													uint8_t datahiclocklo, uint8_t dataloclocklo) { 
		if(b & (1 << BIT)) { 
			Pin<DATA_PIN>::fastset(clockdatapin, datahiclockhi);
			Pin<DATA_PIN>::fastset(clockdatapin, datahiclocklo);
		} else { 
			// NOP;
			Pin<DATA_PIN>::fastset(clockdatapin, dataloclockhi);
			Pin<DATA_PIN>::fastset(clockdatapin, dataloclocklo);
		}
	}

	static void latch() { Pin<LATCH_PIN>::hi(); }
	static void release() { Pin<LATCH_PIN>::lo(); }

	static void writeBytesValue(uint8_t value, int len) { 
		latch();
		register volatile uint8_t *clockpin = Pin<CLOCK_PIN>::port();
		register volatile uint8_t *datapin = Pin<DATA_PIN>::port();

		if(Pin<DATA_PIN>::port() != Pin<CLOCK_PIN>::port()) {
			// If data and clock are on different ports, then writing a bit will consist of writing the value foor
			// the bit (hi or low) to the data pin port, and then two writes to the clock port to strobe the clock line
			register uint8_t datahi = Pin<DATA_PIN>::hival();
			register uint8_t datalo = Pin<DATA_PIN>::loval();
			register uint8_t clockhi = Pin<CLOCK_PIN>::hival();
			register uint8_t clocklo = Pin<CLOCK_PIN>::loval();
			while(len--) { 
				writeByte(value, clockpin, datapin, datahi, datalo, clockhi, clocklo);
			}

		} else {
			// If data and clock are on the same port then we can combine setting the data and clock pins 
			register uint8_t datahi_clockhi = Pin<DATA_PIN>::hival() | Pin<CLOCK_PIN>::mask();
			register uint8_t datalo_clockhi = Pin<DATA_PIN>::loval() | Pin<CLOCK_PIN>::mask();
			register uint8_t datahi_clocklo = Pin<DATA_PIN>::hival() & ~Pin<CLOCK_PIN>::mask();
			register uint8_t datalo_clocklo = Pin<DATA_PIN>::loval() & ~Pin<CLOCK_PIN>::mask();

			while(len--) { 
				writeByte(value, datapin, datahi_clockhi, datalo_clockhi, datahi_clocklo, datalo_clocklo);
			}
		}
		release();	
	}

	// write a block of len uint8_ts out 
	template <class D> static void writeBytes(register uint8_t *data, int len) { 
		latch();
		register volatile uint8_t *clockpin = Pin<CLOCK_PIN>::port();
		register volatile uint8_t *datapin = Pin<DATA_PIN>::port();

		if(Pin<DATA_PIN>::port() != Pin<CLOCK_PIN>::port()) {
			// If data and clock are on different ports, then writing a bit will consist of writing the value foor
			// the bit (hi or low) to the data pin port, and then two writes to the clock port to strobe the clock line
			register uint8_t datahi = Pin<DATA_PIN>::hival();
			register uint8_t datalo = Pin<DATA_PIN>::loval();
			register uint8_t clockhi = Pin<CLOCK_PIN>::hival();
			register uint8_t clocklo = Pin<CLOCK_PIN>::loval();
			uint8_t *end = data + len;

			while(data != end) { 
				writeByte(D::adjust(*data++), clockpin, datapin, datahi, datalo, clockhi, clocklo);
			}

		} else {
			// If data and clock are on the same port then we can combine setting the data and clock pins 
			register uint8_t datahi_clockhi = Pin<DATA_PIN>::hival() | Pin<CLOCK_PIN>::mask();
			register uint8_t datalo_clockhi = Pin<DATA_PIN>::loval() | Pin<CLOCK_PIN>::mask();
			register uint8_t datahi_clocklo = Pin<DATA_PIN>::hival() & ~Pin<CLOCK_PIN>::mask();
			register uint8_t datalo_clocklo = Pin<DATA_PIN>::loval() & ~Pin<CLOCK_PIN>::mask();
			
			uint8_t *end = data + len;

			while(data != end) { 
				writeByte(D::adjust(*data++), datapin, datahi_clockhi, datalo_clockhi, datahi_clocklo, datalo_clocklo);
			}
		}
		release();	
	}

	static void writeBytes(register uint8_t *data, int len) { writeBytes<DATA_NOP>(data, len); }


	// write a block of uint8_ts out in groups of three.  len is the total number of uint8_ts to write out.  The template
	// parameters indicate how many uint8_ts to skip at the beginning and/or end of each grouping
	template <uint8_t SKIP, class D> static void writeBytes3(register uint8_t *data, int len) { 
		latch();
		register volatile uint8_t *clockpin = Pin<CLOCK_PIN>::port();
		register volatile uint8_t *datapin = Pin<DATA_PIN>::port();

		if(Pin<DATA_PIN>::port() != Pin<CLOCK_PIN>::port()) {
			// If data and clock are on different ports, then writing a bit will consist of writing the value foor
			// the bit (hi or low) to the data pin port, and then two writes to the clock port to strobe the clock line
			register uint8_t datahi = Pin<DATA_PIN>::hival();
			register uint8_t datalo = Pin<DATA_PIN>::loval();
			register uint8_t clockhi = Pin<CLOCK_PIN>::hival();
			register uint8_t clocklo = Pin<CLOCK_PIN>::loval();
			uint8_t *end = data + len;

			while(data != end) { 
				data += SKIP;
				writeByte(D::adjust(*data++), clockpin, datapin, datahi, datalo, clockhi, clocklo);
				writeByte(D::adjust(*data++), clockpin, datapin, datahi, datalo, clockhi, clocklo);
				writeByte(D::adjust(*data++), clockpin, datapin, datahi, datalo, clockhi, clocklo);
			}

		} else {
			// If data and clock are on the same port then we can combine setting the data and clock pins 
			register uint8_t datahi_clockhi = Pin<DATA_PIN>::hival() | Pin<CLOCK_PIN>::mask();
			register uint8_t datalo_clockhi = Pin<DATA_PIN>::loval() | Pin<CLOCK_PIN>::mask();
			register uint8_t datahi_clocklo = Pin<DATA_PIN>::hival() & ~Pin<CLOCK_PIN>::mask();
			register uint8_t datalo_clocklo = Pin<DATA_PIN>::loval() & ~Pin<CLOCK_PIN>::mask();
			
			uint8_t *end = data + len;

			while(data != end) { 
				data += SKIP;
				writeByte(D::adjust(*data++), datapin, datahi_clockhi, datalo_clockhi, datahi_clocklo, datalo_clocklo);
				writeByte(D::adjust(*data++), datapin, datahi_clockhi, datalo_clockhi, datahi_clocklo, datalo_clocklo);
				writeByte(D::adjust(*data++), datapin, datahi_clockhi, datalo_clockhi, datahi_clocklo, datalo_clocklo);
			}

			release();
		}	
	}

	template <uint8_t SKIP> static void writeBytes3(register uint8_t *data, int len) { writeBytes3<SKIP, DATA_NOP>(data, len); }
	template <class D> static void writeBytes3(register uint8_t *data, int len) { writeBytes3<0, D>(data, len); }
	static void writeBytes3(register uint8_t *data, int len) { writeBytes3<0, DATA_NOP>(data, len); }
};

//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
//
// Hardware SPI support using SPDR registers and friends
//
//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

template <uint8_t _DATA_PIN, uint8_t _CLOCK_PIN, uint8_t _LATCH_PIN, uint8_t _SPI_SPEED>
class AVRHardwareSPIOutput { 
public:
	static void init() {
		uint8_t clr;

		// set the pins to output
		Pin<_DATA_PIN>::setOutput();
		Pin<_LATCH_PIN>::setOutput();
		Pin<_CLOCK_PIN>::setOutput();

		SPCR |= ((1<<SPE) | (1<<MSTR) ); 		// enable SPI as master
		SPCR &= ~ ( (1<<SPR1) | (1<<SPR0) ); 	// clear out the prescalar bits

		clr = SPSR; // clear SPI status register 
		clr = SPDR; // clear SPI data register

	    bool b2x = false;
	    switch(_SPI_SPEED) { 
	      /* fosc/2   */ case 0: b2x=true; break;
	      /* fosc/4   */ case 1: break;
	      /* fosc/8   */ case 2: SPCR |= (1<<SPR0); b2x=true; break;
	      /* fosc/16  */ case 3: SPCR |= (1<<SPR0); break;
	      /* fosc/32  */ case 4: SPCR |= (1<<SPR1); b2x=true; break;
	      /* fosc/64  */ case 5: SPCR |= (1<<SPR1); break;
	      /* fosc/64  */ case 6: SPCR |= (1<<SPR1); SPCR |= (1<<SPR0); b2x=true; break;
	      /* fosc/128 */ default: SPCR |= (1<<SPR1); SPCR |= (1<<SPR0); break;
	    }
	    if(b2x) { SPSR |= (1<<SPI2X); }
	    else { SPSR &= ~ (1<<SPI2X); }

	    // push 192 0s to prime the spi stuff
	    SPDR = 0;
	    for(int i = 0; i < 191; i++) { 
	    	writeByte(0);
	    }
	}

	static void wait() __attribute__((always_inline)) { while(!(SPSR & (1<<SPIF))); }

	// All the write functions stub out and degrade to the SPDR write.  The various parameter combinations are attempts to support
	// bitbanging optimizations
	static void writeByte(uint8_t b, volatile uint8_t *, volatile uint8_t *,
						  uint8_t , uint8_t , uint8_t , uint8_t ) __attribute__((always_inline)) { wait(); SPDR=b; }
	static void writeByte(uint8_t b, volatile uint8_t *, 
						  uint8_t , uint8_t , uint8_t , uint8_t ) __attribute__((always_inline)) { wait(); SPDR=b; }

	static void writeByte(uint8_t b, volatile uint8_t*, volatile uint8_t*) __attribute__((always_inline)) { wait(); SPDR=b; }
	static void writeByte(uint8_t b) __attribute__((always_inline)) { wait(); SPDR=b; }

	template <uint8_t BIT> inline static void writeBit(uint8_t b, volatile uint8_t *clockpin, volatile uint8_t *datapin) { 
		SPCR &= ~(1 << SPE);
		if(b & (1 << BIT)) { 
			Pin<_DATA_PIN>::hi(datapin);
		} else { 
			Pin<_DATA_PIN>::lo(datapin);
		}

		Pin<_CLOCK_PIN>::hi(clockpin);
		Pin<_CLOCK_PIN>::lo(clockpin);
		SPCR |= 1 << SPE;
	}

	template <uint8_t BIT> inline static void writeBit(uint8_t b) { 
		register volatile uint8_t *clockpin = Pin<_CLOCK_PIN>::port();
		register volatile uint8_t *datapin = Pin<_CLOCK_PIN>::port();
		writeBit<BIT>(b, clockpin, datapin);	
	}

	static void latch() { Pin<_LATCH_PIN>::hi(); }
	static void release() { Pin<_LATCH_PIN>::lo(); }

	static void writeBytesValue(uint8_t value, int len) { 
		latch();
		while(len--) { 
			writeByte(value);
		}
		release();
	}
	
	// Write a block of n uint8_ts out 
	template <class D> static void writeBytes(register uint8_t *data, int len) { 
		uint8_t *end = data + len;
		latch();
		while(data != end) { 
			writeByte(D::adjust(*data++));
		}
		release();	
	}

	static void writeBytes(register uint8_t *data, int len) { writeBytes<DATA_NOP>(data, len); }

	// write a block of uint8_ts out in groups of three.  len is the total number of uint8_ts to write out.  The template
	// parameters indicate how many uint8_ts to skip at the beginning and/or end of each grouping
	template <uint8_t SKIP, class D> static void writeBytes3(register uint8_t *data, int len) { 
		uint8_t *end = data + len;
		latch();
		while(data != end) { 
			data += SKIP;
			// a slight touch of delay here helps optimize the timing of the status register check loop 
			writeByte(D::adjust(*data++)); delaycycles<3>();
			writeByte(D::adjust(*data++)); delaycycles<3>();
			writeByte(D::adjust(*data++)); delaycycles<3>();
		}
		release();
	}

	template <uint8_t SKIP> static void writeBytes3(register uint8_t *data, int len) { writeBytes3<SKIP, DATA_NOP>(data, len); }
	template <class D> static void writeBytes3(register uint8_t *data, int len) { writeBytes3<0, D>(data, len); }
	static void writeBytes3(register uint8_t *data, int len) { writeBytes3<0, DATA_NOP>(data, len); }

};


//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
//
// External SPI template definition with partial instantiation(s) to map to hardware SPI ports
//
//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

template<uint8_t _DATA_PIN, uint8_t _CLOCK_PIN, uint8_t _LATCH_PIN, uint8_t _SPI_SPEED>
class AVRSPIOutput : public AVRSoftwareSPIOutput<_DATA_PIN, _CLOCK_PIN, _LATCH_PIN, _SPI_SPEED> {};

// uno/mini/duemilanove
#if defined(__AVR_ATmega328P__) || defined(__AVR_ATmega168__)
#define SPI_DATA 11
#define SPI_CLOCK 13
#define SPI_LATCH 10
template<uint8_t SPI_SPEED>
class AVRSPIOutput<SPI_DATA, SPI_CLOCK, SPI_LATCH, SPI_SPEED> : public AVRHardwareSPIOutput<SPI_DATA, SPI_CLOCK, SPI_LATCH, SPI_SPEED> {};

// Leonardo, teensy, blinkm
#elif defined(__AVR_ATmega32U4__)
#define SPI_DATA 2
#define SPI_CLOCK 1
#define SPI_LATCH 0
template<uint8_t SPI_SPEED>
class AVRSPIOutput<SPI_DATA, SPI_CLOCK, SPI_LATCH, SPI_SPEED> : public AVRHardwareSPIOutput<SPI_DATA, SPI_CLOCK, SPI_LATCH, SPI_SPEED> {};


#else
#pragma message "No hardware SPI pins defined.  All SPI access will default to bitbanged output"
#endif

#endif