From aaaf16b05617fb5717dd78087a914e684a1a4f22 Mon Sep 17 00:00:00 2001 From: Eya Date: Wed, 15 Jan 2020 10:51:22 +0100 Subject: Release v1.4.0 --- .../CMSIS/DSP/DSP_Lib_TestSuite/buildDspLibs.bat | 116 - .../CMSIS/DSP/DSP_Lib_TestSuite/buildRefLibs.bat | 116 - Drivers/CMSIS/DSP/DSP_Lib_TestSuite/runTest.bat | 129 - .../DSP/Projects/ARM/arm_cortexM_math_Build.bat | 83 - .../DSP/Projects/GCC/arm_cortexM_math_Build.bat | 83 - .../DSP/Projects/IAR/arm_cortexM_math_Build.bat | 104 - Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/runTest.bat | 57 - .../Inc/Legacy/stm32_hal_legacy.h | 147 +- .../Inc/stm32wbxx_hal_conf_template.h | 10 +- .../STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp.h | 2 + .../Inc/stm32wbxx_hal_i2c_ex.h | 3 + .../STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_ipcc.h | 6 +- .../STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_lptim.h | 35 + .../STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_pka.h | 9 + .../STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_tsc.h | 6 +- .../STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_adc.h | 77 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.../EWARM/Zigbee_OnOff_Distrib.ewp | 1264 ------ .../EWARM/startup_stm32wb55xx_cm4.s | 517 --- .../EWARM/stm32wb55xx_flash_cm4.icf | 47 - .../STM32_WPAN/App/app_zigbee.c | 317 -- .../STM32_WPAN/App/app_zigbee.h | 61 - .../STM32_WPAN/App/app_zigbee_demo.c | 396 -- .../STM32_WPAN/Target/hw_ipcc.c | 491 --- .../Zigbee/Zigbee_OnOff_Distrib/readme.txt | 135 - .../Zigbee_OnOff_Router/Core/Inc/app_common.h | 114 - .../Zigbee/Zigbee_OnOff_Router/Core/Inc/app_conf.h | 347 -- .../Zigbee_OnOff_Router/Core/Inc/app_entry.h | 68 - .../Zigbee/Zigbee_OnOff_Router/Core/Inc/hw_conf.h | 219 -- .../Zigbee/Zigbee_OnOff_Router/Core/Inc/hw_if.h | 250 -- .../Zigbee/Zigbee_OnOff_Router/Core/Inc/main.h | 71 - .../Zigbee_OnOff_Router/Core/Inc/stm32_lpm_if.h | 81 - .../Core/Inc/stm32wbxx_hal_conf.h | 353 -- .../Zigbee_OnOff_Router/Core/Inc/stm32wbxx_it.h | 83 - .../Zigbee_OnOff_Router/Core/Inc/stm_logging.h | 55 - .../Zigbee_OnOff_Router/Core/Inc/utilities_conf.h | 68 - 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.../Zigbee_OnOff_Server_Coord/Core/Inc/app_conf.h | 347 ++ .../Zigbee_OnOff_Server_Coord/Core/Inc/app_entry.h | 68 + .../Zigbee_OnOff_Server_Coord/Core/Inc/hw_conf.h | 219 ++ .../Zigbee_OnOff_Server_Coord/Core/Inc/hw_if.h | 250 ++ .../Zigbee_OnOff_Server_Coord/Core/Inc/main.h | 71 + .../Core/Inc/stm32_lpm_if.h | 81 + .../Core/Inc/stm32wbxx_hal_conf.h | 353 ++ .../Core/Inc/stm32wbxx_it.h | 83 + .../Core/Inc/stm_logging.h | 55 + .../Core/Inc/utilities_conf.h | 68 + .../Zigbee_OnOff_Server_Coord/Core/Src/app_entry.c | 428 ++ .../Core/Src/hw_timerserver.c | 893 +++++ .../Zigbee_OnOff_Server_Coord/Core/Src/hw_uart.c | 318 ++ .../Zigbee_OnOff_Server_Coord/Core/Src/main.c | 521 +++ .../Core/Src/stm32_lpm_if.c | 275 ++ .../Core/Src/stm32wbxx_hal_msp.c | 334 ++ .../Core/Src/stm32wbxx_it.c | 411 ++ .../Core/Src/stm_logging.c | 205 + .../Core/Src/system_stm32wbxx.c | 353 ++ .../Zigbee_OnOff_Server_Coord/EWARM/Project.eww | 7 + .../EWARM/Zigbee_OnOff_Server_Coord.ewd | 1419 +++++++ .../EWARM/Zigbee_OnOff_Server_Coord.ewp | 1261 ++++++ .../EWARM/startup_stm32wb55xx_cm4.s | 517 +++ .../EWARM/stm32wb55xx_flash_cm4.icf | 47 + .../STM32_WPAN/App/app_zigbee.c | 561 +++ .../STM32_WPAN/App/app_zigbee.h | 61 + .../STM32_WPAN/Target/hw_ipcc.c | 491 +++ .../Zigbee/Zigbee_OnOff_Server_Coord/readme.txt | 133 + .../Core/Inc/app_common.h | 114 + .../Core/Inc/app_conf.h | 347 ++ .../Core/Inc/app_entry.h | 68 + .../Zigbee_OnOff_Server_Distrib/Core/Inc/hw_conf.h | 219 ++ .../Zigbee_OnOff_Server_Distrib/Core/Inc/hw_if.h | 250 ++ .../Zigbee_OnOff_Server_Distrib/Core/Inc/main.h | 71 + .../Core/Inc/stm32_lpm_if.h | 81 + .../Core/Inc/stm32wbxx_hal_conf.h | 353 ++ .../Core/Inc/stm32wbxx_it.h | 83 + .../Core/Inc/stm_logging.h | 55 + .../Core/Inc/utilities_conf.h | 68 + .../Core/Src/app_entry.c | 428 ++ .../Core/Src/hw_timerserver.c | 893 +++++ .../Zigbee_OnOff_Server_Distrib/Core/Src/hw_uart.c | 318 ++ .../Zigbee_OnOff_Server_Distrib/Core/Src/main.c | 521 +++ .../Core/Src/stm32_lpm_if.c | 275 ++ .../Core/Src/stm32wbxx_hal_msp.c | 334 ++ .../Core/Src/stm32wbxx_it.c | 411 ++ .../Core/Src/stm_logging.c | 205 + .../Core/Src/system_stm32wbxx.c | 353 ++ .../Zigbee_OnOff_Server_Distrib/EWARM/Project.eww | 7 + .../EWARM/Zigbee_OnOff_Server_Distrib.ewd | 1419 +++++++ .../EWARM/Zigbee_OnOff_Server_Distrib.ewp | 1261 ++++++ .../EWARM/startup_stm32wb55xx_cm4.s | 517 +++ .../EWARM/stm32wb55xx_flash_cm4.icf | 47 + .../STM32_WPAN/App/app_zigbee.c | 564 +++ .../STM32_WPAN/App/app_zigbee.h | 61 + .../STM32_WPAN/Target/hw_ipcc.c | 491 +++ .../Zigbee/Zigbee_OnOff_Server_Distrib/readme.txt | 132 + .../Core/Inc/stm32wbxx_hal_conf.h | 10 +- .../Core/Src/stm32wbxx_it.c | 4 +- .../ADC_AnalogWatchdog/Inc/stm32wbxx_hal_conf.h | 4 +- .../Inc/stm32wbxx_hal_conf.h | 4 +- .../ADC/ADC_Oversampling/Inc/stm32wbxx_hal_conf.h | 4 +- .../Inc/stm32wbxx_hal_conf.h | 4 +- .../Inc/stm32wbxx_hal_conf.h | 4 +- .../BSP/BSP_Example/Inc/stm32wbxx_hal_conf.h | 10 +- .../Examples/BSP/BSP_Example/Src/stm32wbxx_it.c | 4 +- .../Inc/stm32wbxx_hal_conf.h | 8 +- .../Src/stm32wbxx_it.c | 3 - .../Inc/stm32wbxx_hal_conf.h | 10 +- .../Src/stm32wbxx_it.c | 6 +- .../CRC/CRC_Example/Inc/stm32wbxx_hal_conf.h | 10 +- .../Examples/CRC/CRC_Example/Src/stm32wbxx_it.c | 4 +- .../Inc/stm32wbxx_hal_conf.h | 10 +- .../CRC_UserDefinedPolynomial/Src/stm32wbxx_it.c | 4 +- .../CRYP/CRYP_AESModes/Inc/stm32wbxx_hal_conf.h | 10 +- .../Examples/CRYP/CRYP_AESModes/Src/stm32wbxx_it.c | 7 - .../CRYP/CRYP_DMA/Inc/stm32wbxx_hal_conf.h | 10 +- .../Examples/CRYP/CRYP_DMA/Src/stm32wbxx_it.c | 7 - .../Cortex/CORTEXM_MPU/Inc/stm32wbxx_hal_conf.h | 10 +- .../Examples/Cortex/CORTEXM_MPU/Src/stm32wbxx_it.c | 4 +- .../CORTEXM_ModePrivilege/Inc/stm32wbxx_hal_conf.h | 10 +- .../CORTEXM_ModePrivilege/Src/stm32wbxx_it.c | 4 +- .../CORTEXM_SysTick/Inc/stm32wbxx_hal_conf.h | 10 +- .../Cortex/CORTEXM_SysTick/Src/stm32wbxx_it.c | 4 +- .../DMA/DMA_FLASHToRAM/Inc/stm32wbxx_hal_conf.h | 10 +- .../Examples/DMA/DMA_FLASHToRAM/Src/stm32wbxx_it.c | 3 - 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.../RTC/RTC_Calendar/Inc/stm32wbxx_hal_conf.h | 10 +- .../Examples/RTC/RTC_Calendar/Src/stm32wbxx_it.c | 4 +- .../Examples/RTC/RTC_LSI/Inc/stm32wbxx_hal_conf.h | 10 +- .../Examples/RTC/RTC_LSI/Src/stm32wbxx_it.c | 5 - .../RTC/RTC_Tamper/Inc/stm32wbxx_hal_conf.h | 10 +- .../Examples/RTC/RTC_Tamper/Src/stm32wbxx_it.c | 3 - .../RTC/RTC_TimeStamp/Inc/stm32wbxx_hal_conf.h | 10 +- .../Examples/RTC/RTC_TimeStamp/Src/stm32wbxx_it.c | 3 - .../Inc/stm32wbxx_hal_conf.h | 10 +- .../Src/stm32wbxx_it.c | 7 - .../Inc/stm32wbxx_hal_conf.h | 10 +- .../SPI_FullDuplex_ComDMA_Slave/Src/stm32wbxx_it.c | 7 - .../Inc/stm32wbxx_hal_conf.h | 10 +- .../SPI_FullDuplex_ComIT_Master/Src/stm32wbxx_it.c | 3 - .../Inc/stm32wbxx_hal_conf.h | 10 +- .../SPI_FullDuplex_ComIT_Slave/Src/stm32wbxx_it.c | 3 - .../Inc/stm32wbxx_hal_conf.h | 10 +- .../Src/stm32wbxx_it.c | 4 +- .../Inc/stm32wbxx_hal_conf.h | 10 +- .../Src/stm32wbxx_it.c | 4 +- .../Examples/TIM/TIM_DMA/Inc/stm32wbxx_hal_conf.h | 10 +- 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Projects/P-NUCLEO-WB55.USBDongle/Applications/Zigbee/Zigbee_OnOff_Server_Coord/STM32_WPAN/Target/hw_ipcc.c create mode 100644 Projects/P-NUCLEO-WB55.USBDongle/Applications/Zigbee/Zigbee_OnOff_Server_Coord/readme.txt create mode 100644 Projects/STM32WB_Copro_Wireless_Binaries/stm32wb5x_Zigbee_FFD_Full_fw.bin delete mode 100644 Projects/STM32WB_Copro_Wireless_Binaries/stm32wb5x_zigbee_full_fw.bin delete mode 100644 Utilities/lpm/tiny_lpm/Release_Notes.md diff --git a/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/buildDspLibs.bat b/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/buildDspLibs.bat deleted file mode 100644 index 62d259de3..000000000 --- a/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/buildDspLibs.bat +++ /dev/null @@ -1,116 +0,0 @@ -@echo off - -set UVEXE=C:\Keil_v5\UV4\UV4.EXE -set CURDIR=%CD% - -if .%1==. goto help -for %%a in (ARM GCC) do if %1==%%a goto startBuild -goto help - -:startBuild -echo. -echo Building DSP Libraries %1 - -if %1==ARM goto buildARM -if %1==GCC goto buildGCC -goto err - -:buildARM -:buildGCC -cd ..\DSP_Lib\Source\%1 - -echo Building DSP Library for Cortex-M0 Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0l" -o "DspLib_cortexM0l_build.log" - -echo Building DSP Library for Cortex-M3 Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3l" -o "DspLib_cortexM3l_build.log" - -echo Building DSP Library for Cortex-M4 Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l" -o "DspLib_cortexM4l_build.log" - -echo Building DSP Library for Cortex-M4 Little Endian with single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf" -o "DspLib_cortexM4lf_build.log" - -echo Building DSP Library for Cortex-M7 Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l" -o "DspLib_cortexM7l_build.log" - -echo Building DSP Library for Cortex-M7 Little Endian with single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp" -o "DspLib_cortexM7lfsp_build.log" - -echo Building DSP Library for Cortex-M7 Little Endian with double precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp" -o "DspLib_cortexM7lfdp_build.log" - -echo Building DSP Library for ARMv8-M Baseline Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MBLl" -o "DspLib_ARMv8MBLl_build.log" - -echo Building DSP Library for ARMv8-M Mainline Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl" -o "DspLib_ARMv8MMLl_build.log" - -echo Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log" - -REM echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU -REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log" - -echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log" - -echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log" - -REM echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU -REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log" - - -REM big endian libraries are skipped! - -REM echo Building DSP Library for Cortex-M0 Big Endian -REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b" -o "DspLib_cortexM0b_build.log" - -REM echo Building DSP Library for Cortex-M3 Big Endian -REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b" -o "DspLib_cortexM3b_build.log" - -REM echo Building DSP Library for Cortex-M4 Big Endian -REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log" - -REM echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU -REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log" - -REM echo Building DSP Library for Cortex-M7 Big Endian -REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log" - -REM echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU -REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log" - -REM echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU -REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log" - -goto deleteIntermediateFiles - - -:deleteIntermediateFiles -echo. -echo Deleting intermediate files -rmdir /S /Q IntermediateFiles -del /Q *.bak -del /Q *.dep -del /Q *.uvguix.* -del /Q ArInp.* - -goto changeDir - - -:changeDir -cd %CURDIR% -goto end - -:err - -:help -echo Syntax: buildDspLibs toolchain -echo. -echo toolchain: ARM ^| GCC -echo. -echo e.g.: buildDspLibs ARM - -:end diff --git a/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/buildRefLibs.bat b/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/buildRefLibs.bat deleted file mode 100644 index 05bc66e7f..000000000 --- a/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/buildRefLibs.bat +++ /dev/null @@ -1,116 +0,0 @@ -@echo off - -set UVEXE=C:\Keil_v5\UV4\UV4.EXE -set CURDIR=%CD% - -if .%1==. goto help -for %%a in (ARM GCC) do if %1==%%a goto startBuild -goto help - -:startBuild -echo. -echo Building DSP Reference Libraries %1 - -if %1==ARM goto buildARM -if %1==GCC goto buildGCC -goto err - -:buildARM -:buildGCC -cd .\RefLibs\%1 - -echo Building DSP Reference Library for Cortex-M0 Little Endian -%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM0l" -o "RefLib_cortexM0l_build.log" - -echo Building DSP Reference Library for Cortex-M3 Little Endian -%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM3l" -o "RefLib_cortexM3l_build.log" - -echo Building DSP Reference Library for Cortex-M4 Little Endian -%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM4l" -o "RefLib_cortexM4l_build.log" - -echo Building DSP Reference Library for Cortex-M4 Little Endian with single precision FPU -%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM4lf" -o "RefLib_cortexM4lf_build.log" - -echo Building DSP Reference Library for Cortex-M7 Little Endian -%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7l" -o "RefLib_cortexM7l_build.log" - -echo Building DSP Reference Library for Cortex-M7 Little Endian with single precision FPU -%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7lfsp" -o "RefLib_cortexM7lfsp_build.log" - -echo Building DSP Reference Library for Cortex-M7 Little Endian with double precision FPU -%UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7lfdp" -o "RefLib_cortexM7lfdp_build.log" - -echo Building DSP Reference Library for ARMv8-M Baseline Little Endian -%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MBLl" -o "RefLib_ARMv8MBLl_build.log" - -echo Building DSP Reference Library for ARMv8-M Mainline Little Endian -%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLl" -o "RefLib_ARMv8MMLl_build.log" - -echo Building DSP Reference Library for ARMv8-M Mainline Little Endian with single precision FPU -%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLlfsp" -o "RefLib_ARMv8MMLlfsp_build.log" - -REM echo Building DSP Reference Library for ARMv8-M Mainline Little Endian with double precision FPU -REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLlfdp" -o "RefLib_ARMv8MMLlfdp_build.log" - -echo Building DSP Reference Library for ARMv8-M Mainline Little Endian with DSP instructions -%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLld" -o "RefLib_ARMv8MMLld_build.log" - -echo Building DSP Reference Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU -%UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLldfsp" -o "RefLib_ARMv8MMLldfsp_build.log" - -REM echo Building DSP Reference Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU -REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "ARMv8MMLldfdp" -o "RefLib_ARMv8MMLldfdp_build.log" - - -REM big endian libraries are skipped! - -REM echo Building DSP Reference Library for Cortex-M0 Big Endian -REM %UVEXE% -rb -j0 RefLibs.uvprojx -t"cortexM0b" -o "RefLib_cortexM0b_build.log" - -REM echo Building DSP Reference Library for Cortex-M3 Big Endian -REM %UVEXE% -rb -j0 RefLibs.uvprojx -t"cortexM3b" -o "RefLib_cortexM3b_build.log" - -REM echo Building DSP Reference Library for Cortex-M4 Big Endian -REM %UVEXE% -rb -j0 RefLibs.uvprojx -t"cortexM4b" -o "RefLib_cortexM4b_build.log" - -REM echo Building DSP Reference Library for Cortex-M4 Big Endian Big Endian with single precision FPU -REM %UVEXE% -rb -j0 RefLibs.uvprojx -t"cortexM4bf" -o "RefLib_cortexM4bf_build.log" - -REM echo Building DSP Reference Library for Cortex-M7 Big Endian -REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7b" -o "RefLib_cortexM7b_build.log" - -REM echo Building DSP Reference Library for Cortex-M7 Big Endian with single precision FPU -REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7bfsp" -o "RefLib_cortexM7bfsp_build.log" - -REM echo Building DSP Reference Library for Cortex-M7 Big Endian with double precision FPU -REM %UVEXE% -rb -j0 RefLibs.uvprojx -t "cortexM7bfdp" -o "RefLib_cortexM7bfdp_build.log" - -goto deleteIntermediateFiles - - -:deleteIntermediateFiles -echo. -echo Deleting intermediate files -rmdir /S /Q IntermediateFiles -del /Q *.bak -del /Q *.dep -del /Q *.uvguix.* -del /Q ArInp.* - -goto changeDir - - -:changeDir -cd %CURDIR% -goto end - -:err - -:help -echo Syntax: buildRefLibs toolchain -echo. -echo toolchain: ARM ^| GCC -echo. -echo e.g.: buildRefLibs ARM - -:end diff --git a/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/runTest.bat b/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/runTest.bat deleted file mode 100644 index 1d45a4c74..000000000 --- a/Drivers/CMSIS/DSP/DSP_Lib_TestSuite/runTest.bat +++ /dev/null @@ -1,129 +0,0 @@ -@echo off - -set UVEXE=C:\Keil_v5\UV4\UV4.EXE - -if .%1==. goto help -for %%a in (ARM GCC) do if %1==%%a goto checkParam2 -echo parameter %1 not supported. -goto help - -:checkParam2 -if .%2==. goto help -for %%a in ( ^ - cortexM0l ^ - cortexM3l ^ - cortexM4l ^ - cortexM4lf ^ - cortexM7l ^ - cortexM7lfsp ^ - cortexM7lfdp ^ - ARMv8MBLl ^ - ARMv8MMLl ^ - ARMv8MMLlfsp ^ - ARMv8MMLlfdp ^ - ARMv8MMLld ^ - ARMv8MMLldfsp ^ - ARMv8MMLldfdp ^ - ) do if %2==%%a goto checkParam3 -echo parameter %2 not supported. -goto help - -:checkParam3 -if .%3==. goto help -for %%a in (MPS2 FVP Simulator) do if %3==%%a goto CheckLibraries -echo parameter %3 not supported. -goto help - -:CheckLibraries -if %1==ARM goto CheckLibrariesARM -if %1==GCC goto CheckLibrariesGCC - -:CheckLibrariesARM -if not exist ".\RefLibs\%1\Lib\arm_%2_ref.lib" (echo ".\RefLibs\%1\Lib\arm_%2_ref.lib" not found. & goto end) -if not exist "..\Lib\%1\arm_%2_math.lib" (echo "..\Lib\%1\arm_%2_ref.lib" not found. & goto end) -goto CopyLibrariesARM - -:CheckLibrariesGCC -if not exist ".\RefLibs\%1\Lib\libarm_%2_ref.a" (echo ".\RefLibs\%1\Lib\libarm_%2_ref.a" not found. & goto end) -if not exist "..\Lib\%1\libarm_%2_math.a" (echo "..\Lib\%1\libarm_%2_math.a" not found. & goto end) -goto CopyLibrariesGCC - -:CopyLibrariesARM -copy /B ".\RefLibs\%1\Lib\arm_%2_ref.lib" .\DspLibTest_%3\%1\Lib\arm_ref.lib /B /Y -copy /B "..\Lib\%1\arm_%2_math.lib" .\DspLibTest_%3\%1\Lib\arm_math.lib /B /Y -goto buildProject - -:CopyLibrariesGCC -copy /B ".\RefLibs\%1\Lib\libarm_%2_ref.a" .\DspLibTest_%3\%1\Lib\libarm_ref.a /B /Y -copy /B "..\Lib\%1\libarm_%2_math.a" .\DspLibTest_%3\%1\Lib\libarm_math.a /B /Y -goto buildProject - -:buildProject - echo Build Test Project ... -%UVEXE% -r -j0 .\DspLibTest_%3\%1\DspLibTest_%3.uvprojx -t "%2" -o ".\Logs\DspLibTest_%3_%2_build.log" - - echo Run Test ... -del /Q ".\DspLibTest_%3\%1\Logs\DspLibTest_%3.log" 2>NUL -del /Q ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2.log" 2>NUL - -rem get start time (The format of %TIME% is HH:MM:SS,CS for example 23:59:59,99) -set STARTTIME=%TIME% - -rem run the test -%UVEXE% -d .\DspLibTest_%3\%1\DspLibTest_%3.uvprojx -t "%2" - -rem get end time -set ENDTIME=%TIME% - -rem calculate duration -rem Change formatting for the start and end times -for /F "tokens=1-4 delims=:.," %%a in ("%STARTTIME%") do ( - set /A "start=(((%%a*60)+1%%b %% 100)*60+1%%c %% 100)*100+1%%d %% 100" -) - -for /F "tokens=1-4 delims=:.," %%a in ("%ENDTIME%") do ( - set /A "end=(((%%a*60)+1%%b %% 100)*60+1%%c %% 100)*100+1%%d %% 100" -) - -rem Test midnight rollover. If so, add 1 day=8640000 1/100ths secs -if %end% lss %start% set /a end+=8640000 - -rem Calculate the elapsed time by subtracting values -set /A elapsed=end-start - -rem Format the results for output -set /A hh=elapsed/(60*60*100), rest=elapsed%%(60*60*100), mm=rest/(60*100), rest%%=60*100, ss=rest/100, cc=rest%%100 -if %hh% lss 10 set hh=0%hh% -if %mm% lss 10 set mm=0%mm% -if %ss% lss 10 set ss=0%ss% -if %cc% lss 10 set cc=0%cc% - -set DURATION=%hh%:%mm%:%ss%,%cc% - -rem write time to file -echo Test %1 %2 : > ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2_time.log" -echo Start time: %STARTTIME% >> ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2_time.log" -echo End time: %ENDTIME% >> ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2_time.log" -echo Duration: %DURATION% >> ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2_time.log" - - echo Copy Logfile ... -copy /B ".\DspLibTest_%3\%1\Logs\DspLibTest_%3.log" ".\DspLibTest_%3\%1\Logs\DspLibTest_%3_%2.log" - -goto end - - -:help -echo. -echo Syntax: runTest toolchain core test -echo. -echo toolchain: ARM ^| GCC -echo core: cortexM0l ^| cortexM3l ^| cortexM4l ^| cortexM4lf ^| cortexM7l ^| cortexM7lfsp ^| cortexM7lfdp -echo ARMv8MBLl -echo ARMv8MMLl ^| ARMv8MMLlfsp ^| ARMv8MMLlfdp -echo ARMv8MMLld ^| ARMv8MMLldfsp ^| ARMv8MMLldfdp -echo test: MPS2 ^| FVP ^| Simulator -echo. -echo e.g.: runTest ARM cortexM3l Simulator - -:end -@echo on diff --git a/Drivers/CMSIS/DSP/Projects/ARM/arm_cortexM_math_Build.bat b/Drivers/CMSIS/DSP/Projects/ARM/arm_cortexM_math_Build.bat deleted file mode 100644 index d521939d5..000000000 --- a/Drivers/CMSIS/DSP/Projects/ARM/arm_cortexM_math_Build.bat +++ /dev/null @@ -1,83 +0,0 @@ -@echo off - -mkdir Temp -set TMP=Temp -set TEMP=Temp -set UVEXE=C:\Keil_v5\UV4\UV4.EXE - -echo. -echo Building DSP Libraries ARM -echo Building DSP Library for Cortex-M0 Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0l" -o "DspLib_cortexM0l_build.log" - -echo Building DSP Library for Cortex-M3 Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3l" -o "DspLib_cortexM3l_build.log" - -echo Building DSP Library for Cortex-M4 Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l" -o "DspLib_cortexM4l_build.log" - -echo Building DSP Library for Cortex-M4 Little Endian with single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf" -o "DspLib_cortexM4lf_build.log" - -echo Building DSP Library for Cortex-M7 Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l" -o "DspLib_cortexM7l_build.log" - -echo Building DSP Library for Cortex-M7 Little Endian with single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp" -o "DspLib_cortexM7lfsp_build.log" - -echo Building DSP Library for Cortex-M7 Little Endian with double precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp" -o "DspLib_cortexM7lfdp_build.log" - -echo Building DSP Library for ARMv8-M Baseline Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MBLl" -o "DspLib_ARMv8MBLl_build.log" - -echo Building DSP Library for ARMv8-M Mainline Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl" -o "DspLib_ARMv8MMLl_build.log" - -echo Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log" - -REM echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU -REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log" - -echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log" - -echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log" - -REM echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU -REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log" - - -REM big endian libraries - -echo Building DSP Library for Cortex-M0 Big Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b" -o "DspLib_cortexM0b_build.log" - -echo Building DSP Library for Cortex-M3 Big Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b" -o "DspLib_cortexM3b_build.log" - -echo Building DSP Library for Cortex-M4 Big Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log" - -echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log" - -echo Building DSP Library for Cortex-M7 Big Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log" - -echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log" - -echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log" - -echo. -echo Deleting intermediate files -rmdir /S /Q Temp -rmdir /S /Q IntermediateFiles -del /Q *.bak -del /Q *.dep -del /Q *.uvguix.* -del /Q ArInp.* \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Projects/GCC/arm_cortexM_math_Build.bat b/Drivers/CMSIS/DSP/Projects/GCC/arm_cortexM_math_Build.bat deleted file mode 100644 index 7b3a44bfe..000000000 --- a/Drivers/CMSIS/DSP/Projects/GCC/arm_cortexM_math_Build.bat +++ /dev/null @@ -1,83 +0,0 @@ -@echo off - -mkdir Temp -set TMP=Temp -set TEMP=Temp -set UVEXE=C:\Keil_v5\UV4\UV4.EXE - -echo. -echo Building DSP Libraries GCC -echo. -echo Building DSP Library for Cortex-M0 Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0l" -o "DspLib_cortexM0l_build.log" - -echo Building DSP Library for Cortex-M3 Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3l" -o "DspLib_cortexM3l_build.log" - -echo Building DSP Library for Cortex-M4 Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4l" -o "DspLib_cortexM4l_build.log" - -echo Building DSP Library for Cortex-M4 Little Endian with single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4lf" -o "DspLib_cortexM4lf_build.log" - -echo Building DSP Library for Cortex-M7 Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7l" -o "DspLib_cortexM7l_build.log" - -echo Building DSP Library for Cortex-M7 Little Endian with single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfsp" -o "DspLib_cortexM7lfsp_build.log" - -echo Building DSP Library for Cortex-M7 Little Endian with double precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7lfdp" -o "DspLib_cortexM7lfdp_build.log" - -echo Building DSP Library for ARMv8-M Baseline Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MBLl" -o "DspLib_ARMv8MBLl_build.log" - -echo Building DSP Library for ARMv8-M Mainline Little Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLl" -o "DspLib_ARMv8MMLl_build.log" - -echo Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfsp" -o "DspLib_ARMv8MMLlfsp_build.log" - -REM echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU -REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLlfdp" -o "DspLib_ARMv8MMLlfdp_build.log" - -echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLld" -o "DspLib_ARMv8MMLld_build.log" - -echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfsp" -o "DspLib_ARMv8MMLldfsp_build.log" - -REM echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU -REM %UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "ARMv8MMLldfdp" -o "DspLib_ARMv8MMLldfdp_build.log" - -REM big endian libraries - -echo Building DSP Library for Cortex-M0 Big Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM0b" -o "DspLib_cortexM0b_build.log" - -echo Building DSP Library for Cortex-M3 Big Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM3b" -o "DspLib_cortexM3b_build.log" - -echo Building DSP Library for Cortex-M4 Big Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4b" -o "DspLib_cortexM4b_build.log" - -echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM4bf" -o "DspLib_cortexM4bf_build.log" - -echo Building DSP Library for Cortex-M7 Big Endian -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7b" -o "DspLib_cortexM7b_build.log" - -echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfsp" -o "DspLib_cortexM7bfsp_build.log" - -echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU -%UVEXE% -rb -j0 arm_cortexM_math.uvprojx -t "cortexM7bfdp" -o "DspLib_cortexM7bfdp_build.log" - -echo. -echo Deleting intermediate files -rmdir /S /Q Temp -rmdir /S /Q IntermediateFiles -del /Q *.bak -del /Q *.dep -del /Q *.uvguix.* -del /Q ArInp.* \ No newline at end of file diff --git a/Drivers/CMSIS/DSP/Projects/IAR/arm_cortexM_math_Build.bat b/Drivers/CMSIS/DSP/Projects/IAR/arm_cortexM_math_Build.bat deleted file mode 100644 index 5e96c1971..000000000 --- a/Drivers/CMSIS/DSP/Projects/IAR/arm_cortexM_math_Build.bat +++ /dev/null @@ -1,104 +0,0 @@ -@echo off - -mkdir Temp -set TMP=Temp -set TEMP=Temp -rem set IAREXE=..\..\..\..\..\common\bin\iarbuild.exe -set IAREXE=iarbuild.exe - -echo. -echo Building DSP Libraries ARM -echo Building DSP Library for Cortex-M0 Little Endian -%IAREXE% arm_cortexM_math.ewp -build cortexM0l - -echo Building DSP Library for Cortex-M3 Little Endian -%IAREXE% arm_cortexM_math.ewp -build cortexM3l - -echo Building DSP Library for Cortex-M4 Little Endian -%IAREXE% arm_cortexM_math.ewp -build cortexM4l - -echo Building DSP Library for Cortex-M4 Little Endian with single precision FPU -%IAREXE% arm_cortexM_math.ewp -build cortexM4lf - -echo Building DSP Library for Cortex-M7 Little Endian -%IAREXE% arm_cortexM_math.ewp -build cortexM7l - -echo Building DSP Library for Cortex-M7 Little Endian with single precision FPU -%IAREXE% arm_cortexM_math.ewp -build cortexM7lfsp - -echo Building DSP Library for Cortex-M7 Little Endian with double precision FPU -%IAREXE% arm_cortexM_math.ewp -build cortexM7lfdp - -echo Building DSP Library for ARMv8-M Baseline Little Endian -%IAREXE% arm_cortexM_math.ewp -build ARMv8MBLl - -echo Building DSP Library for ARMv8-M Mainline Little Endian -%IAREXE% arm_cortexM_math.ewp -build ARMv8MMLl - -echo Building DSP Library for ARMv8-M Mainline Little Endian with single precision FPU -%IAREXE% arm_cortexM_math.ewp -build ARMv8MMLlfsp - -echo Building DSP Library for ARMv8-M Mainline Little Endian with double precision FPU -%IAREXE% arm_cortexM_math.ewp -build ARMv8MMLlfdp - -echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions -%IAREXE% arm_cortexM_math.ewp -build ARMv8MMLld - -echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, single precision FPU -%IAREXE% arm_cortexM_math.ewp -build ARMv8MMLldfsp - -echo Building DSP Library for ARMv8-M Mainline Little Endian with DSP instructions, double precision FPU -%IAREXE% arm_cortexM_math.ewp -build ARMv8MMLldfdp - -REM big endian libraries - -echo Building DSP Library for Cortex-M0 Big Endian -%IAREXE% arm_cortexM_math.ewp -build cortexM0b - -echo Building DSP Library for Cortex-M3 Big Endian -%IAREXE% arm_cortexM_math.ewp -build cortexM3b - -echo Building DSP Library for Cortex-M4 Big Endian -%IAREXE% arm_cortexM_math.ewp -build cortexM4b - -echo Building DSP Library for Cortex-M4 Big Endian with single precision FPU -%IAREXE% arm_cortexM_math.ewp -build cortexM4bf - -echo Building DSP Library for Cortex-M7 Big Endian -%IAREXE% arm_cortexM_math.ewp -build cortexM7b - -echo Building DSP Library for Cortex-M7 Big Endian with single precision FPU -%IAREXE% arm_cortexM_math.ewp -build cortexM7bfsp - -echo Building DSP Library for Cortex-M7 Big Endian with double precision FPU -%IAREXE% arm_cortexM_math.ewp -build cortexM7bfdp - -echo Copy libs to CMSIS\lib\IAR -mkdir ..\..\..\lib\IAR -copy ReleaseM0BE\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ReleaseM0LE\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ReleaseM3BE\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ReleaseM3LE\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ReleaseM4BE\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ReleaseM4BE_FPU\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ReleaseM4LE\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ReleaseM4LE_FPU\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ReleaseM7BE\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ReleaseM7BE_FPU_DP\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ReleaseM7BE_FPU_SP\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ReleaseM7LE\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ReleaseM7LE_FPU_DP\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ReleaseM7LE_FPU_SP\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ARMv8MBLl\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ARMv8MMLl\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ARMv8MMLld\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ARMv8MMLldfdp\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ARMv8MMLldfsp\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ARMv8MMLlfdp\Exe\*.a ..\..\..\lib\IAR\ /Y -copy ARMv8MMLlfsp\Exe\*.a ..\..\..\lib\IAR\ /Y - -echo. -echo Deleting intermediate files -for /d %%a in (Temp ARMv8M* ReleaseM*) do rmdir /s /q "%%~a" -del /Q *.bak -del /Q *.dep diff --git a/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/runTest.bat b/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/runTest.bat deleted file mode 100644 index fbf8cdb50..000000000 --- a/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/runTest.bat +++ /dev/null @@ -1,57 +0,0 @@ -@echo off - -set UVEXE=C:\Keil_v5\UV4\UV4.EXE - -echo Building NN Test for Cortex-M7 Single Precision Little Endian -%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM7_SP" -o "NN_Test_ARMCM7_SP_build.log" - -echo Running NN Test for Cortex-M7 Single Precision Little Endian -%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM7_SP" -j0 - -type NN_TEST.log -del NN_TEST.log - -echo Building NN Test for Cortex-M4 FP Little Endian -%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM4_FP" -o "NN_Test_ARMCM4_FP_build.log" - -echo Running NN Test for Cortex-M4 FP Little Endian -%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM4_FP" -j0 - -type NN_TEST.log -del NN_TEST.log - -echo Building NN Test for Cortex-M4 FP Little Endian Truncate -%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM4_FP_truncate" -o "NN_Test_ARMCM4_FP_truncate_build.log" - -echo Running NN Test for Cortex-M4 FP Little Endian Truncate -%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM4_FP_truncate" -j0 - -type NN_TEST.log -del NN_TEST.log - -echo Building NN Test for Cortex-M7 Single Precision Big Endian -%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM7b_SP" -o "NN_Test_ARMCM7b_SP_build.log" - -echo Running NN Test for Cortex-M7 Single Precision Big Endian -%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM7b_SP" -j0 - -type NN_TEST.log -del NN_TEST.log - -echo Building NN Test for Cortex-M4 FP Big Endian -%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM4b_FP" -o "NN_Test_ARMCM4b_FP_build.log" - -echo Running NN Test for Cortex-M4 FP Big Endian -%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM4b_FP" -j0 - -type NN_TEST.log -del NN_TEST.log - -echo Building NN Test for Cortex-M3 -%UVEXE% -rb -j0 arm_nnexamples_nn_test.uvprojx -t "ARMCM3" -o "NN_Test_ARMCM3_build.log" - -echo Running NN Test for Cortex-M3 -%UVEXE% -d arm_nnexamples_nn_test.uvprojx -t "ARMCM3" -j0 - -type NN_TEST.log -del NN_TEST.log \ No newline at end of file diff --git a/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h b/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h index 7e4d4585a..e6635d118 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h +++ b/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h @@ -236,12 +236,12 @@ #define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE #define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE -#if defined(STM32G4) -#define DAC_CHIPCONNECT_DISABLE (DAC_CHIPCONNECT_EXTERNAL | DAC_CHIPCONNECT_BOTH) -#define DAC_CHIPCONNECT_ENABLE (DAC_CHIPCONNECT_INTERNAL | DAC_CHIPCONNECT_BOTH) +#if defined(STM32G4) || defined(STM32H7) +#define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL +#define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL #endif -#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) +#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32H7) || defined(STM32F4) #define HAL_DAC_MSP_INIT_CB_ID HAL_DAC_MSPINIT_CB_ID #define HAL_DAC_MSP_DEINIT_CB_ID HAL_DAC_MSPDEINIT_CB_ID #endif @@ -306,8 +306,17 @@ #define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING #define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING +#if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) +#define DMA_REQUEST_DCMI_PSSI DMA_REQUEST_DCMI +#endif + #endif /* STM32L4 */ +#if defined(STM32G0) +#define DMA_REQUEST_DAC1_CHANNEL1 DMA_REQUEST_DAC1_CH1 +#define DMA_REQUEST_DAC1_CHANNEL2 DMA_REQUEST_DAC1_CH2 +#endif + #if defined(STM32H7) #define DMA_REQUEST_DAC1 DMA_REQUEST_DAC1_CH1 @@ -365,6 +374,9 @@ #define DFSDM_FILTER_EXT_TRIG_LPTIM2 DFSDM_FILTER_EXT_TRIG_LPTIM2_OUT #define DFSDM_FILTER_EXT_TRIG_LPTIM3 DFSDM_FILTER_EXT_TRIG_LPTIM3_OUT +#define DAC_TRIGGER_LP1_OUT DAC_TRIGGER_LPTIM1_OUT +#define DAC_TRIGGER_LP2_OUT DAC_TRIGGER_LPTIM2_OUT + #endif /* STM32H7 */ /** @@ -566,7 +578,14 @@ #define GPIO_AF9_SDIO2 GPIO_AF9_SDMMC2 #define GPIO_AF10_SDIO2 GPIO_AF10_SDMMC2 #define GPIO_AF11_SDIO2 GPIO_AF11_SDMMC2 -#endif + +#if defined (STM32H743xx) || defined (STM32H753xx) || defined (STM32H750xx) || defined (STM32H742xx) \ + || defined (STM32H745xx) || defined (STM32H755xx) || defined (STM32H747xx) || defined (STM32H757xx) +#define GPIO_AF10_OTG2_HS GPIO_AF10_OTG2_FS +#define GPIO_AF10_OTG1_FS GPIO_AF10_OTG1_HS +#define GPIO_AF12_OTG2_FS GPIO_AF12_OTG1_FS +#endif /*STM32H743xx || STM32H753xx || STM32H750xx || STM32H742xx || STM32H745xx || STM32H755xx || STM32H747xx || STM32H757xx */ +#endif /* STM32H7 */ #define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1 #define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1 @@ -737,32 +756,65 @@ #define HRTIM_OUTPUTRESET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8 #define HRTIM_OUTPUTRESET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9 #endif /* STM32H7 */ - + #if defined(STM32F3) -#define HRTIM_OUTPUTSET_TIMEV_1 HRTIM_OUTPUTSET_TIMAEV1_TIMBCMP1 -#define HRTIM_OUTPUTSET_TIMEV_2 HRTIM_OUTPUTSET_TIMAEV2_TIMBCMP2 -#define HRTIM_OUTPUTSET_TIMEV_3 HRTIM_OUTPUTSET_TIMAEV3_TIMBCMP4 -#define HRTIM_OUTPUTSET_TIMEV_4 HRTIM_OUTPUTSET_TIMAEV4_TIMCCMP2 -#define HRTIM_OUTPUTSET_TIMEV_5 HRTIM_OUTPUTSET_TIMAEV5_TIMCCMP3 -#define HRTIM_OUTPUTSET_TIMEV_6 HRTIM_OUTPUTSET_TIMAEV6_TIMDCMP1 -#define HRTIM_OUTPUTSET_TIMEV_7 HRTIM_OUTPUTSET_TIMAEV7_TIMDCMP2 -#define HRTIM_OUTPUTSET_TIMEV_8 HRTIM_OUTPUTSET_TIMAEV8_TIMECMP3 -#define HRTIM_OUTPUTSET_TIMEV_9 HRTIM_OUTPUTSET_TIMAEV9_TIMECMP4 - -#define HRTIM_OUTPUTRESET_TIMEV_1 HRTIM_OUTPUTRESET_TIMAEV1_TIMBCMP1 -#define HRTIM_OUTPUTRESET_TIMEV_2 HRTIM_OUTPUTRESET_TIMAEV2_TIMBCMP2 -#define HRTIM_OUTPUTRESET_TIMEV_3 HRTIM_OUTPUTRESET_TIMAEV3_TIMBCMP4 -#define HRTIM_OUTPUTRESET_TIMEV_4 HRTIM_OUTPUTRESET_TIMAEV4_TIMCCMP2 -#define HRTIM_OUTPUTRESET_TIMEV_5 HRTIM_OUTPUTRESET_TIMAEV5_TIMCCMP3 -#define HRTIM_OUTPUTRESET_TIMEV_6 HRTIM_OUTPUTRESET_TIMAEV6_TIMDCMP1 -#define HRTIM_OUTPUTRESET_TIMEV_7 HRTIM_OUTPUTRESET_TIMAEV7_TIMDCMP2 -#define HRTIM_OUTPUTRESET_TIMEV_8 HRTIM_OUTPUTRESET_TIMAEV8_TIMECMP3 -#define HRTIM_OUTPUTRESET_TIMEV_9 HRTIM_OUTPUTRESET_TIMAEV9_TIMECMP4 - -#define HRTIM_EVENTSRC_1 HRTIM_EEV1SRC_GPIO -#define HRTIM_EVENTSRC_2 HRTIM_EEV2SRC_GPIO -#define HRTIM_EVENTSRC_3 HRTIM_EEV3SRC_GPIO -#define HRTIM_EVENTSRC_4 HRTIM_EEV4SRC_GPIO +/** @brief Constants defining available sources associated to external events. + */ +#define HRTIM_EVENTSRC_1 (0x00000000U) +#define HRTIM_EVENTSRC_2 (HRTIM_EECR1_EE1SRC_0) +#define HRTIM_EVENTSRC_3 (HRTIM_EECR1_EE1SRC_1) +#define HRTIM_EVENTSRC_4 (HRTIM_EECR1_EE1SRC_1 | HRTIM_EECR1_EE1SRC_0) + +/** @brief Constants defining the events that can be selected to configure the + * set/reset crossbar of a timer output + */ +#define HRTIM_OUTPUTSET_TIMEV_1 (HRTIM_SET1R_TIMEVNT1) +#define HRTIM_OUTPUTSET_TIMEV_2 (HRTIM_SET1R_TIMEVNT2) +#define HRTIM_OUTPUTSET_TIMEV_3 (HRTIM_SET1R_TIMEVNT3) +#define HRTIM_OUTPUTSET_TIMEV_4 (HRTIM_SET1R_TIMEVNT4) +#define HRTIM_OUTPUTSET_TIMEV_5 (HRTIM_SET1R_TIMEVNT5) +#define HRTIM_OUTPUTSET_TIMEV_6 (HRTIM_SET1R_TIMEVNT6) +#define HRTIM_OUTPUTSET_TIMEV_7 (HRTIM_SET1R_TIMEVNT7) +#define HRTIM_OUTPUTSET_TIMEV_8 (HRTIM_SET1R_TIMEVNT8) +#define HRTIM_OUTPUTSET_TIMEV_9 (HRTIM_SET1R_TIMEVNT9) + +#define HRTIM_OUTPUTRESET_TIMEV_1 (HRTIM_RST1R_TIMEVNT1) +#define HRTIM_OUTPUTRESET_TIMEV_2 (HRTIM_RST1R_TIMEVNT2) +#define HRTIM_OUTPUTRESET_TIMEV_3 (HRTIM_RST1R_TIMEVNT3) +#define HRTIM_OUTPUTRESET_TIMEV_4 (HRTIM_RST1R_TIMEVNT4) +#define HRTIM_OUTPUTRESET_TIMEV_5 (HRTIM_RST1R_TIMEVNT5) +#define HRTIM_OUTPUTRESET_TIMEV_6 (HRTIM_RST1R_TIMEVNT6) +#define HRTIM_OUTPUTRESET_TIMEV_7 (HRTIM_RST1R_TIMEVNT7) +#define HRTIM_OUTPUTRESET_TIMEV_8 (HRTIM_RST1R_TIMEVNT8) +#define HRTIM_OUTPUTRESET_TIMEV_9 (HRTIM_RST1R_TIMEVNT9) + +/** @brief Constants defining the event filtering applied to external events + * by a timer + */ +#define HRTIM_TIMEVENTFILTER_NONE (0x00000000U) +#define HRTIM_TIMEVENTFILTER_BLANKINGCMP1 (HRTIM_EEFR1_EE1FLTR_0) +#define HRTIM_TIMEVENTFILTER_BLANKINGCMP2 (HRTIM_EEFR1_EE1FLTR_1) +#define HRTIM_TIMEVENTFILTER_BLANKINGCMP3 (HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) +#define HRTIM_TIMEVENTFILTER_BLANKINGCMP4 (HRTIM_EEFR1_EE1FLTR_2) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR1 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR2 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR3 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR4 (HRTIM_EEFR1_EE1FLTR_3) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR5 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_0) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR6 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR7 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR8 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2) +#define HRTIM_TIMEVENTFILTER_WINDOWINGCMP2 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0) +#define HRTIM_TIMEVENTFILTER_WINDOWINGCMP3 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1) +#define HRTIM_TIMEVENTFILTER_WINDOWINGTIM (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) + +/** @brief Constants defining the DLL calibration periods (in micro seconds) + */ +#define HRTIM_CALIBRATIONRATE_7300 0x00000000U +#define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0) +#define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1) +#define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0) + #endif /* STM32F3 */ /** * @} @@ -903,7 +955,7 @@ #define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 #define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1 -#if defined(STM32L1) || defined(STM32L4) +#if defined(STM32L1) || defined(STM32L4) || defined(STM32H7) #define HAL_OPAMP_MSP_INIT_CB_ID HAL_OPAMP_MSPINIT_CB_ID #define HAL_OPAMP_MSP_DEINIT_CB_ID HAL_OPAMP_MSPDEINIT_CB_ID #endif @@ -994,6 +1046,16 @@ #define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 #define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 +#if defined(STM32H7) +#define RTC_TAMPCR_TAMPXE RTC_TAMPER_X +#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT + +#define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1 +#define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2 +#define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3 +#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMPALL +#endif /* STM32H7 */ + /** * @} */ @@ -1409,12 +1471,12 @@ #endif #define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT()) #define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor()) -#if defined(STM32H7A3xx) || defined(STM32H7B3xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xxQ) +#if defined(STM32H7A3xx) || defined(STM32H7B3xx) || defined(STM32H7B0xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xxQ) || defined(STM32H7B0xxQ) #define HAL_EnableSRDomainDBGStopMode HAL_EnableDomain3DBGStopMode #define HAL_DisableSRDomainDBGStopMode HAL_DisableDomain3DBGStopMode #define HAL_EnableSRDomainDBGStandbyMode HAL_EnableDomain3DBGStandbyMode #define HAL_DisableSRDomainDBGStandbyMode HAL_DisableDomain3DBGStandbyMode -#endif /* STM32H7A3xx || STM32H7B3xx || STM32H7A3xxQ || STM32H7B3xxQ */ +#endif /* STM32H7A3xx || STM32H7B3xx || STM32H7B0xx || STM32H7A3xxQ || STM32H7B3xxQ || STM32H7B0xxQ */ /** * @} @@ -1445,16 +1507,18 @@ #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus)) -#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32G4) +#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32G4) #define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT #define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT #define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT #define HAL_I2C_Slave_Sequential_Receive_IT HAL_I2C_Slave_Seq_Receive_IT +#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 */ +#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32G4) #define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA #define HAL_I2C_Master_Sequential_Receive_DMA HAL_I2C_Master_Seq_Receive_DMA #define HAL_I2C_Slave_Sequential_Transmit_DMA HAL_I2C_Slave_Seq_Transmit_DMA #define HAL_I2C_Slave_Sequential_Receive_DMA HAL_I2C_Slave_Seq_Receive_DMA -#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 */ +#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 */ #if defined(STM32F4) #define HAL_FMPI2C_Master_Sequential_Transmit_IT HAL_FMPI2C_Master_Seq_Transmit_IT @@ -1473,6 +1537,13 @@ /** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose * @{ */ + +#if defined(STM32G0) +#define HAL_PWR_ConfigPVD HAL_PWREx_ConfigPVD +#define HAL_PWR_EnablePVD HAL_PWREx_EnablePVD +#define HAL_PWR_DisablePVD HAL_PWREx_DisablePVD +#define HAL_PWR_PVD_IRQHandler HAL_PWREx_PVD_IRQHandler +#endif #define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD #define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg #define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown @@ -1545,14 +1616,14 @@ #define HAL_TIM_DMAError TIM_DMAError #define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt #define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt -#if defined(STM32H7) || defined(STM32G0) || defined(STM32F7) || defined(STM32F4) || defined(STM32L0) || defined(STM32L4) +#if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) #define HAL_TIM_SlaveConfigSynchronization HAL_TIM_SlaveConfigSynchro #define HAL_TIM_SlaveConfigSynchronization_IT HAL_TIM_SlaveConfigSynchro_IT #define HAL_TIMEx_CommutationCallback HAL_TIMEx_CommutCallback #define HAL_TIMEx_ConfigCommutationEvent HAL_TIMEx_ConfigCommutEvent #define HAL_TIMEx_ConfigCommutationEvent_IT HAL_TIMEx_ConfigCommutEvent_IT #define HAL_TIMEx_ConfigCommutationEvent_DMA HAL_TIMEx_ConfigCommutEvent_DMA -#endif /* STM32H7 || STM32G0 || STM32F7 || STM32F4 || STM32L0 */ +#endif /* STM32H7 || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 */ /** * @} */ @@ -3278,7 +3349,7 @@ /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose * @{ */ -#if defined (STM32G0) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) +#if defined (STM32G0) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined STM32G4 #else #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG #endif diff --git a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_conf_template.h b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_conf_template.h index 9926eb9d9..8f947e505 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_conf_template.h +++ b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_conf_template.h @@ -174,17 +174,17 @@ */ #define VDD_VALUE (3300UL) /*!< Value of VDD in mv */ #define TICK_INT_PRIORITY ((1UL<<__NVIC_PRIO_BITS) - 1UL) /*!< tick interrupt priority (lowest by default) */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 0 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 +#define USE_RTOS 0U +#define PREFETCH_ENABLE 0U +#define INSTRUCTION_CACHE_ENABLE 1U +#define DATA_CACHE_ENABLE 1U /* ########################## Assert Selection ############################## */ /** * @brief Uncomment the line below to expanse the "assert_param" macro in the * HAL drivers code */ -/* #define USE_FULL_ASSERT 1 */ +/* #define USE_FULL_ASSERT 1U */ /* ################## SPI peripheral configuration ########################## */ diff --git a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp.h b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp.h index 55fe0594c..ec5c1d4d1 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp.h +++ b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp.h @@ -186,6 +186,8 @@ typedef struct uint16_t CrypHeaderCount_saved; /*!< copy of CRYP header data counter when processing is suspended */ + uint32_t SizesSum_saved; /*!< copy of SizesSum when processing is suspended */ + uint32_t ResumingFlag; /*!< resumption flag to bypass steps already carried out */ FunctionalState AutoKeyDerivation_saved; /*!< copy of CRYP handle auto key derivation parameter */ diff --git a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_i2c_ex.h b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_i2c_ex.h index 4b6975d3c..1ae6f8649 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_i2c_ex.h +++ b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_i2c_ex.h @@ -118,6 +118,9 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus); (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \ (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \ (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3)) + + + /** * @} */ diff --git a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_ipcc.h b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_ipcc.h index bf6c9167d..6088c9e33 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_ipcc.h +++ b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_ipcc.h @@ -6,11 +6,11 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. + *

© Copyright (c) 2019 STMicroelectronics. * All rights reserved.

* * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the + * the "License"; You may not use this file except in compliance with the * License. You may obtain a copy of the License at: * opensource.org/licenses/BSD-3-Clause * @@ -28,6 +28,7 @@ extern "C" { /* Includes ------------------------------------------------------------------*/ #include "stm32wbxx_hal_def.h" +#if defined(IPCC) /** @addtogroup STM32WBxx_HAL_Driver * @{ @@ -253,6 +254,7 @@ void HAL_IPCC_RxCallback(IPCC_HandleTypeDef *hipcc, uint32_t ChannelIndex, IPCC_ /** * @} */ +#endif /* IPCC */ #ifdef __cplusplus } diff --git a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_lptim.h b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_lptim.h index 8db74162c..60d90910a 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_lptim.h +++ b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_lptim.h @@ -592,6 +592,10 @@ typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim); /*!< poin * @{ */ +/** @addtogroup LPTIM_Exported_Functions_Group1 + * @brief Initialization and Configuration functions. + * @{ + */ /* Initialization/de-initialization functions ********************************/ HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); @@ -599,7 +603,14 @@ HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); /* MSP functions *************************************************************/ void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); +/** + * @} + */ +/** @addtogroup LPTIM_Exported_Functions_Group2 + * @brief Start-Stop operation functions. + * @{ + */ /* Start/Stop operation functions *********************************************/ /* ################################# PWM Mode ################################*/ /* Blocking mode: Polling */ @@ -648,12 +659,26 @@ HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); /* Non-Blocking mode: Interrupt */ HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period); HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); +/** + * @} + */ +/** @addtogroup LPTIM_Exported_Functions_Group3 + * @brief Read operation functions. + * @{ + */ /* Reading operation functions ************************************************/ uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim); uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim); uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim); +/** + * @} + */ +/** @addtogroup LPTIM_Exported_Functions_Group4 + * @brief LPTIM IRQ handler and callback functions. + * @{ + */ /* LPTIM IRQ functions *******************************************************/ void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); @@ -671,9 +696,19 @@ void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID, pLPTIM_CallbackTypeDef pCallback); HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID); #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ +/** + * @} + */ +/** @addtogroup LPTIM_Group5 + * @brief Peripheral State functions. + * @{ + */ /* Peripheral State functions ************************************************/ HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim); +/** + * @} + */ /** * @} diff --git a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_pka.h b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_pka.h index a3479529d..c6dc2d719 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_pka.h +++ b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_pka.h @@ -99,7 +99,11 @@ typedef enum * @brief PKA handle Structure definition * @{ */ +#if (USE_HAL_PKA_REGISTER_CALLBACKS == 1) typedef struct __PKA_HandleTypeDef +#else +typedef struct +#endif /* USE_HAL_PKA_REGISTER_CALLBACKS */ { PKA_TypeDef *Instance; /*!< Register base address */ __IO HAL_PKA_StateTypeDef State; /*!< PKA state */ @@ -220,6 +224,7 @@ typedef struct uint8_t *ptY; /*!< Pointer to point P coordinate yP (Array of modulusSize elements) */ } PKA_ECDSASignOutExtParamTypeDef, PKA_ECCMulOutTypeDef; + typedef struct { uint32_t expSize; /*!< Number of element in pExp array */ @@ -229,6 +234,7 @@ typedef struct const uint8_t *pMod; /*!< Pointer to modulus (Array of OpSize elements) */ } PKA_ModExpInTypeDef; + typedef struct { uint32_t expSize; /*!< Number of element in pExp and pMontgomeryParam arrays */ @@ -320,6 +326,7 @@ typedef struct #define PKA_IT_PROCEND PKA_CR_PROCENDIE #define PKA_IT_ADDRERR PKA_CR_ADDRERRIE #define PKA_IT_RAMERR PKA_CR_RAMERRIE + /** * @} */ @@ -330,6 +337,7 @@ typedef struct #define PKA_FLAG_PROCEND PKA_SR_PROCENDF #define PKA_FLAG_ADDRERR PKA_SR_ADDRERRF #define PKA_FLAG_RAMERR PKA_SR_RAMERRF + /** * @} */ @@ -516,6 +524,7 @@ HAL_StatusTypeDef HAL_PKA_MontgomeryParam(PKA_HandleTypeDef *hpka, PKA_Montgomer HAL_StatusTypeDef HAL_PKA_MontgomeryParam_IT(PKA_HandleTypeDef *hpka, PKA_MontgomeryParamInTypeDef *in); void HAL_PKA_MontgomeryParam_GetResult(PKA_HandleTypeDef *hpka, uint32_t *pRes); + HAL_StatusTypeDef HAL_PKA_Abort(PKA_HandleTypeDef *hpka); void HAL_PKA_RAMReset(PKA_HandleTypeDef *hpka); void HAL_PKA_OperationCpltCallback(PKA_HandleTypeDef *hpka); diff --git a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_tsc.h b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_tsc.h index 81bc24e2a..1629e91f8 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_tsc.h +++ b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_tsc.h @@ -108,13 +108,17 @@ typedef struct /** * @brief TSC handle Structure definition */ +#if (USE_HAL_TSC_REGISTER_CALLBACKS == 1) typedef struct __TSC_HandleTypeDef +#else +typedef struct +#endif /* USE_HAL_TSC_REGISTER_CALLBACKS */ { TSC_TypeDef *Instance; /*!< Register base address */ TSC_InitTypeDef Init; /*!< Initialization parameters */ __IO HAL_TSC_StateTypeDef State; /*!< Peripheral state */ HAL_LockTypeDef Lock; /*!< Lock feature */ - __IO uint32_t ErrorCode; /*!< I2C Error code */ + __IO uint32_t ErrorCode; /*!< TSC Error code */ #if (USE_HAL_TSC_REGISTER_CALLBACKS == 1) void (* ConvCpltCallback)(struct __TSC_HandleTypeDef *htsc); /*!< TSC Conversion complete callback */ diff --git a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_adc.h b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_adc.h index 4ceebba94..e11d35cf8 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_adc.h +++ b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_adc.h @@ -2044,11 +2044,13 @@ __STATIC_INLINE uint32_t LL_ADC_GetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON) } /** - * @brief Set parameter common to several ADC: measurement path to internal - * channels (VrefInt, temperature sensor, ...). + * @brief Set parameter common to several ADC: measurement path to + * internal channels (VrefInt, temperature sensor, ...). + * Configure all paths (overwrite current configuration). * @note One or several values can be selected. * Example: (LL_ADC_PATH_INTERNAL_VREFINT | * LL_ADC_PATH_INTERNAL_TEMPSENSOR) + * The values not selected are removed from configuration. * @note Stabilization time of measurement path to internal channel: * After enabling internal paths, before starting ADC conversion, * a delay is required for internal voltage reference and @@ -2083,6 +2085,77 @@ __STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_CO MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_VBATEN, PathInternal); } +/** + * @brief Set parameter common to several ADC: measurement path to + * internal channels (VrefInt, temperature sensor, ...). + * Add paths to the current configuration. + * @note One or several values can be selected. + * Example: (LL_ADC_PATH_INTERNAL_VREFINT | + * LL_ADC_PATH_INTERNAL_TEMPSENSOR) + * @note Stabilization time of measurement path to internal channel: + * After enabling internal paths, before starting ADC conversion, + * a delay is required for internal voltage reference and + * temperature sensor stabilization time. + * Refer to device datasheet. + * Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US. + * Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US. + * @note ADC internal channel sampling time constraint: + * For ADC conversion of internal channels, + * a sampling time minimum value is required. + * Refer to device datasheet. + * @note On this STM32 serie, setting of this feature is conditioned to + * ADC state: + * All ADC instances of the ADC common group must be disabled. + * This check can be done with function @ref LL_ADC_IsEnabled() for each + * ADC instance or by using helper macro helper macro + * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(). + * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalChAdd\n + * CCR TSEN LL_ADC_SetCommonPathInternalChAdd\n + * CCR VBATEN LL_ADC_SetCommonPathInternalChAdd + * @param ADCxy_COMMON ADC common instance + * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() ) + * @param PathInternal This parameter can be a combination of the following values: + * @arg @ref LL_ADC_PATH_INTERNAL_NONE + * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT + * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR + * @arg @ref LL_ADC_PATH_INTERNAL_VBAT + * @retval None + */ +__STATIC_INLINE void LL_ADC_SetCommonPathInternalChAdd(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal) +{ + SET_BIT(ADCxy_COMMON->CCR, PathInternal); +} + +/** + * @brief Set parameter common to several ADC: measurement path to + * internal channels (VrefInt, temperature sensor, ...). + * Remove paths to the current configuration. + * @note One or several values can be selected. + * Example: (LL_ADC_PATH_INTERNAL_VREFINT | + * LL_ADC_PATH_INTERNAL_TEMPSENSOR) + * @note On this STM32 serie, setting of this feature is conditioned to + * ADC state: + * All ADC instances of the ADC common group must be disabled. + * This check can be done with function @ref LL_ADC_IsEnabled() for each + * ADC instance or by using helper macro helper macro + * @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(). + * @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalChRem\n + * CCR TSEN LL_ADC_SetCommonPathInternalChRem\n + * CCR VBATEN LL_ADC_SetCommonPathInternalChRem + * @param ADCxy_COMMON ADC common instance + * (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() ) + * @param PathInternal This parameter can be a combination of the following values: + * @arg @ref LL_ADC_PATH_INTERNAL_NONE + * @arg @ref LL_ADC_PATH_INTERNAL_VREFINT + * @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR + * @arg @ref LL_ADC_PATH_INTERNAL_VBAT + * @retval None + */ +__STATIC_INLINE void LL_ADC_SetCommonPathInternalChRem(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal) +{ + CLEAR_BIT(ADCxy_COMMON->CCR, PathInternal); +} + /** * @brief Get parameter common to several ADC: measurement path to internal * channels (VrefInt, temperature sensor, ...). diff --git a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_comp.h b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_comp.h index fd8320a35..49d720eb8 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_comp.h +++ b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_comp.h @@ -53,6 +53,14 @@ extern "C" { */ /* Private macros ------------------------------------------------------------*/ +/** @defgroup COMP_LL_Private_Macros COMP Private Macros + * @{ + */ + +/** + * @} + */ + /* Exported types ------------------------------------------------------------*/ #if defined(USE_FULL_LL_DRIVER) /** @defgroup COMP_LL_ES_INIT COMP Exported Init structure diff --git a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_ipcc.h b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_ipcc.h index 5f8adb8da..95d831193 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_ipcc.h +++ b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_ipcc.h @@ -6,11 +6,11 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. + *

© Copyright (c) 2019 STMicroelectronics. * All rights reserved.

* * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the + * the "License"; You may not use this file except in compliance with the * License. You may obtain a copy of the License at: * opensource.org/licenses/BSD-3-Clause * @@ -695,6 +695,18 @@ __STATIC_INLINE uint32_t LL_C2_IPCC_IsActiveFlag_CHx(IPCC_TypeDef const *const return ((READ_BIT(IPCCx->C2TOC1SR, Channel) == (Channel)) ? 1UL : 0UL); } +/** + * @brief Get the number of supported channels. + * @param IPCCx IPCC Instance. + * @retval Number of supported channels. + */ +__STATIC_INLINE uint32_t LL_IPCC_GetChannelNumber(IPCC_TypeDef *IPCCx) +{ + /* Added for compatibility with other STM32 series */ + (void)(IPCCx); /* To avoid gcc/g++ warnings */ + return 6U; +} + /** * @} */ diff --git a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_lptim.h b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_lptim.h index 57ddd3852..5a0e72384 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_lptim.h +++ b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_lptim.h @@ -1080,7 +1080,7 @@ __STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx) } /** - * @brief Inform application whether a autoreload match interrupt has occured. + * @brief Inform application whether a autoreload match interrupt has occurred. * @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM * @param LPTIMx Low-Power Timer instance * @retval State of bit (1 or 0). diff --git a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_pka.h b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_pka.h index c853a335f..21d0c50ca 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_pka.h +++ b/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_ll_pka.h @@ -115,6 +115,7 @@ typedef struct #define LL_PKA_MODE_MODULAR_ADD ((uint32_t)0x0000000EU) /*!< Modular addition */ #define LL_PKA_MODE_MODULAR_SUB ((uint32_t)0x0000000FU) /*!< Modular subtraction */ #define LL_PKA_MODE_MONTGOMERY_MUL ((uint32_t)0x00000010U) /*!< Montgomery multiplication */ + /** * @} */ @@ -328,6 +329,7 @@ __STATIC_INLINE void LL_PKA_EnableIT_RAMERR(PKA_TypeDef *PKAx) SET_BIT(PKAx->CR, PKA_CR_RAMERRIE); } + /** * @brief Enable end of operation interrupt. * @rmtoll CR PROCENDIE LL_PKA_EnableIT_PROCEND @@ -394,6 +396,7 @@ __STATIC_INLINE uint32_t LL_PKA_IsEnabledIT_RAMERR(PKA_TypeDef *PKAx) return ((READ_BIT(PKAx->CR, PKA_CR_RAMERRIE) == (PKA_CR_RAMERRIE)) ? 1UL : 0UL); } + /** * @brief Check if end of operation interrupt is enabled. * @rmtoll CR PROCENDIE LL_PKA_IsEnabledIT_PROCEND @@ -435,6 +438,7 @@ __STATIC_INLINE uint32_t LL_PKA_IsActiveFlag_RAMERR(PKA_TypeDef *PKAx) return ((READ_BIT(PKAx->SR, PKA_SR_RAMERRF) == (PKA_SR_RAMERRF)) ? 1UL : 0UL); } + /** * @brief Get PKA end of operation flag. * @rmtoll SR PROCENDF LL_PKA_IsActiveFlag_PROCEND @@ -479,6 +483,7 @@ __STATIC_INLINE void LL_PKA_ClearFlag_RAMERR(PKA_TypeDef *PKAx) SET_BIT(PKAx->CLRFR, PKA_CLRFR_RAMERRFC); } + /** * @brief Clear PKA end of operation flag. * @rmtoll CLRFR PROCENDFC LL_PKA_ClearFlag_PROCEND diff --git a/Drivers/STM32WBxx_HAL_Driver/Release_Notes.html b/Drivers/STM32WBxx_HAL_Driver/Release_Notes.html index 9eb79c70c..b1fbd9f0c 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Release_Notes.html +++ b/Drivers/STM32WBxx_HAL_Driver/Release_Notes.html @@ -46,7 +46,7 @@

Update History

- +

Main Changes

Maitenance release

@@ -60,6 +60,60 @@ CRYP +Correct suspend and resume operation with a different parameter size. + + +I2C +Correct MISRA error. The value assigned to variable tmpITFlags was never used. + + +I2C +Correct I2C slave interrupt handling issue. + + +IPCC +Add LL_IPCC_GetChannelNumber API which return the number of channel supported by the device. + + +LPTIM +Correct doxygen group names. + + +PKA +Use a macro __PKA_RAM_PARAM_END to clear the last word of any input parameters. + + +TSC +Correct MISRA error related to tag __TSC_HandleTypeDef which is unused. + + +ADC +Add two functions to ease configuration of internal channels. + + + +

Backward Compatibility

+

This release is compatible with the previous versions.

+

Dependencies

+

This software release is compatible with:

+

STM32CubeMX V6.0.0

+
+
+
+ +
+

Main Changes

+

Maitenance release

+ + + + + + + + + + @@ -120,9 +174,9 @@
PeripheralHeadline
CRYP Document a restriction regarding size field on HAL_CRYP_Encrypt_DMA, HAL_CRYP_Decrypt_DMA API.
-

Backward Compatibility

+

Backward Compatibility

This release is compatible with the previous versions.

-

Dependencies

+

Dependencies

This software release is compatible with:

STM32CubeMX V5.4.0

@@ -130,7 +184,7 @@
-

Main Changes

+

Main Changes

STM32WB50xx introduction and maintenance release

First release for STM32WBxx HAL drivers introducing stm32wb50xx devices.

@@ -199,9 +253,9 @@
-

Backward Compatibility

+

Backward Compatibility

This release is compatible with the previous versions.

-

Dependencies

+

Dependencies

This software release is compatible with:

STM32CubeMX V5.3.0

@@ -209,7 +263,7 @@
-

Main Changes

+

Main Changes

Maintenance release

Maintenance release of HAL and Low layers drivers supporting STM32WB55xx devices.

@@ -263,9 +317,9 @@
-

Backward Compatibility

+

Backward Compatibility

This release is compatible with the previous versions.

-

Dependencies

+

Dependencies

This software release is compatible with:

STM32CubeMX V5.2.0

@@ -273,7 +327,7 @@
-

Main Changes

+

Main Changes

First release

First official release of HAL (Hardware Abstraction Layer) and LL (Low layers) drivers to support STM32WB55xx.

diff --git a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c index 8513cb7f7..4432f0b19 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c +++ b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal.c @@ -56,7 +56,7 @@ * @brief STM32WBxx HAL Driver version number */ #define __STM32WBxx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */ -#define __STM32WBxx_HAL_VERSION_SUB1 (0x03U) /*!< [23:16] sub1 version */ +#define __STM32WBxx_HAL_VERSION_SUB1 (0x04U) /*!< [23:16] sub1 version */ #define __STM32WBxx_HAL_VERSION_SUB2 (0x00U) /*!< [15:8] sub2 version */ #define __STM32WBxx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */ #define __STM32WBxx_HAL_VERSION ((__STM32WBxx_HAL_VERSION_MAIN << 24U)\ diff --git a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp.c b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp.c index fab75d482..1e8fe2ce6 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp.c +++ b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_cryp.c @@ -965,6 +965,7 @@ HAL_StatusTypeDef HAL_CRYP_Suspend(CRYP_HandleTypeDef *hcryp) hcryp->Phase_saved = hcryp->Phase; hcryp->State_saved = hcryp->State; hcryp->Size_saved = ( (hcryp->Init.DataWidthUnit == CRYP_DATAWIDTHUNIT_WORD) ? (hcryp->Size /4U) : hcryp->Size); + hcryp->SizesSum_saved = hcryp->SizesSum; hcryp->AutoKeyDerivation_saved = hcryp->AutoKeyDerivation; hcryp->CrypHeaderCount_saved = hcryp->CrypHeaderCount; hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE; @@ -1033,6 +1034,7 @@ HAL_StatusTypeDef HAL_CRYP_Resume(CRYP_HandleTypeDef *hcryp) /* Restore low-priority block CRYP handle parameters */ hcryp->Phase = hcryp->Phase_saved; hcryp->CrypHeaderCount = hcryp->CrypHeaderCount_saved; + hcryp->SizesSum = hcryp->SizesSum_saved; /* Disable AES and write-back SUSPxR registers */; __HAL_CRYP_DISABLE(hcryp); @@ -1042,8 +1044,6 @@ HAL_StatusTypeDef HAL_CRYP_Resume(CRYP_HandleTypeDef *hcryp) hcryp->Instance->CR = hcryp->CR_saved; CRYP_Write_KeyRegisters(hcryp, hcryp->Key_saved, hcryp->Init.KeySize); CRYP_Write_IVRegisters(hcryp, hcryp->IV_saved); - __HAL_CRYP_ENABLE_IT(hcryp,CRYP_IT_CCFIE | CRYP_IT_ERRIE); - __HAL_CRYP_ENABLE(hcryp); /* At the same time, set handle state back to READY to be able to resume the AES calculations without the processing APIs returning HAL_BUSY when called. */ @@ -5234,6 +5234,15 @@ static void CRYP_PhaseProcessingResume(CRYP_HandleTypeDef *hcryp) uint16_t npblb; uint32_t cr_temp; + + __HAL_CRYP_CLEAR_FLAG(hcryp, CRYP_ERR_CLEAR | CRYP_CCF_CLEAR); + + /* Enable computation complete flag and error interrupts */ + __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_CCFIE | CRYP_IT_ERRIE); + + /* Enable the CRYP peripheral */ + __HAL_CRYP_ENABLE(hcryp); + /* Case of header phase resumption =================================================*/ if (hcryp->Phase == CRYP_PHASE_HEADER_SUSPENDED) { diff --git a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_i2c.c b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_i2c.c index 5f5f17588..58a01f036 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_i2c.c +++ b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_i2c.c @@ -4737,6 +4737,13 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint /* Process locked */ __HAL_LOCK(hi2c); + /* Check if STOPF is set */ + if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + { + /* Call I2C Slave complete process */ + I2C_ITSlaveCplt(hi2c, tmpITFlags); + } + if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) { /* Check that I2C transfer finished */ @@ -4788,9 +4795,6 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint { if (hi2c->XferCount > 0U) { - /* Remove RXNE flag on temporary variable as read done */ - tmpITFlags &= ~I2C_FLAG_RXNE; - /* Read data from RXDR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; @@ -4844,13 +4848,6 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint /* Nothing to do */ } - /* Check if STOPF is set */ - if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) - { - /* Call I2C Slave complete process */ - I2C_ITSlaveCplt(hi2c, tmpITFlags); - } - /* Process Unlocked */ __HAL_UNLOCK(hi2c); @@ -5008,6 +5005,13 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin /* Process locked */ __HAL_LOCK(hi2c); + /* Check if STOPF is set */ + if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) + { + /* Call I2C Slave complete process */ + I2C_ITSlaveCplt(hi2c, ITFlags); + } + if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET)) { /* Check that I2C transfer finished */ @@ -5092,11 +5096,6 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin { I2C_ITAddrCplt(hi2c, ITFlags); } - else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET)) - { - /* Call I2C Slave complete process */ - I2C_ITSlaveCplt(hi2c, ITFlags); - } else { /* Nothing to do */ diff --git a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_ipcc.c b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_ipcc.c index 85993669e..7c6a4c507 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_ipcc.c +++ b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_ipcc.c @@ -41,11 +41,11 @@ ****************************************************************************** * @attention * - *

© Copyright (c) 2019 STMicroelectronics. + *

© Copyright (c) 2019 STMicroelectronics. * All rights reserved.

* * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the + * the "License"; You may not use this file except in compliance with the * License. You may obtain a copy of the License at: * opensource.org/licenses/BSD-3-Clause * @@ -55,6 +55,7 @@ /* Includes ------------------------------------------------------------------*/ #include "stm32wbxx_hal.h" +#if defined(IPCC) /** @addtogroup STM32WBxx_HAL_Driver * @{ */ @@ -742,5 +743,5 @@ void IPCC_Reset_Register(IPCC_CommonTypeDef *Instance) /** * @} */ - +#endif /* IPCC */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_lptim.c b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_lptim.c index 2bd7242b3..873f9630c 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_lptim.c +++ b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_lptim.c @@ -143,7 +143,7 @@ @endverbatim ****************************************************************************** - * @attention + * @attention * *

© Copyright (c) 2019 STMicroelectronics. * All rights reserved.

@@ -175,7 +175,14 @@ /* Private typedef -----------------------------------------------------------*/ /* Private define ------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/ +/** @addtogroup LPTIM_Private_Constants + * @{ + */ #define TIMEOUT 1000UL /* Timeout is 1s */ +/** + * @} + */ + /* Private variables ---------------------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/ #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) diff --git a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pka.c b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pka.c index 429d2dfc4..cf93e7ce5 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pka.c +++ b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_pka.c @@ -80,6 +80,7 @@ (++) HAL_PKA_ECCMulFastMode_IT(). (++) HAL_PKA_ECCMul_GetResult() to retrieve the result of the operation. + *** Low level operation *** ================================= [..] @@ -142,8 +143,6 @@ (++) HAL_PKA_MontgomeryParam(). (++) HAL_PKA_MontgomeryParam_IT(). (++) HAL_PKA_MontgomeryParam_GetResult() to retrieve the result of the operation. - (+) You can save computation time by storing this parameter for a later usage. - Use it again with HAL_PKA_MontgomeryParam_Set(); *** Polling mode operation *** =================================== @@ -263,11 +262,15 @@ * @{ */ #define PKA_RAM_SIZE 894U + +/* Private macro -------------------------------------------------------------*/ +#define __PKA_RAM_PARAM_END(TAB,INDEX) do{ \ + TAB[INDEX] = 0UL; \ + } while(0) /** * @} */ -/* Private macro -------------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/ /* Private function prototypes -----------------------------------------------*/ /** @defgroup PKA_Private_Functions PKA Private Functions @@ -320,9 +323,7 @@ void PKA_ARI_Set(PKA_HandleTypeDef *hpka, const uint32_t size, const uint32_t *p (+) User must implement HAL_PKA_MspInit() function in which he configures all related peripherals resources (CLOCK, IT and NVIC ). - (+) Call the function HAL_PKA_Init() to configure the selected device with - the selected configuration: - (++) Security level + (+) Call the function HAL_PKA_Init() to configure the device. (+) Call the function HAL_PKA_DeInit() to restore the default configuration of the selected PKAx peripheral. @@ -689,6 +690,7 @@ HAL_StatusTypeDef HAL_PKA_UnRegisterCallback(PKA_HandleTypeDef *hpka, HAL_PKA_Ca (++) HAL_PKA_ECCMulFastMode() (++) HAL_PKA_ECCMul_GetResult(); + (++) HAL_PKA_Add() (++) HAL_PKA_Sub() (++) HAL_PKA_Cmp() @@ -807,6 +809,7 @@ HAL_StatusTypeDef HAL_PKA_ModExpFastMode_IT(PKA_HandleTypeDef *hpka, PKA_ModExpF return PKA_Process_IT(hpka, PKA_MODE_MODULAR_EXP_FAST_MODE); } + /** * @brief Retrieve operation result. * @param hpka PKA handle @@ -859,7 +862,7 @@ HAL_StatusTypeDef HAL_PKA_ECDSASign_IT(PKA_HandleTypeDef *hpka, PKA_ECDSASignInT * @brief Retrieve operation result. * @param hpka PKA handle * @param out Output information - * @param outExt Additionnal Output information (facultative) + * @param outExt Additional Output information (facultative) */ void HAL_PKA_ECDSASign_GetResult(PKA_HandleTypeDef *hpka, PKA_ECDSASignOutTypeDef *out, PKA_ECDSASignOutExtParamTypeDef *outExt) { @@ -873,7 +876,7 @@ void HAL_PKA_ECDSASign_GetResult(PKA_HandleTypeDef *hpka, PKA_ECDSASignOutTypeDe PKA_Memcpy_u32_to_u8(out->SSign, &hpka->Instance->RAM[PKA_ECDSA_SIGN_OUT_SIGNATURE_S], size); } - /* If user requires the additionnal information */ + /* If user requires the additional information */ if (outExt != NULL) { /* Move the result to appropriate location (indicated in outExt parameter) */ @@ -1009,8 +1012,9 @@ HAL_StatusTypeDef HAL_PKA_PointCheck_IT(PKA_HandleTypeDef *hpka, PKA_PointCheckI */ uint32_t HAL_PKA_PointCheck_IsOnCurve(PKA_HandleTypeDef const *const hpka) { + #define PKA_POINT_IS_ON_CURVE 0UL /* Invert the value of the PKA RAM containig the result of the operation */ - return (hpka->Instance->RAM[PKA_POINT_CHECK_OUT_ERROR] == 0UL) ? 1UL : 0UL; + return (hpka->Instance->RAM[PKA_POINT_CHECK_OUT_ERROR] == PKA_POINT_IS_ON_CURVE) ? 1UL : 0UL; } /** @@ -1043,7 +1047,6 @@ HAL_StatusTypeDef HAL_PKA_ECCMul_IT(PKA_HandleTypeDef *hpka, PKA_ECCMulInTypeDef /* Start the operation */ return PKA_Process_IT(hpka, PKA_MODE_ECC_MUL); } - /** * @brief ECC scalar multiplication in blocking mode. * @param hpka PKA handle @@ -1074,7 +1077,6 @@ HAL_StatusTypeDef HAL_PKA_ECCMulFastMode_IT(PKA_HandleTypeDef *hpka, PKA_ECCMulF /* Start the operation */ return PKA_Process_IT(hpka, PKA_MODE_ECC_MUL_FAST_MODE); } - /** * @brief Retrieve operation result. * @param hpka PKA handle @@ -1469,6 +1471,7 @@ HAL_StatusTypeDef HAL_PKA_MontgomeryParam_IT(PKA_HandleTypeDef *hpka, PKA_Montgo return PKA_Process_IT(hpka, PKA_MODE_MONTGOMERY_PARAM); } + /** * @brief Retrieve operation result. * @param hpka PKA handle @@ -1568,7 +1571,6 @@ void HAL_PKA_IRQHandler(PKA_HandleTypeDef *hpka) hpka->ErrorCode |= HAL_PKA_ERROR_OPERATION; } } - /* Trigger the error callback if an error is present */ if (hpka->ErrorCode != HAL_PKA_ERROR_NONE) { @@ -1738,8 +1740,9 @@ uint32_t PKA_CheckError(PKA_HandleTypeDef *hpka, uint32_t mode) /* Check the operation success in case of ECDSA signature */ if (mode == PKA_MODE_ECDSA_SIGNATURE) { - /* If error output result is different from 0, ecsa sign operation need to be repeated */ - if (hpka->Instance->RAM[PKA_ECDSA_SIGN_OUT_ERROR] != 0UL) +#define EDCSA_SIGN_NOERROR 0UL + /* If error output result is different from no error, ecsa sign operation need to be repeated */ + if (hpka->Instance->RAM[PKA_ECDSA_SIGN_OUT_ERROR] != EDCSA_SIGN_NOERROR) { err |= HAL_PKA_ERROR_OPERATION; } @@ -1767,7 +1770,46 @@ uint32_t PKA_GetOptBitSize_u8(uint32_t byteNumber, uint8_t msb) { uint32_t position; +#if defined(CORE_CM0PLUS) + if (msb > 0x7FU) + { + position = 8UL; + } + else if (msb > 0x3FU) + { + position = 7UL; + } + else if (msb > 0x1FU) + { + position = 6UL; + } + else if (msb > 0x0FU) + { + position = 5UL; + } + else if (msb > 0x07U) + { + position = 4UL; + } + else if (msb > 0x03U) + { + position = 3UL; + } + else if (msb > 0x01U) + { + position = 2UL; + } + else if (msb > 0x00U) + { + position = 1UL; + } + else + { + position = 0UL; + } +#else position = 32UL - __CLZ(msb); +#endif return (((byteNumber - 1UL) * 8UL) + position); } @@ -2026,15 +2068,15 @@ void PKA_ModExp_Set(PKA_HandleTypeDef *hpka, PKA_ModExpInTypeDef *in) /* Move the input parameters pOp1 to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_MODULAR_EXP_IN_EXPONENT_BASE], in->pOp1, in->OpSize); - hpka->Instance->RAM[PKA_MODULAR_EXP_IN_EXPONENT_BASE + (in->OpSize / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_EXPONENT_BASE + (in->OpSize / 4UL)); /* Move the exponent to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_MODULAR_EXP_IN_EXPONENT], in->pExp, in->expSize); - hpka->Instance->RAM[PKA_MODULAR_EXP_IN_EXPONENT + (in->expSize / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_EXPONENT + (in->expSize / 4UL)); /* Move the modulus to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_MODULAR_EXP_IN_MODULUS], in->pMod, in->OpSize); - hpka->Instance->RAM[PKA_MODULAR_EXP_IN_MODULUS + (in->OpSize / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_MODULUS + (in->OpSize / 4UL)); } /** @@ -2052,21 +2094,22 @@ void PKA_ModExpFastMode_Set(PKA_HandleTypeDef *hpka, PKA_ModExpFastModeInTypeDef /* Move the input parameters pOp1 to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_MODULAR_EXP_IN_EXPONENT_BASE], in->pOp1, in->OpSize); - hpka->Instance->RAM[PKA_MODULAR_EXP_IN_EXPONENT_BASE + (in->OpSize / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_EXPONENT_BASE + (in->OpSize / 4UL)); /* Move the exponent to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_MODULAR_EXP_IN_EXPONENT], in->pExp, in->expSize); - hpka->Instance->RAM[PKA_MODULAR_EXP_IN_EXPONENT + (in->expSize / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_EXPONENT + (in->expSize / 4UL)); /* Move the modulus to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_MODULAR_EXP_IN_MODULUS], in->pMod, in->OpSize); - hpka->Instance->RAM[PKA_MODULAR_EXP_IN_MODULUS + (in->OpSize / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_MODULUS + (in->OpSize / 4UL)); /* Move the Montgomery parameter to PKA RAM */ PKA_Memcpy_u32_to_u32(&hpka->Instance->RAM[PKA_MODULAR_EXP_IN_MONTGOMERY_PARAM], in->pMontgomeryParam, in->expSize / 4UL); - hpka->Instance->RAM[PKA_MODULAR_EXP_IN_MONTGOMERY_PARAM + (in->expSize / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_EXP_IN_MONTGOMERY_PARAM + (in->expSize / 4UL)); } + /** * @brief Set input parameters. * @param hpka PKA handle @@ -2085,35 +2128,35 @@ void PKA_ECDSASign_Set(PKA_HandleTypeDef *hpka, PKA_ECDSASignInTypeDef *in) /* Move the input parameters coefficient |a| to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_A_COEFF], in->coef, in->modulusSize); - hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_A_COEFF + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_SIGN_IN_A_COEFF + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters modulus value p to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_MOD_GF], in->modulus, in->modulusSize); - hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_MOD_GF + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_SIGN_IN_MOD_GF + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters integer k to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_K], in->integer, in->primeOrderSize); - hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_K + ((in->primeOrderSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_SIGN_IN_K + ((in->primeOrderSize + 3UL) / 4UL)); /* Move the input parameters base point G coordinate x to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_INITIAL_POINT_X], in->basePointX, in->modulusSize); - hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_INITIAL_POINT_X + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_SIGN_IN_INITIAL_POINT_X + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters base point G coordinate y to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_INITIAL_POINT_Y], in->basePointY, in->modulusSize); - hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_INITIAL_POINT_Y + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_SIGN_IN_INITIAL_POINT_Y + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters hash of message z to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_HASH_E], in->hash, in->primeOrderSize); - hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_HASH_E + ((in->primeOrderSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_SIGN_IN_HASH_E + ((in->primeOrderSize + 3UL) / 4UL)); /* Move the input parameters private key d to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_PRIVATE_KEY_D], in->privateKey, in->primeOrderSize); - hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_PRIVATE_KEY_D + ((in->primeOrderSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_SIGN_IN_PRIVATE_KEY_D + ((in->primeOrderSize + 3UL) / 4UL)); /* Move the input parameters prime order n to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_ORDER_N], in->primeOrder, in->primeOrderSize); - hpka->Instance->RAM[PKA_ECDSA_SIGN_IN_ORDER_N + ((in->primeOrderSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_SIGN_IN_ORDER_N + ((in->primeOrderSize + 3UL) / 4UL)); } /** @@ -2134,43 +2177,43 @@ void PKA_ECDSAVerif_Set(PKA_HandleTypeDef *hpka, PKA_ECDSAVerifInTypeDef *in) /* Move the input parameters coefficient |a| to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_A_COEFF], in->coef, in->modulusSize); - hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_A_COEFF + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_VERIF_IN_A_COEFF + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters modulus value p to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_MOD_GF], in->modulus, in->modulusSize); - hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_MOD_GF + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_VERIF_IN_MOD_GF + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters base point G coordinate x to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_INITIAL_POINT_X], in->basePointX, in->modulusSize); - hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_INITIAL_POINT_X + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_VERIF_IN_INITIAL_POINT_X + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters base point G coordinate y to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_INITIAL_POINT_Y], in->basePointY, in->modulusSize); - hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_INITIAL_POINT_Y + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_VERIF_IN_INITIAL_POINT_Y + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters public-key curve point Q coordinate xQ to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_PUBLIC_KEY_POINT_X], in->pPubKeyCurvePtX, in->modulusSize); - hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_PUBLIC_KEY_POINT_X + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_VERIF_IN_PUBLIC_KEY_POINT_X + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters public-key curve point Q coordinate xQ to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_PUBLIC_KEY_POINT_Y], in->pPubKeyCurvePtY, in->modulusSize); - hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_PUBLIC_KEY_POINT_Y + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_VERIF_IN_PUBLIC_KEY_POINT_Y + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters signature part r to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_SIGNATURE_R], in->RSign, in->primeOrderSize); - hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_SIGNATURE_R + ((in->primeOrderSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_VERIF_IN_SIGNATURE_R + ((in->primeOrderSize + 3UL) / 4UL)); /* Move the input parameters signature part s to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_SIGNATURE_S], in->SSign, in->primeOrderSize); - hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_SIGNATURE_S + ((in->primeOrderSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_VERIF_IN_SIGNATURE_S + ((in->primeOrderSize + 3UL) / 4UL)); /* Move the input parameters hash of message z to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_HASH_E], in->hash, in->primeOrderSize); - hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_HASH_E + ((in->primeOrderSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_VERIF_IN_HASH_E + ((in->primeOrderSize + 3UL) / 4UL)); /* Move the input parameters curve prime order n to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_ORDER_N], in->primeOrder, in->primeOrderSize); - hpka->Instance->RAM[PKA_ECDSA_VERIF_IN_ORDER_N + ((in->primeOrderSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECDSA_VERIF_IN_ORDER_N + ((in->primeOrderSize + 3UL) / 4UL)); } /** @@ -2185,27 +2228,27 @@ void PKA_RSACRTExp_Set(PKA_HandleTypeDef *hpka, PKA_RSACRTExpInTypeDef *in) /* Move the input parameters operand dP to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_RSA_CRT_EXP_IN_DP_CRT], in->pOpDp, in->size / 2UL); - hpka->Instance->RAM[PKA_RSA_CRT_EXP_IN_DP_CRT + (in->size / 8UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_RSA_CRT_EXP_IN_DP_CRT + (in->size / 8UL)); /* Move the input parameters operand dQ to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_RSA_CRT_EXP_IN_DQ_CRT], in->pOpDq, in->size / 2UL); - hpka->Instance->RAM[PKA_RSA_CRT_EXP_IN_DQ_CRT + (in->size / 8UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_RSA_CRT_EXP_IN_DQ_CRT + (in->size / 8UL)); /* Move the input parameters operand qinv to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_RSA_CRT_EXP_IN_QINV_CRT], in->pOpQinv, in->size / 2UL); - hpka->Instance->RAM[PKA_RSA_CRT_EXP_IN_QINV_CRT + (in->size / 8UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_RSA_CRT_EXP_IN_QINV_CRT + (in->size / 8UL)); /* Move the input parameters prime p to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_RSA_CRT_EXP_IN_PRIME_P], in->pPrimeP, in->size / 2UL); - hpka->Instance->RAM[PKA_RSA_CRT_EXP_IN_PRIME_P + (in->size / 8UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_RSA_CRT_EXP_IN_PRIME_P + (in->size / 8UL)); /* Move the input parameters prime q to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_RSA_CRT_EXP_IN_PRIME_Q], in->pPrimeQ, in->size / 2UL); - hpka->Instance->RAM[PKA_RSA_CRT_EXP_IN_PRIME_Q + (in->size / 8UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_RSA_CRT_EXP_IN_PRIME_Q + (in->size / 8UL)); /* Move the input parameters operand A to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_RSA_CRT_EXP_IN_EXPONENT_BASE], in->popA, in->size); - hpka->Instance->RAM[PKA_RSA_CRT_EXP_IN_EXPONENT_BASE + (in->size / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_RSA_CRT_EXP_IN_EXPONENT_BASE + (in->size / 4UL)); } /** @@ -2223,23 +2266,23 @@ void PKA_PointCheck_Set(PKA_HandleTypeDef *hpka, PKA_PointCheckInTypeDef *in) /* Move the input parameters coefficient |a| to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_POINT_CHECK_IN_A_COEFF], in->coefA, in->modulusSize); - hpka->Instance->RAM[PKA_POINT_CHECK_IN_A_COEFF + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_POINT_CHECK_IN_A_COEFF + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters coefficient b to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_POINT_CHECK_IN_B_COEFF], in->coefB, in->modulusSize); - hpka->Instance->RAM[PKA_POINT_CHECK_IN_B_COEFF + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_POINT_CHECK_IN_B_COEFF + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters modulus value p to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_POINT_CHECK_IN_MOD_GF], in->modulus, in->modulusSize); - hpka->Instance->RAM[PKA_POINT_CHECK_IN_MOD_GF + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_POINT_CHECK_IN_MOD_GF + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters Point P coordinate x to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_POINT_CHECK_IN_INITIAL_POINT_X], in->pointX, in->modulusSize); - hpka->Instance->RAM[PKA_POINT_CHECK_IN_INITIAL_POINT_X + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_POINT_CHECK_IN_INITIAL_POINT_X + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters Point P coordinate y to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_POINT_CHECK_IN_INITIAL_POINT_Y], in->pointY, in->modulusSize); - hpka->Instance->RAM[PKA_POINT_CHECK_IN_INITIAL_POINT_Y + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_POINT_CHECK_IN_INITIAL_POINT_Y + ((in->modulusSize + 3UL) / 4UL)); } /** @@ -2260,25 +2303,28 @@ void PKA_ECCMul_Set(PKA_HandleTypeDef *hpka, PKA_ECCMulInTypeDef *in) /* Move the input parameters coefficient |a| to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECC_SCALAR_MUL_IN_A_COEFF], in->coefA, in->modulusSize); - hpka->Instance->RAM[PKA_ECC_SCALAR_MUL_IN_A_COEFF + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECC_SCALAR_MUL_IN_A_COEFF + ((in->modulusSize + 3UL) / 4UL)); + /* Move the input parameters modulus value p to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECC_SCALAR_MUL_IN_MOD_GF], in->modulus, in->modulusSize); - hpka->Instance->RAM[PKA_ECC_SCALAR_MUL_IN_MOD_GF + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECC_SCALAR_MUL_IN_MOD_GF + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters scalar multiplier k to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECC_SCALAR_MUL_IN_K], in->scalarMul, in->scalarMulSize); - hpka->Instance->RAM[PKA_ECC_SCALAR_MUL_IN_K + ((in->scalarMulSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECC_SCALAR_MUL_IN_K + ((in->scalarMulSize + 3UL) / 4UL)); /* Move the input parameters Point P coordinate x to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_POINT_CHECK_IN_INITIAL_POINT_X], in->pointX, in->modulusSize); - hpka->Instance->RAM[PKA_POINT_CHECK_IN_INITIAL_POINT_X + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_POINT_CHECK_IN_INITIAL_POINT_X + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters Point P coordinate y to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_POINT_CHECK_IN_INITIAL_POINT_Y], in->pointY, in->modulusSize); - hpka->Instance->RAM[PKA_POINT_CHECK_IN_INITIAL_POINT_Y + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_POINT_CHECK_IN_INITIAL_POINT_Y + ((in->modulusSize + 3UL) / 4UL)); + } + /** * @brief Set input parameters. * @param hpka PKA handle @@ -2297,29 +2343,28 @@ void PKA_ECCMulFastMode_Set(PKA_HandleTypeDef *hpka, PKA_ECCMulFastModeInTypeDef /* Move the input parameters coefficient |a| to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECC_SCALAR_MUL_IN_A_COEFF], in->coefA, in->modulusSize); - hpka->Instance->RAM[PKA_ECC_SCALAR_MUL_IN_A_COEFF + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECC_SCALAR_MUL_IN_A_COEFF + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters modulus value p to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECC_SCALAR_MUL_IN_MOD_GF], in->modulus, in->modulusSize); - hpka->Instance->RAM[PKA_ECC_SCALAR_MUL_IN_MOD_GF + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECC_SCALAR_MUL_IN_MOD_GF + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters scalar multiplier k to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ECC_SCALAR_MUL_IN_K], in->scalarMul, in->scalarMulSize); - hpka->Instance->RAM[PKA_ECC_SCALAR_MUL_IN_K + ((in->scalarMulSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECC_SCALAR_MUL_IN_K + ((in->scalarMulSize + 3UL) / 4UL)); /* Move the input parameters Point P coordinate x to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_POINT_CHECK_IN_INITIAL_POINT_X], in->pointX, in->modulusSize); - hpka->Instance->RAM[PKA_POINT_CHECK_IN_INITIAL_POINT_X + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_POINT_CHECK_IN_INITIAL_POINT_X + ((in->modulusSize + 3UL) / 4UL)); /* Move the input parameters Point P coordinate y to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_POINT_CHECK_IN_INITIAL_POINT_Y], in->pointY, in->modulusSize); - hpka->Instance->RAM[PKA_POINT_CHECK_IN_INITIAL_POINT_Y + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_POINT_CHECK_IN_INITIAL_POINT_Y + ((in->modulusSize + 3UL) / 4UL)); /* Move the Montgomery parameter to PKA RAM */ PKA_Memcpy_u32_to_u32(&hpka->Instance->RAM[PKA_ECC_SCALAR_MUL_IN_MONTGOMERY_PARAM], in->pMontgomeryParam, (in->modulusSize + 3UL) / 4UL); - hpka->Instance->RAM[PKA_ECC_SCALAR_MUL_IN_MONTGOMERY_PARAM + ((in->modulusSize + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ECC_SCALAR_MUL_IN_MONTGOMERY_PARAM + ((in->modulusSize + 3UL) / 4UL)); } - /** * @brief Set input parameters. * @param hpka PKA handle @@ -2332,11 +2377,11 @@ void PKA_ModInv_Set(PKA_HandleTypeDef *hpka, PKA_ModInvInTypeDef *in) /* Move the input parameters operand A to PKA RAM */ PKA_Memcpy_u32_to_u32(&hpka->Instance->RAM[PKA_MODULAR_INV_IN_OP1], in->pOp1, in->size); - hpka->Instance->RAM[PKA_MODULAR_INV_IN_OP1 + in->size] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_INV_IN_OP1 + in->size); /* Move the input parameters modulus value n to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_MODULAR_INV_IN_OP2_MOD], in->pMod, in->size * 4UL); - hpka->Instance->RAM[PKA_MODULAR_INV_IN_OP2_MOD + in->size] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_INV_IN_OP2_MOD + in->size); } /** @@ -2354,11 +2399,11 @@ void PKA_ModRed_Set(PKA_HandleTypeDef *hpka, PKA_ModRedInTypeDef *in) /* Move the input parameters operand A to PKA RAM */ PKA_Memcpy_u32_to_u32(&hpka->Instance->RAM[PKA_MODULAR_REDUC_IN_OPERAND], in->pOp1, in->OpSize); - hpka->Instance->RAM[PKA_MODULAR_REDUC_IN_OPERAND + in->OpSize] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_REDUC_IN_OPERAND + in->OpSize); /* Move the input parameters modulus value n to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_MODULAR_REDUC_IN_MODULUS], in->pMod, in->modSize); - hpka->Instance->RAM[PKA_MODULAR_REDUC_IN_MODULUS + (in->modSize / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MODULAR_REDUC_IN_MODULUS + (in->modSize / 4UL)); } /** @@ -2376,7 +2421,7 @@ void PKA_MontgomeryParam_Set(PKA_HandleTypeDef *hpka, const uint32_t size, const /* Move the input parameters pOp1 to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_MONTGOMERY_PARAM_IN_MODULUS], pOp1, size); - hpka->Instance->RAM[PKA_MONTGOMERY_PARAM_IN_MODULUS + ((size + 3UL) / 4UL)] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_MONTGOMERY_PARAM_IN_MODULUS + ((size + 3UL) / 4UL)); } } @@ -2397,21 +2442,21 @@ void PKA_ARI_Set(PKA_HandleTypeDef *hpka, const uint32_t size, const uint32_t *p { /* Move the input parameters pOp1 to PKA RAM */ PKA_Memcpy_u32_to_u32(&hpka->Instance->RAM[PKA_ARITHMETIC_ALL_OPS_IN_OP1], pOp1, size); - hpka->Instance->RAM[PKA_ARITHMETIC_ALL_OPS_IN_OP1 + size] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ARITHMETIC_ALL_OPS_IN_OP1 + size); } if (pOp2 != NULL) { /* Move the input parameters pOp2 to PKA RAM */ PKA_Memcpy_u32_to_u32(&hpka->Instance->RAM[PKA_ARITHMETIC_ALL_OPS_IN_OP2], pOp2, size); - hpka->Instance->RAM[PKA_ARITHMETIC_ALL_OPS_IN_OP2 + size] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ARITHMETIC_ALL_OPS_IN_OP2 + size); } if (pOp3 != NULL) { /* Move the input parameters pOp3 to PKA RAM */ PKA_Memcpy_u8_to_u32(&hpka->Instance->RAM[PKA_ARITHMETIC_ALL_OPS_IN_OP3], pOp3, size * 4UL); - hpka->Instance->RAM[PKA_ARITHMETIC_ALL_OPS_IN_OP3 + size] = 0UL; + __PKA_RAM_PARAM_END(hpka->Instance->RAM, PKA_ARITHMETIC_ALL_OPS_IN_OP3 + size); } } diff --git a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_usart_ex.c b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_usart_ex.c index 0cd893884..aaf694607 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_usart_ex.c +++ b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_hal_usart_ex.c @@ -54,11 +54,17 @@ #ifdef HAL_USART_MODULE_ENABLED /* Private typedef -----------------------------------------------------------*/ +/** @defgroup USARTEx_Private_Constants USARTEx Private Constants + * @{ + */ /* UART RX FIFO depth */ #define RX_FIFO_DEPTH 8U /* UART TX FIFO depth */ #define TX_FIFO_DEPTH 8U +/** + * @} + */ /* Private define ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/ diff --git a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_lptim.c b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_lptim.c index 07b94110a..16cde97df 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_lptim.c +++ b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_lptim.c @@ -179,14 +179,6 @@ ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef *LPTIMx, LL_LPTIM_InitTypeDef *LPTIM_Ini return result; } -/** - * @} - */ - -/** - * @} - */ - /** * @brief Disable the LPTIM instance * @rmtoll CR ENABLE LL_LPTIM_Disable @@ -287,6 +279,7 @@ void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx) LL_LPTIM_ClearFlag_ARROK(LPTIMx); } + /* Restore LPTIM source kernel clock */ LL_RCC_SetLPTIMClockSource(tmpclksource); } @@ -300,6 +293,14 @@ void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx) __enable_irq(); } +/** + * @} + */ + +/** + * @} + */ + /** * @} */ diff --git a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_pka.c b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_pka.c index fdb04ad9a..6f3b6617f 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_pka.c +++ b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_pka.c @@ -63,7 +63,6 @@ ((__VALUE__) == LL_PKA_MODE_MODULAR_ADD) ||\ ((__VALUE__) == LL_PKA_MODE_MODULAR_SUB) ||\ ((__VALUE__) == LL_PKA_MODE_MONTGOMERY_MUL)) - /** * @} */ diff --git a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_rng.c b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_rng.c index 330001220..07a660fd8 100644 --- a/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_rng.c +++ b/Drivers/STM32WBxx_HAL_Driver/Src/stm32wbxx_ll_rng.c @@ -42,7 +42,7 @@ /* Private variables ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/ -/** @addtogroup RNG_LL_Private_Macros +/** @defgroup RNG_LL_Private_Macros RNG Private Macros * @{ */ #define IS_LL_RNG_CED(__MODE__) (((__MODE__) == LL_RNG_CED_ENABLE) || \ diff --git a/Middlewares/ST/STM32_WPAN/Release_Notes.html b/Middlewares/ST/STM32_WPAN/Release_Notes.html index 1e16f0623..b20dbca29 100644 --- a/Middlewares/ST/STM32_WPAN/Release_Notes.html +++ b/Middlewares/ST/STM32_WPAN/Release_Notes.html @@ -49,9 +49,25 @@

Update History

- +

Main Changes

+

Interface:

+
    +
  • Added new commmand SHCI_C2_ExtpaConfig() to support external PA
    • +
  • Update System and BLE transport layer so that a user event packet is released by default
    • +
+

BLE:

+
    +
  • Added support to ACI_GATT_READ_EX_EVENT
    • +
  • Added macro HCI_LE_ADVERTISING_REPORT_RSSI_0(p) to extract properly RSSI from the event packet
    • +
+
+
+
+ +
+

Main Changes

General: