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author | Sebastián Aedo <saedo@codeweavers.com> | 2021-11-02 23:17:13 +0300 |
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committer | Sebastián Aedo <saedo@codeweavers.com> | 2021-11-02 23:17:13 +0300 |
commit | f099d714f3cfb30660906ed8196a643f06f882bc (patch) | |
tree | 7900e0bfa01377e168db8492bde95b950d7c3484 /spirv_cross_parsed_ir.hpp | |
parent | 3eb55329791efbbc691924cd3533ca459764dd28 (diff) |
Removing logic in the parser
Moving out the logic from the parser as requested because it's sensitive
to try to keep the parsing the most simple process as said.
For that, the load_types is now tracked in the ParsedIR, which can be
accessed in the Compiler struct. The switch cases are fixed in the CFG
stage since that's the point where the nullptr is deref.
Signed-off-by: Sebastián Aedo <saedo@codeweavers.com>
Diffstat (limited to 'spirv_cross_parsed_ir.hpp')
-rw-r--r-- | spirv_cross_parsed_ir.hpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/spirv_cross_parsed_ir.hpp b/spirv_cross_parsed_ir.hpp index 8971a970..168c70f2 100644 --- a/spirv_cross_parsed_ir.hpp +++ b/spirv_cross_parsed_ir.hpp @@ -78,6 +78,12 @@ public: SmallVector<ID> ids_for_constant_or_type; SmallVector<ID> ids_for_constant_or_variable; + // We need to keep track of all the Ops that contains a type for the + // OpSwitch instruction, since this one doesn't contains the type in the + // instruction itself. And in some case we need to cast the condition to + // wider types. + std::unordered_map<ID, const SPIRType&> load_types; + // Declared capabilities and extensions in the SPIR-V module. // Not really used except for reflection at the moment. SmallVector<spv::Capability> declared_capabilities; |