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authorD4SK <konstantin.vogel@gmx.net>2022-10-20 23:10:36 +0300
committerKevin O'Connor <kevin@koconnor.net>2022-10-22 03:33:28 +0300
commita65e04aff7720fa1ac8e0967c2d71736911a8112 (patch)
tree7e271dd63d0634668382bfe90a75e7dc8ee68e41
parent00191b5cc4c626c61ff45afa1949e3977547909e (diff)
docs: Add step rate benchmark for stm32h7
Signed-off-by: Konstantin Vogel <konstantin.vogel@gmx.net> Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
-rw-r--r--docs/Benchmarks.md20
-rw-r--r--docs/Features.md1
2 files changed, 21 insertions, 0 deletions
diff --git a/docs/Benchmarks.md b/docs/Benchmarks.md
index ff2b895cd..f9d0c92be 100644
--- a/docs/Benchmarks.md
+++ b/docs/Benchmarks.md
@@ -248,6 +248,26 @@ results were obtained by running an STM32F407 binary on an STM32F446
| 1 stepper | 46 |
| 3 stepper | 205 |
+### STM32H7 step rate benchmark
+
+The following configuration sequence is used on a STM32H743VIT6:
+```
+allocate_oids count=3
+config_stepper oid=0 step_pin=PD4 dir_pin=PD3 invert_step=-1 step_pulse_ticks=0
+config_stepper oid=1 step_pin=PA15 dir_pin=PA8 invert_step=-1 step_pulse_ticks=0
+config_stepper oid=2 step_pin=PE2 dir_pin=PE3 invert_step=-1 step_pulse_ticks=0
+finalize_config crc=0
+```
+
+The test was last run on commit `00191b5c` with gcc version
+`arm-none-eabi-gcc (15:8-2019-q3-1+b1) 8.3.1 20190703 (release)
+[gcc-8-branch revision 273027]`.
+
+| stm32h7 | ticks |
+| -------------------- | ----- |
+| 1 stepper | 44 |
+| 3 stepper | 198 |
+
### STM32G0B1 step rate benchmark
The following configuration sequence is used on the STM32G0B1:
diff --git a/docs/Features.md b/docs/Features.md
index a29703667..aa5687603 100644
--- a/docs/Features.md
+++ b/docs/Features.md
@@ -175,6 +175,7 @@ represent total number of steps per second on the micro-controller.
| SAMD51 | 3077K | 1885K |
| STM32F407 | 3652K | 2459K |
| STM32F446 | 3913K | 2634K |
+| STM32H743 | 9091K | 6061K |
If unsure of the micro-controller on a particular board, find the
appropriate [config file](../config/), and look for the