diff options
| -rw-r--r-- | src/atomic_ops/sysdeps/gcc/alpha.h | 2 | ||||
| -rw-r--r-- | src/atomic_ops/sysdeps/gcc/mips.h | 9 |
2 files changed, 5 insertions, 6 deletions
diff --git a/src/atomic_ops/sysdeps/gcc/alpha.h b/src/atomic_ops/sysdeps/gcc/alpha.h index 8ce67a0..3b98bec 100644 --- a/src/atomic_ops/sysdeps/gcc/alpha.h +++ b/src/atomic_ops/sysdeps/gcc/alpha.h @@ -57,7 +57,7 @@ AO_compare_and_swap(volatile AO_t *addr, " stq_c %0,%1\n" " beq %0,1b\n" "2:\n" - :"=&r" (temp), "=m" (*addr), "=&r" (was_equal) + : "=&r" (temp), "+m" (*addr), "=&r" (was_equal) : "r" (new_val), "Ir" (old) :"memory"); return (int)was_equal; diff --git a/src/atomic_ops/sysdeps/gcc/mips.h b/src/atomic_ops/sysdeps/gcc/mips.h index 10bb571..a891de6 100644 --- a/src/atomic_ops/sysdeps/gcc/mips.h +++ b/src/atomic_ops/sysdeps/gcc/mips.h @@ -59,7 +59,6 @@ AO_fetch_and_add(volatile AO_t *addr, AO_t incr) register int temp; __asm__ __volatile__( - " .set push\n" " .set mips2\n" " .set noreorder\n" @@ -71,7 +70,7 @@ AO_fetch_and_add(volatile AO_t *addr, AO_t incr) " beqz %1, 1b\n" " nop\n" " .set pop " - : "=&r" (result), "=&r" (temp), "=m" (*addr) + : "=&r" (result), "=&r" (temp), "+m" (*addr) : "Ir" (incr) : "memory"); return (AO_t)result; @@ -96,7 +95,7 @@ AO_test_and_set(volatile AO_TS_t *addr) " beqz %1, 1b\n" " nop\n" " .set pop " - : "=&r" (oldval), "=&r" (temp), "=m" (*addr) + : "=&r" (oldval), "=&r" (temp), "+m" (*addr) : "r" (1) : "memory"); return (AO_TS_VAL_t)oldval; @@ -127,7 +126,7 @@ AO_test_and_set(volatile AO_TS_t *addr) " beqz %0, 1b \n" " li %2, 1 \n" "2: " - : "=&r" (temp), "+R" (*addr), "+r" (was_equal) + : "=&r" (temp), "+m" (*addr), "+r" (was_equal) : "r" (new_val), "r" (old) : "memory"); return was_equal; @@ -155,7 +154,7 @@ AO_fetch_compare_and_swap(volatile AO_t *addr, AO_t old, AO_t new_val) " nop\n" " .set pop\n" "2:" - : "=&r" (fetched_val), "=&r" (temp), "=m" (*addr) + : "=&r" (fetched_val), "=&r" (temp), "+m" (*addr) : "r" (new_val), "Jr" (old) : "memory"); return (AO_t)fetched_val; |