From d0cdd70168852a00234760ed980a9cda2f5fabc7 Mon Sep 17 00:00:00 2001 From: kobalicek Date: Mon, 20 Jun 2022 09:16:39 +0200 Subject: [Bug] Fixed incorrect encoding of LDRSH instruction with [base+imm] addressing (AArch64) (fixes #372) --- src/asmjit/arm/a64instdb.cpp | 4 ++-- test/asmjit_test_assembler_a64.cpp | 4 ++++ 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/src/asmjit/arm/a64instdb.cpp b/src/asmjit/arm/a64instdb.cpp index 0c32690..5b722b4 100644 --- a/src/asmjit/arm/a64instdb.cpp +++ b/src/asmjit/arm/a64instdb.cpp @@ -227,7 +227,7 @@ const InstInfo _instInfoTable[] = { INST(Ldrb , BaseLdSt , (0b0011100101, 0b00111000010, 0b00111000011, 0 , kW , 0 , 0, Inst::kIdLdurb) , kRWI_W , 0 , 1 , 1568), // #157 INST(Ldrh , BaseLdSt , (0b0111100101, 0b01111000010, 0b01111000011, 0 , kW , 0 , 1, Inst::kIdLdurh) , kRWI_W , 0 , 2 , 1573), // #158 INST(Ldrsb , BaseLdSt , (0b0011100111, 0b00111000100, 0b00111000111, 0 , kWX, 22, 0, Inst::kIdLdursb) , kRWI_W , 0 , 3 , 1578), // #159 - INST(Ldrsh , BaseLdSt , (0b0111100110, 0b01111000100, 0b01111000111, 0 , kWX, 22, 1, Inst::kIdLdursh) , kRWI_W , 0 , 4 , 1584), // #160 + INST(Ldrsh , BaseLdSt , (0b0111100111, 0b01111000100, 0b01111000111, 0 , kWX, 22, 1, Inst::kIdLdursh) , kRWI_W , 0 , 4 , 1584), // #160 INST(Ldrsw , BaseLdSt , (0b1011100110, 0b10111000100, 0b10111000101, 0b10011000, kX , 0 , 2, Inst::kIdLdursw) , kRWI_W , 0 , 5 , 1590), // #161 INST(Ldset , BaseAtomicOp , (0b1011100000100000001100, kWX, 30, 0) , kRWI_WRX , 0 , 48 , 1596), // #162 INST(Ldseta , BaseAtomicOp , (0b1011100010100000001100, kWX, 30, 1) , kRWI_WRX , 0 , 49 , 1602), // #163 @@ -1133,7 +1133,7 @@ const BaseLdSt baseLdSt[9] = { { 0b0011100101, 0b00111000010, 0b00111000011, 0 , kW , 0 , 0, Inst::kIdLdurb }, // ldrb { 0b0111100101, 0b01111000010, 0b01111000011, 0 , kW , 0 , 1, Inst::kIdLdurh }, // ldrh { 0b0011100111, 0b00111000100, 0b00111000111, 0 , kWX, 22, 0, Inst::kIdLdursb }, // ldrsb - { 0b0111100110, 0b01111000100, 0b01111000111, 0 , kWX, 22, 1, Inst::kIdLdursh }, // ldrsh + { 0b0111100111, 0b01111000100, 0b01111000111, 0 , kWX, 22, 1, Inst::kIdLdursh }, // ldrsh { 0b1011100110, 0b10111000100, 0b10111000101, 0b10011000, kX , 0 , 2, Inst::kIdLdursw }, // ldrsw { 0b1011100100, 0b10111000000, 0b10111000001, 0 , kWX, 30, 2, Inst::kIdStur }, // str { 0b0011100100, 0b00111000000, 0b00111000001, 0 , kW , 30, 0, Inst::kIdSturb }, // strb diff --git a/test/asmjit_test_assembler_a64.cpp b/test/asmjit_test_assembler_a64.cpp index 74a212f..9b9a925 100644 --- a/test/asmjit_test_assembler_a64.cpp +++ b/test/asmjit_test_assembler_a64.cpp @@ -487,18 +487,22 @@ static void ASMJIT_NOINLINE testA64AssemblerBase(AssemblerTester TEST_INSTRUCTION("41705F78", ldrh(w1, ptr(x2, -9))); // LDURH TEST_INSTRUCTION("4168E338", ldrsb(w1, ptr(x2, x3))); TEST_INSTRUCTION("4104C039", ldrsb(w1, ptr(x2, 1))); + TEST_INSTRUCTION("4120C039", ldrsb(w1, ptr(x2, 8))); TEST_INSTRUCTION("41D0DF38", ldrsb(w1, ptr(x2, -3))); // LDURSB TEST_INSTRUCTION("4170DF38", ldrsb(w1, ptr(x2, -9))); // LDURSB TEST_INSTRUCTION("4168A338", ldrsb(x1, ptr(x2, x3))); TEST_INSTRUCTION("41048039", ldrsb(x1, ptr(x2, 1))); + TEST_INSTRUCTION("41208039", ldrsb(x1, ptr(x2, 8))); TEST_INSTRUCTION("41D09F38", ldrsb(x1, ptr(x2, -3))); // LDURSB TEST_INSTRUCTION("41709F38", ldrsb(x1, ptr(x2, -9))); // LDURSB TEST_INSTRUCTION("4168E378", ldrsh(w1, ptr(x2, x3))); TEST_INSTRUCTION("4110C078", ldrsh(w1, ptr(x2, 1))); // LDURSH + TEST_INSTRUCTION("4110C079", ldrsh(w1, ptr(x2, 8))); TEST_INSTRUCTION("41D0DF78", ldrsh(w1, ptr(x2, -3))); // LDURSH TEST_INSTRUCTION("4170DF78", ldrsh(w1, ptr(x2, -9))); // LDURSH TEST_INSTRUCTION("4168A378", ldrsh(x1, ptr(x2, x3))); TEST_INSTRUCTION("41108078", ldrsh(x1, ptr(x2, 1))); // LDURSH + TEST_INSTRUCTION("41108079", ldrsh(x1, ptr(x2, 8))); TEST_INSTRUCTION("41D09F78", ldrsh(x1, ptr(x2, -3))); // LDURSH TEST_INSTRUCTION("41709F78", ldrsh(x1, ptr(x2, -9))); // LDURSH TEST_INSTRUCTION("410080B9", ldrsw(x1, ptr(x2))); -- cgit v1.2.3