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authorGuillaume Chatelet <chatelet.guillaume@gmail.com>2019-01-22 15:19:42 +0300
committerGitHub <noreply@github.com>2019-01-22 15:19:42 +0300
commitd395dfa026d3c1177bb0e27ff3d1c95d04f42382 (patch)
tree08de50b5016ccd2c803fe75f8969113f569da690
parent5911e96bbd10b92aadde4bf3e2ee15885f5c6c71 (diff)
Add x86 missing feature detections for ndk_compat (#58)
One more step towards #47.
-rw-r--r--include/cpuinfo_x86.h9
-rw-r--r--ndk_compat/cpu-features.c10
-rw-r--r--src/cpuinfo_x86.c20
-rw-r--r--test/cpuinfo_x86_test.cc4
4 files changed, 38 insertions, 5 deletions
diff --git a/include/cpuinfo_x86.h b/include/cpuinfo_x86.h
index 13bcdf4..bb61293 100644
--- a/include/cpuinfo_x86.h
+++ b/include/cpuinfo_x86.h
@@ -20,6 +20,7 @@
CPU_FEATURES_START_CPP_NAMESPACE
// See https://en.wikipedia.org/wiki/CPUID for a list of x86 cpu features.
+// The field names are based on the short name provided in the wikipedia tables.
typedef struct {
int aes : 1;
int erms : 1;
@@ -55,6 +56,10 @@ typedef struct {
int smx : 1;
int sgx : 1;
int cx16 : 1; // aka. CMPXCHG16B
+ int sha : 1;
+ int popcnt : 1;
+ int movbe : 1;
+ int rdrnd : 1;
// Make sure to update X86FeaturesEnum below if you add a field here.
} X86Features;
@@ -140,6 +145,10 @@ typedef enum {
X86_SMX,
X86_SGX,
X86_CX16,
+ X86_SHA,
+ X86_POPCNT,
+ X86_MOVBE,
+ X86_RDRND,
X86_LAST_,
} X86FeaturesEnum;
diff --git a/ndk_compat/cpu-features.c b/ndk_compat/cpu-features.c
index 9a2c5eb..715dc4f 100644
--- a/ndk_compat/cpu-features.c
+++ b/ndk_compat/cpu-features.c
@@ -124,15 +124,15 @@ static void android_cpuInit(void) {
#elif defined(CPU_FEATURES_ARCH_X86)
X86Info info = GetX86Info();
if (info.features.ssse3) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSSE3;
+ if (info.features.popcnt) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_POPCNT;
+ if (info.features.movbe) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_MOVBE;
if (info.features.sse4_1) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSE4_1;
if (info.features.sse4_2) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSE4_2;
+ if (info.features.aes) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_AES_NI;
if (info.features.avx) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_AVX;
+ if (info.features.rdrnd) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_RDRAND;
if (info.features.avx2) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_AVX2;
- // if (info.features.) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_MOVBE;
- // if (info.features.) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_AES_NI;
- // if (info.features.) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_RDRAND;
- // if (info.features.) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_POPCNT;
- // if (info.features.) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SHA_NI;
+ if (info.features.sha) g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SHA_NI;
#elif defined(CPU_FEATURES_ARCH_MIPS)
MipsInfo info = GetMipsInfo();
if (info.features.r6) g_cpuFeatures |= ANDROID_CPU_MIPS_FEATURE_R6;
diff --git a/src/cpuinfo_x86.c b/src/cpuinfo_x86.c
index 89e3a6f..2bec7bd 100644
--- a/src/cpuinfo_x86.c
+++ b/src/cpuinfo_x86.c
@@ -145,12 +145,16 @@ static void ParseCpuId(const uint32_t max_cpuid_leaf, X86Info* info) {
features->smx = IsBitSet(leaf_1.ecx, 6);
features->cx16 = IsBitSet(leaf_1.ecx, 13);
+ features->movbe = IsBitSet(leaf_1.ecx, 22);
+ features->popcnt = IsBitSet(leaf_1.ecx, 23);
features->aes = IsBitSet(leaf_1.ecx, 25);
features->f16c = IsBitSet(leaf_1.ecx, 29);
+ features->rdrnd = IsBitSet(leaf_1.ecx, 30);
features->sgx = IsBitSet(leaf_7.ebx, 2);
features->bmi1 = IsBitSet(leaf_7.ebx, 3);
features->bmi2 = IsBitSet(leaf_7.ebx, 8);
features->erms = IsBitSet(leaf_7.ebx, 9);
+ features->sha = IsBitSet(leaf_7.ebx, 29);
features->vpclmulqdq = IsBitSet(leaf_7.ecx, 10);
if (have_sse_os_support) {
@@ -370,6 +374,14 @@ int GetX86FeaturesEnumValue(const X86Features* features,
return features->sgx;
case X86_CX16:
return features->cx16;
+ case X86_SHA:
+ return features->sha;
+ case X86_POPCNT:
+ return features->popcnt;
+ case X86_MOVBE:
+ return features->movbe;
+ case X86_RDRND:
+ return features->rdrnd;
case X86_LAST_:
break;
}
@@ -438,6 +450,14 @@ const char* GetX86FeaturesEnumName(X86FeaturesEnum value) {
return "sgx";
case X86_CX16:
return "cx16";
+ case X86_SHA:
+ return "sha";
+ case X86_POPCNT:
+ return "popcnt";
+ case X86_MOVBE:
+ return "movbe";
+ case X86_RDRND:
+ return "rdrnd";
case X86_LAST_:
break;
}
diff --git a/test/cpuinfo_x86_test.cc b/test/cpuinfo_x86_test.cc
index f7fc081..2389de9 100644
--- a/test/cpuinfo_x86_test.cc
+++ b/test/cpuinfo_x86_test.cc
@@ -90,6 +90,10 @@ TEST(CpuidX86Test, SandyBridge) {
EXPECT_TRUE(features.sse4_1);
EXPECT_TRUE(features.sse4_2);
EXPECT_TRUE(features.avx);
+ EXPECT_FALSE(features.sha);
+ EXPECT_TRUE(features.popcnt);
+ EXPECT_FALSE(features.movbe);
+ EXPECT_FALSE(features.rdrnd);
}
TEST(CpuidX86Test, SandyBridgeTestOsSupport) {