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Freeing the data on unload seems to cause a hang. WIP investigation.
The old way we OR'ed the InitMask was both prone to racing and causing
incorrect failure codes, as well as was limited by 64 processors.
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Some of the fields used during CPU initialization are never needed
later, so put them in a union with the hypervisor stack. Additionally,
by putting the hypervisor stack at the beginning of the VP Data, we can
retrieve it without calling a kernel function.
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Computed the mask incorrectly for success case.
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Each processor now allocates its own node-local memory, instead of
relying on a single global array on an arbitrary node. This should help
performance on NUMA system.
Additionally, each processor now checks its own VMX status, and reports
back its unique VMX initialization, isntead of assuming all CPUs
initialized or all failed. A mask is used to report which CPUs did not
initialize, and a failure status can now be returned.
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The MSR Bitmap and EPML4/EPDPTEs were allocated globally, with each LP's
VMCS pointing to the same physical address. Make things simpler and more
efficient (especially if we take advantage of NUMA) by giving each
LP/VMCS its own MSR Bitmap and EPT structures. The intent here is not to
de-synchronize this data, as we have no exits which would cause either
of these structures to change and require synchronization.
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misc. cleanups
SimpleVisor was previously using the presence of *ANY* hypervisor as a
sign that it is already loaded. This breaks if the loaded hypervisor
actually supports nesting and/or isn't SimpleVisor. As such, always try
to enable SimpleVisor -- ShvVmxProbe will fail if we can't, and detect
SimpleVisor explicitly using the Hyper-V Detection Interface (used by
all hypervisors these days).
Second, stop using KeSaveStateForHibernate. While it saved us the need
for two more assembly instructions (str/sldt), it appears to have bugs
around handling of DebugControl, on top of the other bugs we already had
to work around. Instead, just use compiler instrincs to grab the
required state, which is faster anyway.
Move Intel VT-x specific structures into vmx.h instead of shv.h
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Give each CPU the same VPID as they are sharing the same physical
address space.
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Create 1:1 512GB hugepage mappings with EPT enabled.
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Fix Joanna's name
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Fixed link to MoRE project in documentation
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Remove read from MSR_IA32_VMX_VMFUNC
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MSR, which is not available on processors before Haswell. This MSR was not referenced in this project anyway.
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Also build PDB
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Fix some spelling mistakes
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Begin refactoring and commenting efforts.
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SimpleVisor initial check-in. Tested on Windows 8.1 on Haswell, Windows
10 TH2 on Skylake, Windows 10 RS1 on Sandy Bridge. Comments & readme to
follow.
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