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authorMateusz Chudyk <mateuszchudyk@gmail.com>2019-06-21 20:06:11 +0300
committerMateusz Chudyk <mateuszchudyk@gmail.com>2019-06-25 15:34:05 +0300
commitbdfc834841b1e7c30a95ad4f8c1c665acadcf39b (patch)
tree292f20bedea948b5963ee0163a4ae06bee8b3e15 /test/postprocess
parent968713e30ef28b9422b445733080c33641722e33 (diff)
Move postprocess tests to subdir
Diffstat (limited to 'test/postprocess')
-rw-r--r--test/postprocess/add_bias_test.cc95
-rw-r--r--test/postprocess/pipeline_test.cc63
-rw-r--r--test/postprocess/relu_test.cc88
-rw-r--r--test/postprocess/sigmoid_test.cc39
-rw-r--r--test/postprocess/tanh_test.cc39
5 files changed, 324 insertions, 0 deletions
diff --git a/test/postprocess/add_bias_test.cc b/test/postprocess/add_bias_test.cc
new file mode 100644
index 0000000..8d8b46c
--- /dev/null
+++ b/test/postprocess/add_bias_test.cc
@@ -0,0 +1,95 @@
+#include "3rd_party/catch.hpp"
+#include "aligned.h"
+#include "postprocess.h"
+
+#include <numeric>
+
+namespace intgemm {
+
+INTGEMM_SSE2 TEST_CASE("AddBias SSE2",) {
+ if (kCPU < CPUType::SSE2)
+ return;
+
+ AlignedVector<float> input(8);
+ AlignedVector<float> bias(8);
+ AlignedVector<float> output(8);
+
+ std::iota(input.begin(), input.end(), -2);
+ std::iota(bias.begin(), bias.end(), 0);
+
+ auto postproc = PostprocessImpl<AddBias, CPUType::SSE2>(AddBias(bias.begin(), bias.size()));
+ auto output_tmp = postproc.run({input.as<__m128>()[0], input.as<__m128>()[1]}, 0);
+ output.as<__m128>()[0] = output_tmp.pack0123;
+ output.as<__m128>()[1] = output_tmp.pack4567;
+
+ CHECK(output[0] == -2.f); // input = -2, bias = 0
+ CHECK(output[1] == 0.f); // input = -1, bias = 1
+ CHECK(output[2] == 2.f); // input = 0, bias = 2
+ CHECK(output[3] == 4.f); // input = 1, bias = 3
+ CHECK(output[4] == 6.f); // input = 2, bias = 4
+ CHECK(output[5] == 8.f); // input = 3, bias = 5
+ CHECK(output[6] == 10.f); // input = 4, bias = 6
+ CHECK(output[7] == 12.f); // input = 5, bias = 7
+}
+
+INTGEMM_AVX2 TEST_CASE("AddBias AVX2",) {
+ if (kCPU < CPUType::AVX2)
+ return;
+
+ AlignedVector<float> input(8);
+ AlignedVector<float> bias(8);
+ AlignedVector<float> output(8);
+
+ std::iota(input.begin(), input.end(), -4);
+ std::iota(bias.begin(), bias.end(), 0);
+
+ auto postproc = PostprocessImpl<AddBias, CPUType::AVX2>(AddBias(bias.begin(), bias.size()));
+ *output.as<__m256>() = postproc.run(*input.as<__m256>(), 0);
+
+ CHECK(output[0] == -4.f); // input = -4, bias = 0
+ CHECK(output[1] == -2.f); // input = -3, bias = 1
+ CHECK(output[2] == 0.f); // input = -2, bias = 2
+ CHECK(output[3] == 2.f); // input = -1, bias = 3
+ CHECK(output[4] == 4.f); // input = 0, bias = 4
+ CHECK(output[5] == 6.f); // input = 1, bias = 5
+ CHECK(output[6] == 8.f); // input = 2, bias = 6
+ CHECK(output[7] == 10.f); // input = 3, bias = 7
+}
+
+#ifndef INTGEMM_NO_AVX512
+
+INTGEMM_AVX512BW TEST_CASE("AddBias AVX512",) {
+ if (kCPU < CPUType::AVX512BW)
+ return;
+
+ AlignedVector<float> input(16);
+ AlignedVector<float> bias(16);
+ AlignedVector<float> output(16);
+
+ std::iota(input.begin(), input.end(), -8);
+ std::iota(bias.begin(), bias.end(), 0);
+
+ auto postproc = PostprocessImpl<AddBias, CPUType::AVX512BW>(AddBias(bias.begin(), bias.size()));
+ *output.as<__m512>() = postproc.run(*input.as<__m512>(), 0);
+
+ CHECK(output[0] == -8.f); // input = -8, bias = 0
+ CHECK(output[1] == -6.f); // input = -7, bias = 1
+ CHECK(output[2] == -4.f); // input = -6, bias = 2
+ CHECK(output[3] == -2.f); // input = -5, bias = 3
+ CHECK(output[4] == 0.f); // input = -4, bias = 4
+ CHECK(output[5] == 2.f); // input = -3, bias = 5
+ CHECK(output[6] == 4.f); // input = -2, bias = 6
+ CHECK(output[7] == 6.f); // input = -1, bias = 7
+ CHECK(output[8] == 8.f); // input = 0, bias = 8
+ CHECK(output[9] == 10.f); // input = 1, bias = 9
+ CHECK(output[10] == 12.f); // input = 2, bias = 10
+ CHECK(output[11] == 14.f); // input = 3, bias = 11
+ CHECK(output[12] == 16.f); // input = 4, bias = 12
+ CHECK(output[13] == 18.f); // input = 5, bias = 13
+ CHECK(output[14] == 20.f); // input = 6, bias = 14
+ CHECK(output[15] == 22.f); // input = 7, bias = 15
+}
+
+#endif
+
+}
diff --git a/test/postprocess/pipeline_test.cc b/test/postprocess/pipeline_test.cc
new file mode 100644
index 0000000..8d60cff
--- /dev/null
+++ b/test/postprocess/pipeline_test.cc
@@ -0,0 +1,63 @@
+#include "3rd_party/catch.hpp"
+#include "aligned.h"
+#include "postprocess.h"
+
+#include <numeric>
+
+namespace intgemm {
+
+INTGEMM_AVX2 TEST_CASE("PostprocessPipeline AVX2", "Unquantize-ReLU") {
+ if (kCPU < CPUType::AVX2)
+ return;
+
+ AlignedVector<int32_t> input(8);
+ AlignedVector<float> output(8);
+
+ std::iota(input.begin(), input.end(), -2);
+
+ auto pipeline = CreatePostprocessPipeline(Unquantize(0.5f), ReLU());
+ auto inited_pipeline = InitPostprocessPipeline<CPUType::AVX2>(pipeline);
+ *output.as<__m256>() = inited_pipeline.run(*input.as<__m256i>(), 0);
+
+ CHECK(output[0] == 0.0f); // input = -2
+ CHECK(output[1] == 0.0f); // input = -1
+ CHECK(output[2] == 0.0f); // input = 0
+ CHECK(output[3] == 0.5f); // input = 1
+ CHECK(output[4] == 1.0f); // input = 2
+ CHECK(output[5] == 1.5f); // input = 3
+ CHECK(output[6] == 2.0f); // input = 4
+ CHECK(output[7] == 2.5f); // input = 5
+}
+
+INTGEMM_AVX2 TEST_CASE("PostprocessPipeline AVX2 on whole buffer", "Unquantize-ReLU") {
+ if (kCPU < CPUType::AVX2)
+ return;
+
+ AlignedVector<int32_t> input(16);
+ AlignedVector<float> output(16);
+
+ std::iota(input.begin(), input.end(), -8);
+
+ auto pipeline = CreatePostprocessPipeline(Unquantize(0.5f), ReLU());
+ auto inited_pipeline = InitPostprocessPipeline<CPUType::AVX2>(pipeline);
+ inited_pipeline.run(input.as<__m256i>(), 2, output.as<__m256>());
+
+ CHECK(output[0] == 0.f); // input = -8
+ CHECK(output[1] == 0.f); // input = -7
+ CHECK(output[2] == 0.f); // input = -6
+ CHECK(output[3] == 0.f); // input = -5
+ CHECK(output[4] == 0.f); // input = -4
+ CHECK(output[5] == 0.f); // input = -3
+ CHECK(output[6] == 0.f); // input = -2
+ CHECK(output[7] == 0.f); // input = -1
+ CHECK(output[8] == 0.0f); // input = 0
+ CHECK(output[9] == 0.5f); // input = 1
+ CHECK(output[10] == 1.0f); // input = 2
+ CHECK(output[11] == 1.5f); // input = 3
+ CHECK(output[12] == 2.0f); // input = 4
+ CHECK(output[13] == 2.5f); // input = 5
+ CHECK(output[14] == 3.0f); // input = 6
+ CHECK(output[15] == 3.5f); // input = 7
+}
+
+}
diff --git a/test/postprocess/relu_test.cc b/test/postprocess/relu_test.cc
new file mode 100644
index 0000000..fda7a2a
--- /dev/null
+++ b/test/postprocess/relu_test.cc
@@ -0,0 +1,88 @@
+#include "3rd_party/catch.hpp"
+#include "aligned.h"
+#include "postprocess.h"
+
+#include <numeric>
+
+namespace intgemm {
+
+INTGEMM_SSE2 TEST_CASE("ReLU SSE2",) {
+ if (kCPU < CPUType::SSE2)
+ return;
+
+ AlignedVector<float> input(8);
+ AlignedVector<float> output(8);
+ std::iota(input.begin(), input.end(), -2);
+
+ auto postproc = PostprocessImpl<ReLU, CPUType::SSE2>(ReLU());
+ auto output_tmp = postproc.run({input.as<__m128>()[0], input.as<__m128>()[1]}, 0);
+ output.as<__m128>()[0] = output_tmp.pack0123;
+ output.as<__m128>()[1] = output_tmp.pack4567;
+
+ CHECK(output[0] == 0.f); // input = -2
+ CHECK(output[1] == 0.f); // input = -1
+ CHECK(output[2] == 0.f); // input = 0
+ CHECK(output[3] == 1.f); // input = 1
+ CHECK(output[4] == 2.f); // input = 2
+ CHECK(output[5] == 3.f); // input = 3
+ CHECK(output[6] == 4.f); // input = 4
+ CHECK(output[7] == 5.f); // input = 5
+}
+
+INTGEMM_AVX2 TEST_CASE("ReLU AVX2",) {
+ if (kCPU < CPUType::AVX2)
+ return;
+
+ AlignedVector<float> input(8);
+ AlignedVector<float> output(8);
+
+ std::iota(input.begin(), input.end(), -4);
+
+ auto postproc = PostprocessImpl<ReLU, CPUType::AVX2>(ReLU());
+ *output.as<__m256>() = postproc.run(*input.as<__m256>(), 0);
+
+ CHECK(output[0] == 0.f); // input = -4
+ CHECK(output[1] == 0.f); // input = -3
+ CHECK(output[2] == 0.f); // input = -2
+ CHECK(output[3] == 0.f); // input = -1
+ CHECK(output[4] == 0.f); // input = 0
+ CHECK(output[5] == 1.f); // input = 1
+ CHECK(output[6] == 2.f); // input = 2
+ CHECK(output[7] == 3.f); // input = 3
+}
+
+#ifndef INTGEMM_NO_AVX512
+
+INTGEMM_AVX512BW TEST_CASE("ReLU AVX512",) {
+ if (kCPU < CPUType::AVX512BW)
+ return;
+
+ AlignedVector<float> input(16);
+ AlignedVector<float> output(16);
+
+ std::iota(input.begin(), input.end(), -8);
+
+ auto postproc = PostprocessImpl<ReLU, CPUType::AVX512BW>(ReLU());
+ *output.as<__m512>() = postproc.run(*input.as<__m512>(), 0);
+
+ CHECK(output[0] == 0.f); // input = -8
+ CHECK(output[1] == 0.f); // input = -7
+ CHECK(output[2] == 0.f); // input = -6
+ CHECK(output[3] == 0.f); // input = -5
+ CHECK(output[4] == 0.f); // input = -4
+ CHECK(output[5] == 0.f); // input = -3
+ CHECK(output[6] == 0.f); // input = -2
+ CHECK(output[7] == 0.f); // input = -1
+ CHECK(output[8] == 0.f); // input = 0
+ CHECK(output[9] == 1.f); // input = 1
+ CHECK(output[10] == 2.f); // input = 2
+ CHECK(output[11] == 3.f); // input = 3
+ CHECK(output[12] == 4.f); // input = 4
+ CHECK(output[13] == 5.f); // input = 5
+ CHECK(output[14] == 6.f); // input = 6
+ CHECK(output[15] == 7.f); // input = 7
+}
+
+#endif
+
+}
diff --git a/test/postprocess/sigmoid_test.cc b/test/postprocess/sigmoid_test.cc
new file mode 100644
index 0000000..fc50e37
--- /dev/null
+++ b/test/postprocess/sigmoid_test.cc
@@ -0,0 +1,39 @@
+#include "3rd_party/catch.hpp"
+#include "aligned.h"
+#include "postprocess.h"
+
+#include <numeric>
+
+#define CHECK_FLOAT(actual, expected, epsilon) \
+ do { \
+ if (fabs((actual) - (expected)) < epsilon) { SUCCEED(); } \
+ else { CHECK((actual) == (expected)); } \
+ } while(0)
+
+namespace intgemm {
+
+INTGEMM_AVX2 TEST_CASE("Sigmoid AVX2",) {
+ if (kCPU < CPUType::AVX2)
+ return;
+
+ const float error_tolerance = 0.001f;
+
+ AlignedVector<float> input(8);
+ AlignedVector<float> output(8);
+
+ std::iota(input.begin(), input.end(), -4);
+
+ auto postproc = PostprocessImpl<Sigmoid, CPUType::AVX2>(Sigmoid());
+ *output.as<__m256>() = postproc.run(*input.as<__m256>(), 0);
+
+ CHECK_FLOAT(output[0], 0.0179862f, error_tolerance); // input = -4
+ CHECK_FLOAT(output[1], 0.0474259f, error_tolerance); // input = -3
+ CHECK_FLOAT(output[2], 0.1192029f, error_tolerance); // input = -2
+ CHECK_FLOAT(output[3], 0.2689414f, error_tolerance); // input = -1
+ CHECK_FLOAT(output[4], 0.5f , error_tolerance); // input = 0
+ CHECK_FLOAT(output[5], 0.7310586f, error_tolerance); // input = 1
+ CHECK_FLOAT(output[6], 0.8807970f, error_tolerance); // input = 2
+ CHECK_FLOAT(output[7], 0.9525740f, error_tolerance); // input = 3
+}
+
+}
diff --git a/test/postprocess/tanh_test.cc b/test/postprocess/tanh_test.cc
new file mode 100644
index 0000000..54c34fd
--- /dev/null
+++ b/test/postprocess/tanh_test.cc
@@ -0,0 +1,39 @@
+#include "3rd_party/catch.hpp"
+#include "aligned.h"
+#include "postprocess.h"
+
+#include <numeric>
+
+#define CHECK_FLOAT(actual, expected, epsilon) \
+ do { \
+ if (fabs((actual) - (expected)) < epsilon) { SUCCEED(); } \
+ else { CHECK((actual) == (expected)); } \
+ } while(0)
+
+namespace intgemm {
+
+INTGEMM_AVX2 TEST_CASE("Tanh AVX2",) {
+ if (kCPU < CPUType::AVX2)
+ return;
+
+ const float error_tolerance = 0.001f;
+
+ AlignedVector<float> input(8);
+ AlignedVector<float> output(8);
+
+ std::generate(input.begin(), input.end(), [] () { static int n = -4; return n++ / 4.f; });
+
+ auto postproc = PostprocessImpl<Tanh, CPUType::AVX2>(Tanh());
+ *output.as<__m256>() = postproc.run(*input.as<__m256>(), 0);
+
+ CHECK_FLOAT(output[0], -0.7615942f, error_tolerance); // input = -1
+ CHECK_FLOAT(output[1], -0.6351490f, error_tolerance); // input = -0.75
+ CHECK_FLOAT(output[2], -0.4621172f, error_tolerance); // input = -0.5
+ CHECK_FLOAT(output[3], -0.2449187f, error_tolerance); // input = -0.25
+ CHECK_FLOAT(output[4], 0.0f , error_tolerance); // input = 0
+ CHECK_FLOAT(output[5], 0.2449187f, error_tolerance); // input = 0.25
+ CHECK_FLOAT(output[6], 0.4621172f, error_tolerance); // input = 0.5
+ CHECK_FLOAT(output[7], 0.6351490f, error_tolerance); // input = 0.75
+}
+
+}