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authorDavid Benjamin <davidben@chromium.org>2015-07-11 16:47:14 +0300
committerAdam Langley <agl@google.com>2015-07-20 21:59:44 +0300
commit7315251d4e2a532d78fef2536845b949d4b445c6 (patch)
tree4a9417bfc3e1dab54dc5ee84f8569d3ca1d96577 /include/openssl/cpu.h
parentaa58513f404f1d939fd2f6081e24c4c6b0027cb0 (diff)
Replace cpuid assembly with C code.
Rather, take a leaf out of Chromium's book and use MSVC's __cpuid and _xgetbv built-in, with an inline assembly emulated version for other compilers. This preserves the behavior of the original assembly with the following differences: - CPUs without cpuid aren't support. Chromium's base/cpu.cc doesn't check, and SSE2 support is part of our baseline; the perlasm code is always built with OPENSSL_IA32_SSE2. - The clear_xmm block in cpu-x86-asm.pl is removed. This was used to clear some XMM-using features if OSXSAVE was set but XCR0 reports the OS doesn't use XSAVE to store SSE state. This wasn't present in the x86_64 and seems wrong. Section 13.5.2 of the Intel manual, volume 1, explicitly says SSE may still be used in this case; the OS may save that state in FXSAVE instead. A side discussion on upstream's RT#2633 agrees. - The old code ran some AMD CPUs through the "intel" codepath and some went straight to "generic" after duplicating some, but not all, logic. The AMD copy didn't clear some reserved bits and didn't query CPUID 7 for AVX2 support. This is moot since AMD CPUs today don't support AVX2, but it seems they're expected to in the future? - Setting bit 10 is dropped. This doesn't appear to be queried anywhere, was 32-bit only, and seems a remnant of upstream's 14e21f863a3e3278bb8660ea9844e92e52e1f2f7. Change-Id: I0548877c97e997f7beb25e15f3fea71c68a951d2 Reviewed-on: https://boringssl-review.googlesource.com/5434 Reviewed-by: Adam Langley <agl@google.com>
Diffstat (limited to 'include/openssl/cpu.h')
-rw-r--r--include/openssl/cpu.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/include/openssl/cpu.h b/include/openssl/cpu.h
index 08dbae0c..981d246b 100644
--- a/include/openssl/cpu.h
+++ b/include/openssl/cpu.h
@@ -89,8 +89,7 @@ extern "C" {
* Index 3 is set to zero.
*
* Note: the CPUID bits are pre-adjusted for the OSXSAVE bit and the YMM and XMM
- * bits in XCR0, so it is not necessary to check those. However, instructions
- * requiring XMM support are not preadjusted for the FXSR bit. */
+ * bits in XCR0, so it is not necessary to check those. */
extern uint32_t OPENSSL_ia32cap_P[4];
#endif