diff options
| author | Jan Kotas <jkotas@microsoft.com> | 2017-01-25 04:45:59 +0300 |
|---|---|---|
| committer | Jan Kotas <jkotas@microsoft.com> | 2017-01-25 04:45:59 +0300 |
| commit | 9271b7edd05f4f10dd25d8ab7a8402cd1e4a89cd (patch) | |
| tree | 477972b5437e60dd5979a9a22cf02ddefd0f1ed1 /tests/CoreCLR.issues.targets | |
| parent | 30fc995b02807f7863cd6dde5d4944dc7ce7d0f2 (diff) | |
Change stackwalking to always use unadjusted IP
Handling of hardware exceptions had a hack to add +1 to the actual instruction IP. Windows x64 unwinder
is disassembling instructions at the IP passed in to detect method epilogs. If the bytes at IP + 1
happened to match the epilog pattern, the unwind is done as if we were in the middle of the epilog that
lead to spectacular crash.
This change is moving this adjustment to be done later for EH related things only, and not interfere
with stackwalking.
Fixes #2535
[tfs-changeset: 1645602]
Diffstat (limited to 'tests/CoreCLR.issues.targets')
| -rw-r--r-- | tests/CoreCLR.issues.targets | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/tests/CoreCLR.issues.targets b/tests/CoreCLR.issues.targets index 6caf9e45c..7132c4749 100644 --- a/tests/CoreCLR.issues.targets +++ b/tests/CoreCLR.issues.targets @@ -929,11 +929,6 @@ <ExcludeList Include="$(XunitTestBinBase)\JIT\Methodical\eh\basics\throwinfilter_d\throwinfilter_d.*" /> <ExcludeList Include="$(XunitTestBinBase)\JIT\Methodical\eh\basics\throwinfilter_r\throwinfilter_r.*" /> - <!-- Windows x64 unwinder gets consused by IP in the middle of instruction --> - <!-- https://github.com/dotnet/corert/issues/2535 --> - <ExcludeList Include="$(XunitTestBinBase)\JIT\Regression\CLR-x86-JIT\V1-M09.5-PDC\b30126\b30126\b30126.*" /> - <ExcludeList Include="$(XunitTestBinBase)\JIT\Regression\CLR-x86-JIT\V1-M09.5-PDC\b30128\b30128\b30128.*" /> - <!-- Arrays with non-zero lower bounds --> <!-- https://github.com/dotnet/corert/issues/2245 --> <ExcludeList Include="$(XunitTestBinBase)\JIT\Methodical\Arrays\huge\_il_dbghuge_b\_il_dbghuge_b.*" /> |