diff options
Diffstat (limited to 'deps/v8/src/codegen/arm/cpu-arm.cc')
| -rw-r--r-- | deps/v8/src/codegen/arm/cpu-arm.cc | 13 |
1 files changed, 0 insertions, 13 deletions
diff --git a/deps/v8/src/codegen/arm/cpu-arm.cc b/deps/v8/src/codegen/arm/cpu-arm.cc index 9113de705d2..47fe4bdb740 100644 --- a/deps/v8/src/codegen/arm/cpu-arm.cc +++ b/deps/v8/src/codegen/arm/cpu-arm.cc @@ -37,18 +37,6 @@ V8_NOINLINE void CpuFeatures::FlushICache(void* start, size_t size) { register uint32_t end asm("r1") = beg + size; register uint32_t flg asm("r2") = 0; -#ifdef __clang__ - // This variant of the asm avoids a constant pool entry, which can be - // problematic when LTO'ing. It is also slightly shorter. - register uint32_t scno asm("r7") = __ARM_NR_cacheflush; - - asm volatile("svc 0\n" - : - : "r"(beg), "r"(end), "r"(flg), "r"(scno) - : "memory"); -#else - // Use a different variant of the asm with GCC because some versions doesn't - // support r7 as an asm input. asm volatile( // This assembly works for both ARM and Thumb targets. @@ -66,7 +54,6 @@ V8_NOINLINE void CpuFeatures::FlushICache(void* start, size_t size) { : "r"(beg), "r"(end), "r"(flg), [scno] "i"(__ARM_NR_cacheflush) : "memory"); #endif -#endif #endif // !USE_SIMULATOR } |