ADD: cm3cpp_flash_otp.hpp

4 files changed, 150 insertions, 9 deletions

diff --git a/flash_cycle.hpp b/cm3cpp_flash_cycle.hpp
index 63dbf81..f86529f 100644
--- a/flash_cycle.hpp
+++ b/cm3cpp_flash_cycle.hpp
@@ -1,15 +1,14 @@
-#ifndef FLASH_CYCLE_H
-#define FLASH_CYCLE_H
+#ifndef CM3CPP_FLASH_CYCLE_H_
+#define CM3CPP_FLASH_CYCLE_H_
 
 #include <libopencm3/cm3/common.h>
-#include <libopencm3/stm32/f2/flash.h>
+#include <libopencm3/stm32/flash.h>
 #include <libopencmsis/core_cm3.h>
 
 namespace cm3cpp {
 
 namespace flash {
 
-
 enum FlashSector : uint32_t {
 	SECTOR_0 = 0x08000000,
 	SECTOR_1 = 0x08004000,
@@ -144,9 +143,8 @@ private:
 	}
 };
 
+}  /* namespace flash */
 
-}  // namespace flash
-
-}  // namespace cm3ext
+}  /* namespace cm3ext */
 
-#endif
+#endif /* CM3CPP_FLASH_CYCLE_H_ */
diff --git a/cm3cpp_flash_otp.hpp b/cm3cpp_flash_otp.hpp
new file mode 100644
index 0000000..8abc8c7
--- /dev/null
+++ b/cm3cpp_flash_otp.hpp
@@ -0,0 +1,132 @@
+#ifndef CM3CPP_FLASH_OTP_HPP_
+#define CM3CPP_FLASH_OTP_HPP_
+
+#include <libopencm3/stm32/flash.h>
+#include <libopencmsis/core_cm3.h>
+
+namespace cm3cpp {
+
+namespace flash {
+
+enum class OtpBlock : uint8_t
+{
+	BLOCK_0,
+	BLOCK_1,
+	BLOCK_2,
+	BLOCK_3,
+	BLOCK_4,
+	BLOCK_5,
+	BLOCK_6,
+	BLOCK_7,
+	BLOCK_8,
+	BLOCK_9,
+	BLOCK_10,
+	BLOCK_11,
+	BLOCK_12,
+	BLOCK_13,
+	BLOCK_14,
+	BLOCK_15,
+};
+
+enum class OtpByte
+{
+	BYTE_0,
+	BYTE_1,
+	BYTE_2,
+	BYTE_3,
+	BYTE_4,
+	BYTE_5,
+	BYTE_6,
+	BYTE_7,
+	BYTE_8,
+	BYTE_9,
+	BYTE_10,
+	BYTE_11,
+	BYTE_12,
+	BYTE_13,
+	BYTE_14,
+	BYTE_15,
+	BYTE_16,
+	BYTE_17,
+	BYTE_18,
+	BYTE_19,
+	BYTE_20,
+	BYTE_21,
+	BYTE_22,
+	BYTE_23,
+	BYTE_24,
+	BYTE_25,
+	BYTE_26,
+	BYTE_27,
+	BYTE_28,
+	BYTE_29,
+	BYTE_30,
+	BYTE_31,
+};
+
+enum class Flag
+{
+	BSY    = FLASH_SR_BSY,
+	PGSERR = FLASH_SR_PGSERR,
+	PGPERR = FLASH_SR_PGPERR,
+	PGAERR = FLASH_SR_PGAERR,
+	WRPERR = FLASH_SR_WRPERR,
+	OPERR  = FLASH_SR_OPERR,
+	EOP    = FLASH_SR_EOP,
+};
+
+class FlashOtp
+{
+public:
+	static void write(OtpBlock block, OtpByte byte, uint8_t data)
+	{
+		flash_unlock();
+		clear_flag(Flag::EOP);
+		clear_flag(Flag::OPERR);
+		clear_flag(Flag::WRPERR);
+		clear_flag(Flag::PGAERR);
+		clear_flag(Flag::PGPERR);
+		clear_flag(Flag::PGSERR);
+		flash_wait_for_last_operation();
+		uint32_t address = _OTP_START_ADDR + ((uint32_t)block * _OTP_BYTES_IN_BLOCK) + (uint32_t)byte;
+		__disable_irq();
+		flash_program_byte(address, data);
+		__enable_irq();
+		flash_lock();
+	}
+
+	static uint8_t read(OtpBlock block, OtpByte byte)
+	{
+		uint32_t address = _OTP_START_ADDR + ((uint32_t)block * _OTP_BYTES_IN_BLOCK) + (uint32_t)byte;
+		return *(uint8_t*)address;
+	}
+
+	static bool get_flag(Flag flag)
+	{
+		uint32_t status = FLASH_SR | (uint32_t)flag;
+		if (status > 0)
+			return true;
+		return false;
+	}
+
+	static void clear_flag(Flag flag)
+	{
+		if (flag == Flag::BSY)
+			return;
+
+		FLASH_SR |= (uint32_t)flag;
+	}
+private:
+
+static constexpr uint32_t _OTP_START_ADDR	   = (0x1FFF7800);
+static constexpr uint32_t _OTP_LOCK_ADDR	   = (0x1FFF7A00);
+static constexpr uint32_t _OTP_BLOCKS		   = 16;
+static constexpr uint32_t _OTP_BYTES_IN_BLOCK  = 32;
+static constexpr uint32_t _OTP_SIZE			   =(_OTP_BLOCKS * _OTP_BYTES_IN_BLOCK);
+};
+
+}  /* namespace flash */
+
+}  /* namespace cm3ext */
+
+#endif /* CM3CPP_FLASH_OTP_HPP_ */
diff --git a/cm3cpp_i2c.cpp b/cm3cpp_i2c.cpp
index b818254..32998f4 100644
--- a/cm3cpp_i2c.cpp
+++ b/cm3cpp_i2c.cpp
@@ -206,7 +206,6 @@ auto I2c::master_transfer(MasterTransferCfg cfg) -> Result
         index++;
     }
 
-    uint16_t temp;
     if(cfg.read_len != 0) {
     	_send_start();
     	while (_get_flag_status(MASTER_MODE_SELECTED) == Result::ERROR);
diff --git a/cm3cpp_timer.cpp b/cm3cpp_timer.cpp
index 97248ff..54c356c 100644
--- a/cm3cpp_timer.cpp
+++ b/cm3cpp_timer.cpp
@@ -510,6 +510,8 @@ auto Timer::set_capture_compare_1_mode(CcMode mode) -> Result
 			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
 			                     TIM_CCMR1_CC1S_IN_TRC;
 			break;
+
+		default: break;
 	}
 
 	return OK;
@@ -542,6 +544,8 @@ auto Timer::set_capture_compare_2_mode(CcMode mode) -> Result
 			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
 								 TIM_CCMR1_CC2S_IN_TRC;
 			break;
+
+		default: break;
 	}
 
 	return OK;
@@ -999,6 +1003,10 @@ auto Timer::set_capture_compare_3_mode(CcMode mode) -> Result
 			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
 			                     TIM_CCMR2_CC3S_IN_TRC;
 			break;
+
+		case INPUT_MAPPED_TI1:
+		case INPUT_MAPPED_TI2:
+			break;
 	}
 
 	return OK;
@@ -1031,6 +1039,10 @@ auto Timer::set_capture_compare_4_mode(CcMode mode) -> Result
 			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
 								 TIM_CCMR2_CC4S_IN_TRC;
 			break;
+
+		case INPUT_MAPPED_TI1:
+		case INPUT_MAPPED_TI2:
+			break;
 	}
 
 	return OK;