IMPR: Format everything

29 files changed, 4428 insertions, 4473 deletions

diff --git a/cm3cpp_adc.cpp b/cm3cpp_adc.cpp
index 85774d8..aaf06af 100644
--- a/cm3cpp_adc.cpp
+++ b/cm3cpp_adc.cpp
@@ -6,199 +6,201 @@ namespace adc {
 
 Adc::Adc(Number adc)
 {
-	switch(adc)
-	{
-		case ADC_1: _adc = ADC1; break;
-		case ADC_2: _adc = ADC2; break;
-		case ADC_3: _adc = ADC3; break;
-	}
+    switch (adc) {
+        case ADC_1:
+            _adc = ADC1;
+            break;
+        case ADC_2:
+            _adc = ADC2;
+            break;
+        case ADC_3:
+            _adc = ADC3;
+            break;
+    }
 }
 
 void Adc::set_resolution(Resolution res)
 {
-	ADC_CR1(_adc) &= ~ADC_CR1_RES_MASK;
-	ADC_CR1(_adc) |= (uint32_t)res;
+    ADC_CR1(_adc) &= ~ADC_CR1_RES_MASK;
+    ADC_CR1(_adc) |= (uint32_t)res;
 }
 
 void Adc::enable_scan_mode()
 {
-	ADC_CR1(_adc) |= ADC_CR1_SCAN_MASK;
+    ADC_CR1(_adc) |= ADC_CR1_SCAN_MASK;
 }
 
 void Adc::disable_scan_mode()
 {
-	ADC_CR1(_adc) &= ~ADC_CR1_SCAN_MASK;
+    ADC_CR1(_adc) &= ~ADC_CR1_SCAN_MASK;
 }
 
 void Adc::set_data_alignment(Alignment align)
 {
-	switch(align)
-	{
-	case RIGHT_ALIGN:
-		ADC_CR2(_adc) &= ~ADC_CR2_ALIGN_MASK;
-		break;
-	case LEFT_ALIGN:
-		ADC_CR2(_adc) |= ADC_CR2_ALIGN_MASK;
-		break;
-	}
+    switch (align) {
+        case RIGHT_ALIGN:
+            ADC_CR2(_adc) &= ~ADC_CR2_ALIGN_MASK;
+            break;
+        case LEFT_ALIGN:
+            ADC_CR2(_adc) |= ADC_CR2_ALIGN_MASK;
+            break;
+    }
 }
 
 void Adc::set_external_trigger_for_regular_group(RegularGroupTrigger trigger)
 {
-	ADC_CR2(_adc) &= ~ADC_CR2_EXTSEL_MASK;
-	ADC_CR2(_adc) |= (uint32_t)trigger;
+    ADC_CR2(_adc) &= ~ADC_CR2_EXTSEL_MASK;
+    ADC_CR2(_adc) |= (uint32_t)trigger;
 }
 
-void Adc::set_external_trigger_polarity_for_regular_group(RegularGroupTriggerPolarity polarity)
+void Adc::set_external_trigger_polarity_for_regular_group(
+  RegularGroupTriggerPolarity polarity)
 {
-	ADC_CR2(_adc) &= ~ADC_CR2_EXTEN_MASK;
-	ADC_CR2(_adc) |= (uint32_t)polarity;
+    ADC_CR2(_adc) &= ~ADC_CR2_EXTEN_MASK;
+    ADC_CR2(_adc) |= (uint32_t)polarity;
 }
 
 void Adc::set_conversion_mode(ConversionMode mode)
 {
-	switch(mode)
-	{
-	case CONTINUOUS_CONV:
-		ADC_CR2(_adc) |=ADC_CR2_CONT_MASK;
-		break;
-	case SINGLE_CONV:
-		ADC_CR2(_adc) &= ~ADC_CR2_CONT_MASK;
-		break;
-	}
+    switch (mode) {
+        case CONTINUOUS_CONV:
+            ADC_CR2(_adc) |= ADC_CR2_CONT_MASK;
+            break;
+        case SINGLE_CONV:
+            ADC_CR2(_adc) &= ~ADC_CR2_CONT_MASK;
+            break;
+    }
 }
 
 void Adc::enable_dma_request()
 {
-	ADC_CR2(_adc) |= ADC_CR2_DDS_MASK;
+    ADC_CR2(_adc) |= ADC_CR2_DDS_MASK;
 }
 
 void Adc::disable_dma_request()
 {
-	ADC_CR2(_adc) &= ~ADC_CR2_DDS_MASK;
+    ADC_CR2(_adc) &= ~ADC_CR2_DDS_MASK;
 }
 
 void Adc::enable_dma()
 {
-	ADC_CR2(_adc) |= ADC_CR2_DMA_MASK;
+    ADC_CR2(_adc) |= ADC_CR2_DMA_MASK;
 }
 
 void Adc::disable_dma()
 {
-	ADC_CR2(_adc) &= ~ADC_CR2_DMA_MASK;
+    ADC_CR2(_adc) &= ~ADC_CR2_DMA_MASK;
 }
 
 void Adc::enable()
 {
-	ADC_CR2(_adc) |= ADC_CR2_ADON_MASK;
+    ADC_CR2(_adc) |= ADC_CR2_ADON_MASK;
 }
 
 void Adc::disable()
 {
-	ADC_CR2(_adc) &= ~ADC_CR2_ADON_MASK;
+    ADC_CR2(_adc) &= ~ADC_CR2_ADON_MASK;
 }
 
 void Adc::start_conversion()
 {
-	ADC_CR2(_adc) |= ADC_CR2_SWSTART_MASK;
+    ADC_CR2(_adc) |= ADC_CR2_SWSTART_MASK;
 }
 
 void Adc::set_number_of_conversions(uint8_t number)
 {
-	ADC_SQR1(_adc) &= ~ADC_SQR1_L_MASK;
-	ADC_SQR1(_adc) |= (uint32_t)((number - 1) & 0x0F);
-}
-
-void Adc::set_channel_sampling_time_selection(SamplingTime time, Channel channel)
-{
-	uint32_t offset;
-
-	if (channel < ADC_CHANNEL10)
-	{
-		offset = ((uint8_t)channel * ADC_SMP_MASK);
-		ADC_SMPR2(_adc) &= ~(ADC_SMP_MASK << offset);
-		ADC_SMPR2(_adc) |= ((uint8_t)time << offset);
-	}
-
-	else
-	{
-		offset = (((uint8_t)channel - ADC_CHANNEL10) * ADC_SMP_MASK);
-		ADC_SMPR1(_adc) &= ~(ADC_SMP_MASK << offset);
-		ADC_SMPR1(_adc) |= ((uint8_t)time << offset);
-	}
-}
-
-void Adc::set_conversion_number_in_sequence(uint8_t length, Channel *channel)
-{
-	uint32_t fifth6 = 0;
-	uint32_t fourth6 = 0;
-	uint32_t third6 = 0;
-	uint32_t second6 = 0;
-	uint32_t first6 = 0;
-	uint8_t i = 0;
-
-	if (length > 16) {
-		return;
-	}
-
-	for (i = 1; i <= length; i++) {
-		if (i <= 6) {
-			first6 |= (channel[i - 1] << ((i - 1) * 5));
-		}
-		if ((i > 6) & (i <= 12)) {
-			second6 |= (channel[i - 1] << ((i - 6 - 1) * 5));
-		}
-		if ((i > 12) & (i <= 18)) {
-			third6 |= (channel[i - 1] << ((i - 12 - 1) * 5));
-		}
-		if ((i > 18) & (i <= 24)) {
-			fourth6 |= (channel[i - 1] << ((i - 18 - 1) * 5));
-		}
-		if ((i > 24) & (i <= 28)) {
-			fifth6 |= (channel[i - 1] << ((i - 24 - 1) * 5));
-		}
-	}
-
-	ADC_SQR1(_adc) = third6 | ((length - 1) << 20);
-	ADC_SQR2(_adc) = second6;
-	ADC_SQR3(_adc) = first6;
+    ADC_SQR1(_adc) &= ~ADC_SQR1_L_MASK;
+    ADC_SQR1(_adc) |= (uint32_t)((number - 1) & 0x0F);
+}
+
+void Adc::set_channel_sampling_time_selection(SamplingTime time,
+                                              Channel channel)
+{
+    uint32_t offset;
+
+    if (channel < ADC_CHANNEL10) {
+        offset = ((uint8_t)channel * ADC_SMP_MASK);
+        ADC_SMPR2(_adc) &= ~(ADC_SMP_MASK << offset);
+        ADC_SMPR2(_adc) |= ((uint8_t)time << offset);
+    }
+
+    else {
+        offset = (((uint8_t)channel - ADC_CHANNEL10) * ADC_SMP_MASK);
+        ADC_SMPR1(_adc) &= ~(ADC_SMP_MASK << offset);
+        ADC_SMPR1(_adc) |= ((uint8_t)time << offset);
+    }
+}
+
+void Adc::set_conversion_number_in_sequence(uint8_t length, Channel* channel)
+{
+    uint32_t fifth6 = 0;
+    uint32_t fourth6 = 0;
+    uint32_t third6 = 0;
+    uint32_t second6 = 0;
+    uint32_t first6 = 0;
+    uint8_t i = 0;
+
+    if (length > 16) {
+        return;
+    }
+
+    for (i = 1; i <= length; i++) {
+        if (i <= 6) {
+            first6 |= (channel[i - 1] << ((i - 1) * 5));
+        }
+        if ((i > 6) & (i <= 12)) {
+            second6 |= (channel[i - 1] << ((i - 6 - 1) * 5));
+        }
+        if ((i > 12) & (i <= 18)) {
+            third6 |= (channel[i - 1] << ((i - 12 - 1) * 5));
+        }
+        if ((i > 18) & (i <= 24)) {
+            fourth6 |= (channel[i - 1] << ((i - 18 - 1) * 5));
+        }
+        if ((i > 24) & (i <= 28)) {
+            fifth6 |= (channel[i - 1] << ((i - 24 - 1) * 5));
+        }
+    }
+
+    ADC_SQR1(_adc) = third6 | ((length - 1) << 20);
+    ADC_SQR2(_adc) = second6;
+    ADC_SQR3(_adc) = first6;
 }
 
 void Adc::set_prescaler(Prescaler prescaler)
 {
-	ADC_CCR &= ~ADC_CCR_ADCPRE_MASK;
-	ADC_CCR |= (uint32_t)prescaler;
+    ADC_CCR &= ~ADC_CCR_ADCPRE_MASK;
+    ADC_CCR |= (uint32_t)prescaler;
 }
 
 void Adc::set_dma_mode(DmaMode mode)
 {
-	ADC_CCR &= ~ADC_CCR_DMA_MASK;
-	ADC_CCR |= (uint32_t)mode;
+    ADC_CCR &= ~ADC_CCR_DMA_MASK;
+    ADC_CCR |= (uint32_t)mode;
 }
 
 void Adc::set_delay_between_two_samples(Delay delay)
 {
-	ADC_CCR &= ~ADC_CCR_DELAY_MASK;
-	ADC_CCR |= (uint32_t)delay;
+    ADC_CCR &= ~ADC_CCR_DELAY_MASK;
+    ADC_CCR |= (uint32_t)delay;
 }
 
 void Adc::set_multi_mode(MultiMode mode)
 {
-	ADC_CCR &= ~ADC_CCR_MULTI_MASK;
-	ADC_CCR |= (uint32_t)mode;
+    ADC_CCR &= ~ADC_CCR_MULTI_MASK;
+    ADC_CCR |= (uint32_t)mode;
 }
 
 void Adc::enable_temp_sensor()
 {
-	ADC_CCR |= ADC_CCR_TSVREFE_MASK;
+    ADC_CCR |= ADC_CCR_TSVREFE_MASK;
 }
 
 void Adc::disable_temp_sensor()
 {
-	ADC_CCR &= ~ADC_CCR_TSVREFE_MASK;
+    ADC_CCR &= ~ADC_CCR_TSVREFE_MASK;
 }
 
-
 }  // namespace adc
 
 }  // namespace cm3cpp
diff --git a/cm3cpp_adc.h b/cm3cpp_adc.h
index 596ff67..416a82e 100644
--- a/cm3cpp_adc.h
+++ b/cm3cpp_adc.h
@@ -1,121 +1,121 @@
 #ifndef CM3CPP_ADC_H_
 #define CM3CPP_ADC_H_
 
-#include <stdint.h>
 #include <libopencm3/cm3/common.h>
 #include <libopencm3/stm32/memorymap.h>
+#include <stdint.h>
 
-#define ADC1			               (PERIPH_BASE_APB2 + 0x2000)
-#define ADC2			               (PERIPH_BASE_APB2 + 0x2100)
-#define ADC3			               (PERIPH_BASE_APB2 + 0x2200)
-#define ADC0                           (PERIPH_BASE_APB2 + 0x2300)
+#define ADC1 (PERIPH_BASE_APB2 + 0x2000)
+#define ADC2 (PERIPH_BASE_APB2 + 0x2100)
+#define ADC3 (PERIPH_BASE_APB2 + 0x2200)
+#define ADC0 (PERIPH_BASE_APB2 + 0x2300)
 
 /* --- ADC registers ------------------------------------------------------- */
-#define ADC_SR(block)                   MMIO32((block) + 0x00)
-#define ADC_CR1(block)                  MMIO32((block) + 0x04)
-#define ADC_CR2(block)                  MMIO32((block) + 0x08)
-#define ADC_SMPR1(block)                MMIO32((block) + 0x0c)
-#define ADC_SMPR2(block)                MMIO32((block) + 0x10)
-#define ADC_JOFR1(block)				MMIO32((block) + 0x14)
-#define ADC_JOFR2(block)				MMIO32((block) + 0x18)
-#define ADC_JOFR3(block)				MMIO32((block) + 0x1c)
-#define ADC_JOFR4(block)				MMIO32((block) + 0x20)
-#define ADC_HTR(block)					MMIO32((block) + 0x24)
-#define ADC_LTR(block)					MMIO32((block) + 0x28)
-#define ADC_SQR1(block)					MMIO32((block) + 0x2c)
-#define ADC_SQR2(block)					MMIO32((block) + 0x30)
-#define ADC_SQR3(block)					MMIO32((block) + 0x34)
-#define ADC_JSQR(block)					MMIO32((block) + 0x38)
-#define ADC_JDR1(block)					MMIO32((block) + 0x3c)
-#define ADC_JDR2(block)					MMIO32((block) + 0x40)
-#define ADC_JDR3(block)					MMIO32((block) + 0x44)
-#define ADC_JDR4(block)					MMIO32((block) + 0x48)
-#define ADC_DR(block)					MMIO32((block) + 0x4c)
-#define ADC_CSR							MMIO32(ADC0 + 0x0)
-#define ADC_CCR							MMIO32(ADC0 + 0x4)
-#define ADC_CDR							MMIO32(ADC0 + 0x8)
-
-#define ADC1_SR                         ADC_SR(ADC1)
-#define ADC1_CR1                        ADC_CR1(ADC1)
-#define ADC1_CR2                        ADC_CR2(ADC1)
-#define ADC1_SMPR1                      ADC_SMPR1(ADC1)
-#define ADC1_SMPR2                      ADC_SMPR2(ADC1)
-#define ADC1_JOFR1                      ADC_JOFR1(ADC1)
-#define ADC1_JOFR2                      ADC_JOFR2(ADC1)
-#define ADC1_JOFR3                      ADC_JOFR3(ADC1)
-#define ADC1_JOFR4                      ADC_JOFR4(ADC1)
-#define ADC1_HTR                        ADC_HTR(ADC1)
-#define ADC1_LTR                        ADC_LTR(ADC1)
-#define ADC1_SQR1                       ADC_SQR1(ADC1)
-#define ADC1_SQR2                       ADC_SQR2(ADC1)
-#define ADC1_SQR3                       ADC_SQR3(ADC1)
-#define ADC1_JSQR                       ADC_JSQR(ADC1)
-#define ADC1_JDR1                       ADC_JDR1(ADC1)
-#define ADC1_JDR2                       ADC_JDR2(ADC1)
-#define ADC1_JDR3                       ADC_JDR3(ADC1)
-#define ADC1_JDR4                       ADC_JDR4(ADC1)
-#define ADC1_DR                         ADC_DR(ADC1)
-
-#define ADC2_SR                         ADC_SR(ADC2)
-#define ADC2_CR1                        ADC_CR1(ADC2)
-#define ADC2_CR2                        ADC_CR2(ADC2)
-#define ADC2_SMPR1                      ADC_SMPR1(ADC2)
-#define ADC2_SMPR2                      ADC_SMPR2(ADC2)
-#define ADC2_JOFR1                      ADC_JOFR1(ADC2)
-#define ADC2_JOFR2                      ADC_JOFR2(ADC2)
-#define ADC2_JOFR3                      ADC_JOFR3(ADC2)
-#define ADC2_JOFR4                      ADC_JOFR4(ADC2)
-#define ADC2_HTR                        ADC_HTR(ADC2)
-#define ADC2_LTR                        ADC_LTR(ADC2)
-#define ADC2_SQR1                       ADC_SQR1(ADC2)
-#define ADC2_SQR2                       ADC_SQR2(ADC2)
-#define ADC2_SQR3                       ADC_SQR3(ADC2)
-#define ADC2_JSQR                       ADC_JSQR(ADC2)
-#define ADC2_JDR1                       ADC_JDR1(ADC2)
-#define ADC2_JDR2                       ADC_JDR2(ADC2)
-#define ADC2_JDR3                       ADC_JDR3(ADC2)
-#define ADC2_JDR4                       ADC_JDR4(ADC2)
-#define ADC2_DR                         ADC_DR(ADC2)
-
-#define ADC3_SR                         ADC_SR(ADC3)
-#define ADC3_CR1                        ADC_CR1(ADC3)
-#define ADC3_CR2                        ADC_CR2(ADC3)
-#define ADC3_SMPR1                      ADC_SMPR1(ADC3)
-#define ADC3_SMPR2                      ADC_SMPR2(ADC3)
-#define ADC3_JOFR1                      ADC_JOFR1(ADC3)
-#define ADC3_JOFR2                      ADC_JOFR2(ADC3)
-#define ADC3_JOFR3                      ADC_JOFR3(ADC3)
-#define ADC3_JOFR4                      ADC_JOFR4(ADC3)
-#define ADC3_HTR                        ADC_HTR(ADC3)
-#define ADC3_LTR                        ADC_LTR(ADC3)
-#define ADC3_SQR1                       ADC_SQR1(ADC3)
-#define ADC3_SQR2                       ADC_SQR2(ADC3)
-#define ADC3_SQR3                       ADC_SQR3(ADC3)
-#define ADC3_JSQR                       ADC_JSQR(ADC3)
-#define ADC3_JDR1                       ADC_JDR1(ADC3)
-#define ADC3_JDR2                       ADC_JDR2(ADC3)
-#define ADC3_JDR3                       ADC_JDR3(ADC3)
-#define ADC3_JDR4                       ADC_JDR4(ADC3)
-#define ADC3_DR                         ADC_DR(ADC3)
-
-#define ADC_CR1_RES_MASK                (uint32_t)(0x3 << 24)
-#define ADC_CR1_SCAN_MASK               (uint32_t)(0x1 << 8)
-#define ADC_CR2_ALIGN_MASK              (uint32_t)(0x1 << 11)
-#define ADC_CR2_EXTSEL_MASK             (uint32_t)(0xF << 24)
-#define ADC_CR2_EXTEN_MASK              (uint32_t)(0x3 << 28)
-#define ADC_CR2_CONT_MASK               (uint32_t)(0x1 << 1)
-#define ADC_CR2_DDS_MASK                (uint32_t)(0x1 << 9)
-#define ADC_CR2_DMA_MASK                (uint32_t)(0x1 << 8)
-#define ADC_CR2_ADON_MASK               (uint32_t)(0x1)
-#define ADC_CR2_SWSTART_MASK            (uint32_t)(0x1 << 30)
-#define ADC_SQR1_L_MASK                 (uint32_t)(0xF << 20)
-#define ADC_SMP_MASK                    (uint32_t)(0x3)
-#define ADC_SQR_MASK                    (uint32_t)(0x1F)
-#define ADC_CCR_ADCPRE_MASK             (uint32_t)(0x3 << 16)
-#define ADC_CCR_DMA_MASK                (uint32_t)(0x3 << 14)
-#define ADC_CCR_DELAY_MASK              (uint32_t)(0xF << 8)
-#define ADC_CCR_MULTI_MASK              (uint32_t)(0x1F)
-#define ADC_CCR_TSVREFE_MASK            (uint32_t)(0x1 << 23)
+#define ADC_SR(block) MMIO32((block) + 0x00)
+#define ADC_CR1(block) MMIO32((block) + 0x04)
+#define ADC_CR2(block) MMIO32((block) + 0x08)
+#define ADC_SMPR1(block) MMIO32((block) + 0x0c)
+#define ADC_SMPR2(block) MMIO32((block) + 0x10)
+#define ADC_JOFR1(block) MMIO32((block) + 0x14)
+#define ADC_JOFR2(block) MMIO32((block) + 0x18)
+#define ADC_JOFR3(block) MMIO32((block) + 0x1c)
+#define ADC_JOFR4(block) MMIO32((block) + 0x20)
+#define ADC_HTR(block) MMIO32((block) + 0x24)
+#define ADC_LTR(block) MMIO32((block) + 0x28)
+#define ADC_SQR1(block) MMIO32((block) + 0x2c)
+#define ADC_SQR2(block) MMIO32((block) + 0x30)
+#define ADC_SQR3(block) MMIO32((block) + 0x34)
+#define ADC_JSQR(block) MMIO32((block) + 0x38)
+#define ADC_JDR1(block) MMIO32((block) + 0x3c)
+#define ADC_JDR2(block) MMIO32((block) + 0x40)
+#define ADC_JDR3(block) MMIO32((block) + 0x44)
+#define ADC_JDR4(block) MMIO32((block) + 0x48)
+#define ADC_DR(block) MMIO32((block) + 0x4c)
+#define ADC_CSR MMIO32(ADC0 + 0x0)
+#define ADC_CCR MMIO32(ADC0 + 0x4)
+#define ADC_CDR MMIO32(ADC0 + 0x8)
+
+#define ADC1_SR ADC_SR(ADC1)
+#define ADC1_CR1 ADC_CR1(ADC1)
+#define ADC1_CR2 ADC_CR2(ADC1)
+#define ADC1_SMPR1 ADC_SMPR1(ADC1)
+#define ADC1_SMPR2 ADC_SMPR2(ADC1)
+#define ADC1_JOFR1 ADC_JOFR1(ADC1)
+#define ADC1_JOFR2 ADC_JOFR2(ADC1)
+#define ADC1_JOFR3 ADC_JOFR3(ADC1)
+#define ADC1_JOFR4 ADC_JOFR4(ADC1)
+#define ADC1_HTR ADC_HTR(ADC1)
+#define ADC1_LTR ADC_LTR(ADC1)
+#define ADC1_SQR1 ADC_SQR1(ADC1)
+#define ADC1_SQR2 ADC_SQR2(ADC1)
+#define ADC1_SQR3 ADC_SQR3(ADC1)
+#define ADC1_JSQR ADC_JSQR(ADC1)
+#define ADC1_JDR1 ADC_JDR1(ADC1)
+#define ADC1_JDR2 ADC_JDR2(ADC1)
+#define ADC1_JDR3 ADC_JDR3(ADC1)
+#define ADC1_JDR4 ADC_JDR4(ADC1)
+#define ADC1_DR ADC_DR(ADC1)
+
+#define ADC2_SR ADC_SR(ADC2)
+#define ADC2_CR1 ADC_CR1(ADC2)
+#define ADC2_CR2 ADC_CR2(ADC2)
+#define ADC2_SMPR1 ADC_SMPR1(ADC2)
+#define ADC2_SMPR2 ADC_SMPR2(ADC2)
+#define ADC2_JOFR1 ADC_JOFR1(ADC2)
+#define ADC2_JOFR2 ADC_JOFR2(ADC2)
+#define ADC2_JOFR3 ADC_JOFR3(ADC2)
+#define ADC2_JOFR4 ADC_JOFR4(ADC2)
+#define ADC2_HTR ADC_HTR(ADC2)
+#define ADC2_LTR ADC_LTR(ADC2)
+#define ADC2_SQR1 ADC_SQR1(ADC2)
+#define ADC2_SQR2 ADC_SQR2(ADC2)
+#define ADC2_SQR3 ADC_SQR3(ADC2)
+#define ADC2_JSQR ADC_JSQR(ADC2)
+#define ADC2_JDR1 ADC_JDR1(ADC2)
+#define ADC2_JDR2 ADC_JDR2(ADC2)
+#define ADC2_JDR3 ADC_JDR3(ADC2)
+#define ADC2_JDR4 ADC_JDR4(ADC2)
+#define ADC2_DR ADC_DR(ADC2)
+
+#define ADC3_SR ADC_SR(ADC3)
+#define ADC3_CR1 ADC_CR1(ADC3)
+#define ADC3_CR2 ADC_CR2(ADC3)
+#define ADC3_SMPR1 ADC_SMPR1(ADC3)
+#define ADC3_SMPR2 ADC_SMPR2(ADC3)
+#define ADC3_JOFR1 ADC_JOFR1(ADC3)
+#define ADC3_JOFR2 ADC_JOFR2(ADC3)
+#define ADC3_JOFR3 ADC_JOFR3(ADC3)
+#define ADC3_JOFR4 ADC_JOFR4(ADC3)
+#define ADC3_HTR ADC_HTR(ADC3)
+#define ADC3_LTR ADC_LTR(ADC3)
+#define ADC3_SQR1 ADC_SQR1(ADC3)
+#define ADC3_SQR2 ADC_SQR2(ADC3)
+#define ADC3_SQR3 ADC_SQR3(ADC3)
+#define ADC3_JSQR ADC_JSQR(ADC3)
+#define ADC3_JDR1 ADC_JDR1(ADC3)
+#define ADC3_JDR2 ADC_JDR2(ADC3)
+#define ADC3_JDR3 ADC_JDR3(ADC3)
+#define ADC3_JDR4 ADC_JDR4(ADC3)
+#define ADC3_DR ADC_DR(ADC3)
+
+#define ADC_CR1_RES_MASK (uint32_t)(0x3 << 24)
+#define ADC_CR1_SCAN_MASK (uint32_t)(0x1 << 8)
+#define ADC_CR2_ALIGN_MASK (uint32_t)(0x1 << 11)
+#define ADC_CR2_EXTSEL_MASK (uint32_t)(0xF << 24)
+#define ADC_CR2_EXTEN_MASK (uint32_t)(0x3 << 28)
+#define ADC_CR2_CONT_MASK (uint32_t)(0x1 << 1)
+#define ADC_CR2_DDS_MASK (uint32_t)(0x1 << 9)
+#define ADC_CR2_DMA_MASK (uint32_t)(0x1 << 8)
+#define ADC_CR2_ADON_MASK (uint32_t)(0x1)
+#define ADC_CR2_SWSTART_MASK (uint32_t)(0x1 << 30)
+#define ADC_SQR1_L_MASK (uint32_t)(0xF << 20)
+#define ADC_SMP_MASK (uint32_t)(0x3)
+#define ADC_SQR_MASK (uint32_t)(0x1F)
+#define ADC_CCR_ADCPRE_MASK (uint32_t)(0x3 << 16)
+#define ADC_CCR_DMA_MASK (uint32_t)(0x3 << 14)
+#define ADC_CCR_DELAY_MASK (uint32_t)(0xF << 8)
+#define ADC_CCR_MULTI_MASK (uint32_t)(0x1F)
+#define ADC_CCR_TSVREFE_MASK (uint32_t)(0x1 << 23)
 
 namespace cm3cpp {
 
@@ -123,201 +123,200 @@ namespace adc {
 
 class Adc
 {
-public:
-	enum Number
-	{
-		ADC_1,
-		ADC_2,
-		ADC_3,
-	};
-
-	enum Resolution
-	{
-		RES_12_BIT = (uint32_t)(0 << 24),
-		RES_10_BIT = (uint32_t)(1 << 24),
-		RES_08_BIT = (uint32_t)(2 << 24),
-		RES_06_BIT = (uint32_t)(3 << 24),
-	};
-
-	enum Alignment
-	{
-		RIGHT_ALIGN,
-		LEFT_ALIGN,
-	};
-
-	enum RegularGroupTrigger
-	{
-		T1_CC1 = (uint32_t)(0 << 24),
-		T1_CC2 = (uint32_t)(1 << 24),
-		T1_CC3 = (uint32_t)(2 << 24),
-		T2_CC2 = (uint32_t)(3 << 24),
-		T2_CC3 = (uint32_t)(4 << 24),
-		T2_CC4 = (uint32_t)(5 << 24),
-		T2_TRGO = (uint32_t)(6 << 24),
-		T3_CC1 = (uint32_t)(7 << 24),
-		T3_TRGO = (uint32_t)(8 << 24),
-		T4_CC4 = (uint32_t)(9 << 24),
-		T5_CC1 = (uint32_t)(10 << 24),
-		T5_CC2 = (uint32_t)(11 << 24),
-		T5_CC3 = (uint32_t)(12 << 24),
-		T8_CC1 = (uint32_t)(13 << 24),
-		T8_TRGO = (uint32_t)(14 << 24),
-		EXTI_LINE_11 = (uint32_t)(15 << 24),
-	};
-
-	enum RegularGroupTriggerPolarity
-	{
-		TRIGGER_NONE       = (uint32_t)(0 << 28),
-		TRIGGER_ON_RISING  = (uint32_t)(1 << 28),
-		TRIGGER_ON_FALLING = (uint32_t)(2 << 28),
-		TRIGGER_ON_BOTH    = (uint32_t)(3 << 28),
-	};
-
-	enum ConversionMode
-	{
-		CONTINUOUS_CONV,
-		SINGLE_CONV,
-	};
-
-	enum MultiMode
-	{
-		MODE_INDEPENDENT = 0,
-	};
-
-	enum SamplingTime
-	{
-		CYCLES_3   = 0,
-		CYCLES_15  = 1,
-		CYCLES_28  = 2,
-		CYCLES_56  = 3,
-		CYCLES_84  = 4,
-		CYCLES_112 = 5,
-		CYCLES_144 = 6,
-		CYCLES_480 = 7,
-	};
-
-	enum Channel
-	{
-		ADC_CHANNEL0	= 0x00,
-		ADC_CHANNEL1	= 0x01,
-		ADC_CHANNEL2	= 0x02,
-		ADC_CHANNEL3	= 0x03,
-		ADC_CHANNEL4	= 0x04,
-		ADC_CHANNEL5	= 0x05,
-		ADC_CHANNEL6	= 0x06,
-		ADC_CHANNEL7	= 0x07,
-		ADC_CHANNEL8	= 0x08,
-		ADC_CHANNEL9    = 0x09,
-		ADC_CHANNEL10   = 0x0A,
-		ADC_CHANNEL11   = 0x0B,
-		ADC_CHANNEL12   = 0x0C,
-		ADC_CHANNEL13   = 0x0D,
-		ADC_CHANNEL14   = 0x0E,
-		ADC_CHANNEL15   = 0x0F,
-		ADC_CHANNEL16   = 0x10,
-		ADC_CHANNEL17   = 0x11,
-		ADC_CHANNEL18   = 0x12,
-	};
-
-	enum Rank
-	{
-		RANK_1 = 1,
-		RANK_2 = 2,
-		RANK_3 = 3,
-		RANK_4 = 4,
-		RANK_5 = 5,
-		RANK_6 = 6,
-		RANK_7 = 7,
-		RANK_8 = 8,
-		RANK_9 = 9,
-		RANK_10 = 10,
-		RANK_11 = 11,
-		RANK_12 = 12,
-		RANK_13 = 13,
-		RANK_14 = 14,
-		RANK_15 = 15,
-		RANK_16 = 16,
-	};
-
-	enum Prescaler
-	{
-		PRESCALER_2 = (uint32_t)(0 << 16),
-		PRESCALER_4 = (uint32_t)(1 << 16),
-		PRESCALER_6 = (uint32_t)(2 << 16),
-		PRESCALER_8 = (uint32_t)(3 << 16),
-	};
-
-	enum DmaMode
-	{
-		MODE_NONE = (uint32_t)(0 << 14),
-		MODE_1    = (uint32_t)(1 << 14),
-		MODE_2    = (uint32_t)(2 << 14),
-		MODE_3    = (uint32_t)(3 << 14),
-	};
-
-	enum Delay
-	{
-		DELAY_CYCLES_5  = (uint32_t)(0 << 8),
-		DELAY_CYCLES_6  = (uint32_t)(1 << 8),
-		DELAY_CYCLES_7  = (uint32_t)(2 << 8),
-		DELAY_CYCLES_8  = (uint32_t)(3 << 8),
-		DELAY_CYCLES_9  = (uint32_t)(4 << 8),
-		DELAY_CYCLES_10 = (uint32_t)(5 << 8),
-		DELAY_CYCLES_11 = (uint32_t)(6 << 8),
-		DELAY_CYCLES_12 = (uint32_t)(7 << 8),
-		DELAY_CYCLES_13 = (uint32_t)(8 << 8),
-		DELAY_CYCLES_14 = (uint32_t)(9 << 8),
-		DELAY_CYCLES_15 = (uint32_t)(10 << 8),
-		DELAY_CYCLES_16 = (uint32_t)(11 << 8),
-		DELAY_CYCLES_17 = (uint32_t)(12 << 8),
-		DELAY_CYCLES_18 = (uint32_t)(13 << 8),
-		DELAY_CYCLES_19 = (uint32_t)(14 << 8),
-		DELAY_CYCLES_20 = (uint32_t)(15 << 8),
-	};
-
-	Adc(Number adc);
-
-	void set_resolution(Resolution res);
-
-	void enable_scan_mode();
-	void disable_scan_mode();
-
-	void set_data_alignment(Alignment align);
-	void set_external_trigger_for_regular_group(RegularGroupTrigger trigger);
-	void set_external_trigger_polarity_for_regular_group(RegularGroupTriggerPolarity polarity);
-	void set_conversion_mode(ConversionMode mode);
-
-	void enable_dma_request();
-	void disable_dma_request();
-
-	void enable_dma();
-	void disable_dma();
-
-	void enable();
-	void disable();
-
-	void start_conversion();
-
-	void set_number_of_conversions(uint8_t number);
-	void set_channel_sampling_time_selection(SamplingTime time, Channel channel);
-	void set_conversion_number_in_sequence(uint8_t length, Channel *channel);
-	void set_prescaler(Prescaler prescaler);
-	void set_dma_mode(DmaMode mode);
-	void set_delay_between_two_samples(Delay delay);
-	void set_multi_mode(MultiMode mode);
-
-	void enable_temp_sensor();
-	void disable_temp_sensor();
-
-	uint32_t get_base_address() {
-		return (_adc);
-	}
-
-private:
-	uint32_t _adc;
+ public:
+    enum Number
+    {
+        ADC_1,
+        ADC_2,
+        ADC_3,
+    };
+
+    enum Resolution
+    {
+        RES_12_BIT = (uint32_t)(0 << 24),
+        RES_10_BIT = (uint32_t)(1 << 24),
+        RES_08_BIT = (uint32_t)(2 << 24),
+        RES_06_BIT = (uint32_t)(3 << 24),
+    };
+
+    enum Alignment
+    {
+        RIGHT_ALIGN,
+        LEFT_ALIGN,
+    };
+
+    enum RegularGroupTrigger
+    {
+        T1_CC1 = (uint32_t)(0 << 24),
+        T1_CC2 = (uint32_t)(1 << 24),
+        T1_CC3 = (uint32_t)(2 << 24),
+        T2_CC2 = (uint32_t)(3 << 24),
+        T2_CC3 = (uint32_t)(4 << 24),
+        T2_CC4 = (uint32_t)(5 << 24),
+        T2_TRGO = (uint32_t)(6 << 24),
+        T3_CC1 = (uint32_t)(7 << 24),
+        T3_TRGO = (uint32_t)(8 << 24),
+        T4_CC4 = (uint32_t)(9 << 24),
+        T5_CC1 = (uint32_t)(10 << 24),
+        T5_CC2 = (uint32_t)(11 << 24),
+        T5_CC3 = (uint32_t)(12 << 24),
+        T8_CC1 = (uint32_t)(13 << 24),
+        T8_TRGO = (uint32_t)(14 << 24),
+        EXTI_LINE_11 = (uint32_t)(15 << 24),
+    };
+
+    enum RegularGroupTriggerPolarity
+    {
+        TRIGGER_NONE = (uint32_t)(0 << 28),
+        TRIGGER_ON_RISING = (uint32_t)(1 << 28),
+        TRIGGER_ON_FALLING = (uint32_t)(2 << 28),
+        TRIGGER_ON_BOTH = (uint32_t)(3 << 28),
+    };
+
+    enum ConversionMode
+    {
+        CONTINUOUS_CONV,
+        SINGLE_CONV,
+    };
+
+    enum MultiMode
+    {
+        MODE_INDEPENDENT = 0,
+    };
+
+    enum SamplingTime
+    {
+        CYCLES_3 = 0,
+        CYCLES_15 = 1,
+        CYCLES_28 = 2,
+        CYCLES_56 = 3,
+        CYCLES_84 = 4,
+        CYCLES_112 = 5,
+        CYCLES_144 = 6,
+        CYCLES_480 = 7,
+    };
+
+    enum Channel
+    {
+        ADC_CHANNEL0 = 0x00,
+        ADC_CHANNEL1 = 0x01,
+        ADC_CHANNEL2 = 0x02,
+        ADC_CHANNEL3 = 0x03,
+        ADC_CHANNEL4 = 0x04,
+        ADC_CHANNEL5 = 0x05,
+        ADC_CHANNEL6 = 0x06,
+        ADC_CHANNEL7 = 0x07,
+        ADC_CHANNEL8 = 0x08,
+        ADC_CHANNEL9 = 0x09,
+        ADC_CHANNEL10 = 0x0A,
+        ADC_CHANNEL11 = 0x0B,
+        ADC_CHANNEL12 = 0x0C,
+        ADC_CHANNEL13 = 0x0D,
+        ADC_CHANNEL14 = 0x0E,
+        ADC_CHANNEL15 = 0x0F,
+        ADC_CHANNEL16 = 0x10,
+        ADC_CHANNEL17 = 0x11,
+        ADC_CHANNEL18 = 0x12,
+    };
+
+    enum Rank
+    {
+        RANK_1 = 1,
+        RANK_2 = 2,
+        RANK_3 = 3,
+        RANK_4 = 4,
+        RANK_5 = 5,
+        RANK_6 = 6,
+        RANK_7 = 7,
+        RANK_8 = 8,
+        RANK_9 = 9,
+        RANK_10 = 10,
+        RANK_11 = 11,
+        RANK_12 = 12,
+        RANK_13 = 13,
+        RANK_14 = 14,
+        RANK_15 = 15,
+        RANK_16 = 16,
+    };
+
+    enum Prescaler
+    {
+        PRESCALER_2 = (uint32_t)(0 << 16),
+        PRESCALER_4 = (uint32_t)(1 << 16),
+        PRESCALER_6 = (uint32_t)(2 << 16),
+        PRESCALER_8 = (uint32_t)(3 << 16),
+    };
+
+    enum DmaMode
+    {
+        MODE_NONE = (uint32_t)(0 << 14),
+        MODE_1 = (uint32_t)(1 << 14),
+        MODE_2 = (uint32_t)(2 << 14),
+        MODE_3 = (uint32_t)(3 << 14),
+    };
+
+    enum Delay
+    {
+        DELAY_CYCLES_5 = (uint32_t)(0 << 8),
+        DELAY_CYCLES_6 = (uint32_t)(1 << 8),
+        DELAY_CYCLES_7 = (uint32_t)(2 << 8),
+        DELAY_CYCLES_8 = (uint32_t)(3 << 8),
+        DELAY_CYCLES_9 = (uint32_t)(4 << 8),
+        DELAY_CYCLES_10 = (uint32_t)(5 << 8),
+        DELAY_CYCLES_11 = (uint32_t)(6 << 8),
+        DELAY_CYCLES_12 = (uint32_t)(7 << 8),
+        DELAY_CYCLES_13 = (uint32_t)(8 << 8),
+        DELAY_CYCLES_14 = (uint32_t)(9 << 8),
+        DELAY_CYCLES_15 = (uint32_t)(10 << 8),
+        DELAY_CYCLES_16 = (uint32_t)(11 << 8),
+        DELAY_CYCLES_17 = (uint32_t)(12 << 8),
+        DELAY_CYCLES_18 = (uint32_t)(13 << 8),
+        DELAY_CYCLES_19 = (uint32_t)(14 << 8),
+        DELAY_CYCLES_20 = (uint32_t)(15 << 8),
+    };
+
+    Adc(Number adc);
+
+    void set_resolution(Resolution res);
+
+    void enable_scan_mode();
+    void disable_scan_mode();
+
+    void set_data_alignment(Alignment align);
+    void set_external_trigger_for_regular_group(RegularGroupTrigger trigger);
+    void set_external_trigger_polarity_for_regular_group(
+      RegularGroupTriggerPolarity polarity);
+    void set_conversion_mode(ConversionMode mode);
+
+    void enable_dma_request();
+    void disable_dma_request();
+
+    void enable_dma();
+    void disable_dma();
+
+    void enable();
+    void disable();
+
+    void start_conversion();
+
+    void set_number_of_conversions(uint8_t number);
+    void set_channel_sampling_time_selection(SamplingTime time,
+                                             Channel channel);
+    void set_conversion_number_in_sequence(uint8_t length, Channel* channel);
+    void set_prescaler(Prescaler prescaler);
+    void set_dma_mode(DmaMode mode);
+    void set_delay_between_two_samples(Delay delay);
+    void set_multi_mode(MultiMode mode);
+
+    void enable_temp_sensor();
+    void disable_temp_sensor();
+
+    uint32_t get_base_address() { return (_adc); }
+
+ private:
+    uint32_t _adc;
 };
 
-
 }  // namespace adc
 
 }  // namespace cm3cpp
diff --git a/cm3cpp_adc_dma.cpp b/cm3cpp_adc_dma.cpp
index 6a10930..6374e77 100644
--- a/cm3cpp_adc_dma.cpp
+++ b/cm3cpp_adc_dma.cpp
@@ -6,56 +6,61 @@ namespace adc {
 
 AdcDma::AdcDma(DmaConf dma, AdcConf adc, bool is_temp_sensor)
 {
-	_adc = new Adc(adc.number);
-	_data = new uint16_t[adc.channels_count];
-	memset(_data, 0, (adc.channels_count * sizeof(uint16_t)));
-
-	dma_stream_reset(dma.number, dma.stream);
-	dma_channel_select(dma.number, dma.stream, dma.channel);
-	dma_set_memory_address(dma.number, dma.stream, (uint32_t)_data);
-	dma_set_peripheral_address(dma.number, dma.stream, (uint32_t)&ADC_DR(_adc->get_base_address()));
-	dma_set_transfer_mode(dma.number, dma.stream, DMA_SxCR_DIR_PERIPHERAL_TO_MEM);
-	dma_set_number_of_data(dma.number, dma.stream, adc.channels_count);
-	dma_disable_peripheral_increment_mode(dma.number, dma.stream);
-	dma_enable_memory_increment_mode(dma.number, dma.stream);
-	dma_set_peripheral_size(dma.number, dma.stream, DMA_SxCR_PSIZE_16BIT);
-	dma_set_memory_size(dma.number, dma.stream, DMA_SxCR_MSIZE_16BIT);
-	dma_enable_circular_mode(dma.number, dma.stream);
-	dma_set_priority(dma.number, dma.stream, DMA_SxCR_PL_MEDIUM);
-	dma_enable_fifo_mode(dma.number, dma.stream);
-	dma_set_fifo_threshold(dma.number, dma.stream, DMA_SxFCR_FTH_2_4_FULL);
-	dma_set_memory_burst(dma.number, dma.stream, DMA_SxCR_MBURST_SINGLE);
-	dma_set_peripheral_burst(dma.number, dma.stream, DMA_SxCR_PBURST_SINGLE);
-	dma_enable_stream(dma.number, dma.stream);
-
-	if (is_temp_sensor) {
-		_adc->enable_temp_sensor();
-	}
-	_adc->set_multi_mode(Adc::MultiMode::MODE_INDEPENDENT);
-	_adc->set_prescaler(Adc::Prescaler::PRESCALER_8);
-	_adc->set_dma_mode(Adc::DmaMode::MODE_NONE);
-	_adc->set_delay_between_two_samples(Adc::Delay::DELAY_CYCLES_20);
-	_adc->set_resolution(Adc::Resolution::RES_12_BIT);
-	_adc->enable_scan_mode();
-	_adc->set_conversion_mode(Adc::ConversionMode::CONTINUOUS_CONV);
-	_adc->set_external_trigger_polarity_for_regular_group(Adc::RegularGroupTriggerPolarity::TRIGGER_NONE);
-	_adc->set_external_trigger_for_regular_group(Adc::RegularGroupTrigger::T1_CC1);
-	_adc->set_data_alignment(Adc::Alignment::RIGHT_ALIGN);
-	_adc->set_conversion_number_in_sequence(adc.channels_count, adc.channels);
-
-	for(int i = 0; i < adc.channels_count; ++i) {
-		_adc->set_channel_sampling_time_selection(Adc::SamplingTime::CYCLES_480, adc.channels[i]);
-	}
-
-	_adc->enable_dma_request();
-	_adc->enable_dma();
-	_adc->enable();
-	_adc->start_conversion();
+    _adc = new Adc(adc.number);
+    _data = new uint16_t[adc.channels_count];
+    memset(_data, 0, (adc.channels_count * sizeof(uint16_t)));
+
+    dma_stream_reset(dma.number, dma.stream);
+    dma_channel_select(dma.number, dma.stream, dma.channel);
+    dma_set_memory_address(dma.number, dma.stream, (uint32_t)_data);
+    dma_set_peripheral_address(dma.number, dma.stream,
+                               (uint32_t)&ADC_DR(_adc->get_base_address()));
+    dma_set_transfer_mode(dma.number, dma.stream,
+                          DMA_SxCR_DIR_PERIPHERAL_TO_MEM);
+    dma_set_number_of_data(dma.number, dma.stream, adc.channels_count);
+    dma_disable_peripheral_increment_mode(dma.number, dma.stream);
+    dma_enable_memory_increment_mode(dma.number, dma.stream);
+    dma_set_peripheral_size(dma.number, dma.stream, DMA_SxCR_PSIZE_16BIT);
+    dma_set_memory_size(dma.number, dma.stream, DMA_SxCR_MSIZE_16BIT);
+    dma_enable_circular_mode(dma.number, dma.stream);
+    dma_set_priority(dma.number, dma.stream, DMA_SxCR_PL_MEDIUM);
+    dma_enable_fifo_mode(dma.number, dma.stream);
+    dma_set_fifo_threshold(dma.number, dma.stream, DMA_SxFCR_FTH_2_4_FULL);
+    dma_set_memory_burst(dma.number, dma.stream, DMA_SxCR_MBURST_SINGLE);
+    dma_set_peripheral_burst(dma.number, dma.stream, DMA_SxCR_PBURST_SINGLE);
+    dma_enable_stream(dma.number, dma.stream);
+
+    if (is_temp_sensor) {
+        _adc->enable_temp_sensor();
+    }
+    _adc->set_multi_mode(Adc::MultiMode::MODE_INDEPENDENT);
+    _adc->set_prescaler(Adc::Prescaler::PRESCALER_8);
+    _adc->set_dma_mode(Adc::DmaMode::MODE_NONE);
+    _adc->set_delay_between_two_samples(Adc::Delay::DELAY_CYCLES_20);
+    _adc->set_resolution(Adc::Resolution::RES_12_BIT);
+    _adc->enable_scan_mode();
+    _adc->set_conversion_mode(Adc::ConversionMode::CONTINUOUS_CONV);
+    _adc->set_external_trigger_polarity_for_regular_group(
+      Adc::RegularGroupTriggerPolarity::TRIGGER_NONE);
+    _adc->set_external_trigger_for_regular_group(
+      Adc::RegularGroupTrigger::T1_CC1);
+    _adc->set_data_alignment(Adc::Alignment::RIGHT_ALIGN);
+    _adc->set_conversion_number_in_sequence(adc.channels_count, adc.channels);
+
+    for (int i = 0; i < adc.channels_count; ++i) {
+        _adc->set_channel_sampling_time_selection(Adc::SamplingTime::CYCLES_480,
+                                                  adc.channels[i]);
+    }
+
+    _adc->enable_dma_request();
+    _adc->enable_dma();
+    _adc->enable();
+    _adc->start_conversion();
 }
 
 uint16_t AdcDma::get_value(uint8_t index)
 {
-    return(_data[index]);
+    return (_data[index]);
 }
 
 }  // namespace adc
diff --git a/cm3cpp_adc_dma.h b/cm3cpp_adc_dma.h
index 6bb6ee1..b948ab2 100644
--- a/cm3cpp_adc_dma.h
+++ b/cm3cpp_adc_dma.h
@@ -1,12 +1,12 @@
 #ifndef CM3CPP_ADC_DMA_H_
 #define CM3CPP_ADC_DMA_H_
 
-#include <libopencm3/stm32/dma.h>
 #include <cm3cpp_config.h>
 #include <cstring>
+#include <libopencm3/stm32/dma.h>
 
-#include "private/assert.h"
 #include "cm3cpp_adc.h"
+#include "private/assert.h"
 
 namespace cm3cpp {
 
@@ -14,34 +14,34 @@ namespace adc {
 
 class AdcDma
 {
-public:
-	struct DmaConf
-	{
-		uint32_t number;
-		uint32_t stream;
-		uint32_t channel;
-	};
+ public:
+    struct DmaConf
+    {
+        uint32_t number;
+        uint32_t stream;
+        uint32_t channel;
+    };
 
-	struct AdcConf
-	{
-		Adc::Number number;
-		Adc::Channel *channels;
-		uint8_t channels_count;
-	};
+    struct AdcConf
+    {
+        Adc::Number number;
+        Adc::Channel* channels;
+        uint8_t channels_count;
+    };
 
-	AdcDma(DmaConf dma, AdcConf adc, bool is_temp_sensor);
+    AdcDma(DmaConf dma, AdcConf adc, bool is_temp_sensor);
 
-	CM3CPP_EXPLISIT_DESTRUCTOR(AdcDma)
+    CM3CPP_EXPLISIT_DESTRUCTOR(AdcDma)
 
     uint16_t get_value(uint8_t index);
 
-private:
-	Adc *_adc;
-	uint16_t *_data;
+ private:
+    Adc* _adc;
+    uint16_t* _data;
 };
 
-} // namespace adc
+}  // namespace adc
 
-} // namespace cm3cpp
+}  // namespace cm3cpp
 
 #endif /* CM3CPP_ADC_DMA_H_ */
diff --git a/cm3cpp_config_template.h b/cm3cpp_config_template.h
index 9ad1a2a..5d4e086 100644
--- a/cm3cpp_config_template.h
+++ b/cm3cpp_config_template.h
@@ -2,25 +2,27 @@
 #define CM3CPP_CONFIG_H_
 
 //*** Must be changed according to your RCC configuration
-#define CM3CPP_SYSTEM_CORE_CLOCK					(uint32_t)120000000
+#define CM3CPP_SYSTEM_CORE_CLOCK (uint32_t)120000000
 
-#define CM3CPP_ENABLE_CUSTOM_SYSTICK_SOURCE  1
+#define CM3CPP_ENABLE_CUSTOM_SYSTICK_SOURCE 1
 //*** Or you can use custom systick source (like timer)
 #if (CM3CPP_ENABLE_CUSTOM_SYSTICK_SOURCE == 1)
-#define CM3CPP_TIMER_N								12
-#define CM3CPP_SYSTICK_CLOCK                        (30000000 * 2)
-#define CM3CPP_SYSTICK_CLOCK_DIV                    1000      // 1 kHz
-#define CM3CPP_SYSTICK_PERIOD                       0xffff
+#define CM3CPP_TIMER_N 12
+#define CM3CPP_SYSTICK_CLOCK (30000000 * 2)
+#define CM3CPP_SYSTICK_CLOCK_DIV 1000  // 1 kHz
+#define CM3CPP_SYSTICK_PERIOD 0xffff
 #else
-#define CM3CPP_SYSTICK_CLOCK_DIV                    1000	  // 1 kHz
-#define CM3CPP_SYSTICK_CLOCK                        CM3CPP_SYSTEM_CORE_CLOCK
+#define CM3CPP_SYSTICK_CLOCK_DIV 1000  // 1 kHz
+#define CM3CPP_SYSTICK_CLOCK CM3CPP_SYSTEM_CORE_CLOCK
 #endif
 
 //*** User assert function define
-#define CM3_ASSERT( x ) if( ( x ) == 0 ) user_assert_func( __FILE__, __LINE__ )
+#define CM3_ASSERT(x)                                                          \
+    if ((x) == 0)                                                              \
+    user_assert_func(__FILE__, __LINE__)
 
 //*** This option enable destructors for classes using a heap allocation
 //    inside. If you can't destruct an object it prevents a memory leak.
-#define CM3CPP_ENABLE_IMPLISIT_DESTRUCTOR_CALLS     0
+#define CM3CPP_ENABLE_IMPLISIT_DESTRUCTOR_CALLS 0
 
 #endif /* CM3CPP_CONFIG_H_ */
diff --git a/cm3cpp_flash_cycle.hpp b/cm3cpp_flash_cycle.hpp
index 25d520b..5dce3f8 100644
--- a/cm3cpp_flash_cycle.hpp
+++ b/cm3cpp_flash_cycle.hpp
@@ -9,142 +9,131 @@ namespace cm3cpp {
 
 namespace flash {
 
-enum FlashSector : uint32_t {
-	SECTOR_0 = 0x08000000,
-	SECTOR_1 = 0x08004000,
-	SECTOR_2 = 0x08008000,
-	SECTOR_3 = 0x0800C000,
-	SECTOR_4 = 0x08010000,
-	SECTOR_5 = 0x08020000,
+enum FlashSector : uint32_t
+{
+    SECTOR_0 = 0x08000000,
+    SECTOR_1 = 0x08004000,
+    SECTOR_2 = 0x08008000,
+    SECTOR_3 = 0x0800C000,
+    SECTOR_4 = 0x08010000,
+    SECTOR_5 = 0x08020000,
 };
 
 constexpr uint32_t USER_FLASH_END_ADDRESS = 0x080FFFFF;
 
-template <typename T>
+template<typename T>
 class FlashCycle
 {
-public:
-	FlashCycle(FlashSector sector)
-	{
-		_error = false;
-		_ifexist = false;
-		_flashSector = sector;
-		_startAddr = 0;
-		_endAddr = 0;
-		_getSectorAddrs();
-		_pLastContainer = _searchLastContainer();
-	}
-
-	bool write(T* newContainer)
-	{
-		if(_error) {
-			return(false);
-		}
-
-		uint32_t writeTo;
-
-		flash_unlock();
-
-		if( !_ifexist)
-		{
-			writeTo = _startAddr;
-			_ifexist = true;
-		}
-		else if((uint32_t)_pLastContainer >= (_endAddr-sizeof(T)))
-		{
-			__disable_irq();
-			flash_erase_sector(5, 2);
-			__enable_irq();
-			writeTo = _startAddr;
-		}
-		else {
-			writeTo = (uint32_t)(_pLastContainer + 1);
-		}
-
-		uint8_t *pContainer = (uint8_t*)newContainer;
-
-		for(int i = 0; i < sizeof(T); i++)
-		{
-			__disable_irq();
-			flash_program_byte(writeTo++, pContainer[i]);
-			__enable_irq();
-		}
-
-		flash_lock();
-		_pLastContainer=(T*)(writeTo - sizeof(T));
-		return(true);
-	}
-
-	T* get(void)
-	{
-		return(_pLastContainer);
-	}
-
-	bool is_exist(void)
-	{
-		return(_ifexist);
-	}
-
-private:
-	bool _error;
-	bool _ifexist;
-	FlashSector _flashSector;
-	uint32_t _startAddr;
-	uint32_t _endAddr;
-	T* _pLastContainer;
-
-	static constexpr uint8_t NUM_SECTORS = 6;
-
-	void _getSectorAddrs(void)
-	{
-		_startAddr = (uint32_t)_flashSector;
-
-		if (_flashSector == FlashSector::SECTOR_1)
-			_endAddr = (uint32_t)FlashSector::SECTOR_2;
-		else if (_flashSector == FlashSector::SECTOR_2)
-			_endAddr = (uint32_t)FlashSector::SECTOR_3;
-		else if (_flashSector == FlashSector::SECTOR_3)
-			_endAddr = (uint32_t)FlashSector::SECTOR_4;
-		else if (_flashSector == FlashSector::SECTOR_4)
-			_endAddr = (uint32_t)FlashSector::SECTOR_5;
-		else if(_flashSector == FlashSector::SECTOR_5)
-			_endAddr = USER_FLASH_END_ADDRESS + 1;
-
-		if(!_startAddr)
-			_error = true;
-	}
-
-	T *_searchLastContainer(void)
-	{
-		if(_error) {
-			return(0);
-		}
-
-		T* addr = (T*)_startAddr;
-		_ifexist = true;
-		while((uint32_t)addr <= (_endAddr - sizeof(T)))
-		{
-			if( *(((uint8_t*)addr)) == 0xFF)
-			{
-				if(addr == (T*)_startAddr)
-				{
-					_ifexist = false;
-					return(addr);
-					//addr = 0;
-				}
-
-				break;
-			}
-
-			addr += 1;
-		}
-
-		return(addr - 1);
-	}
+ public:
+    FlashCycle(FlashSector sector)
+    {
+        _error = false;
+        _ifexist = false;
+        _flashSector = sector;
+        _startAddr = 0;
+        _endAddr = 0;
+        _getSectorAddrs();
+        _pLastContainer = _searchLastContainer();
+    }
+
+    bool write(T* newContainer)
+    {
+        if (_error) {
+            return (false);
+        }
+
+        uint32_t writeTo;
+
+        flash_unlock();
+
+        if (!_ifexist) {
+            writeTo = _startAddr;
+            _ifexist = true;
+        }
+        else if ((uint32_t)_pLastContainer >= (_endAddr - sizeof(T))) {
+            __disable_irq();
+            flash_erase_sector(5, 2);
+            __enable_irq();
+            writeTo = _startAddr;
+        }
+        else {
+            writeTo = (uint32_t)(_pLastContainer + 1);
+        }
+
+        uint8_t* pContainer = (uint8_t*)newContainer;
+
+        for (int i = 0; i < sizeof(T); i++) {
+            __disable_irq();
+            flash_program_byte(writeTo++, pContainer[i]);
+            __enable_irq();
+        }
+
+        flash_lock();
+        _pLastContainer = (T*)(writeTo - sizeof(T));
+        return (true);
+    }
+
+    T* get(void) { return (_pLastContainer); }
+
+    bool is_exist(void) { return (_ifexist); }
+
+ private:
+    bool _error;
+    bool _ifexist;
+    FlashSector _flashSector;
+    uint32_t _startAddr;
+    uint32_t _endAddr;
+    T* _pLastContainer;
+
+    static constexpr uint8_t NUM_SECTORS = 6;
+
+    void _getSectorAddrs(void)
+    {
+        _startAddr = (uint32_t)_flashSector;
+
+        if (_flashSector == FlashSector::SECTOR_1)
+            _endAddr = (uint32_t)FlashSector::SECTOR_2;
+        else if (_flashSector == FlashSector::SECTOR_2)
+            _endAddr = (uint32_t)FlashSector::SECTOR_3;
+        else if (_flashSector == FlashSector::SECTOR_3)
+            _endAddr = (uint32_t)FlashSector::SECTOR_4;
+        else if (_flashSector == FlashSector::SECTOR_4)
+            _endAddr = (uint32_t)FlashSector::SECTOR_5;
+        else if (_flashSector == FlashSector::SECTOR_5)
+            _endAddr = USER_FLASH_END_ADDRESS + 1;
+
+        if (!_startAddr)
+            _error = true;
+    }
+
+    T* _searchLastContainer(void)
+    {
+        if (_error) {
+            return (0);
+        }
+
+        T* addr = (T*)_startAddr;
+        _ifexist = true;
+        while ((uint32_t)addr <= (_endAddr - sizeof(T))) {
+            if (*(((uint8_t*)addr)) == 0xFF) {
+                if (addr == (T*)_startAddr) {
+                    _ifexist = false;
+                    return (addr);
+                    // addr = 0;
+                }
+
+                break;
+            }
+
+            addr += 1;
+        }
+
+        return (addr - 1);
+    }
 };
 
-}  /* namespace flash */
+} /* namespace flash */
 
-}  /* namespace cm3cpp */
+} /* namespace cm3cpp */
 
 #endif /* CM3CPP_FLASH_CYCLE_H_ */
diff --git a/cm3cpp_flash_otp.hpp b/cm3cpp_flash_otp.hpp
index dac397f..159d072 100644
--- a/cm3cpp_flash_otp.hpp
+++ b/cm3cpp_flash_otp.hpp
@@ -10,129 +10,135 @@ namespace flash {
 
 enum class OtpBlock : uint8_t
 {
-	BLOCK_0,
-	BLOCK_1,
-	BLOCK_2,
-	BLOCK_3,
-	BLOCK_4,
-	BLOCK_5,
-	BLOCK_6,
-	BLOCK_7,
-	BLOCK_8,
-	BLOCK_9,
-	BLOCK_10,
-	BLOCK_11,
-	BLOCK_12,
-	BLOCK_13,
-	BLOCK_14,
-	BLOCK_15,
+    BLOCK_0,
+    BLOCK_1,
+    BLOCK_2,
+    BLOCK_3,
+    BLOCK_4,
+    BLOCK_5,
+    BLOCK_6,
+    BLOCK_7,
+    BLOCK_8,
+    BLOCK_9,
+    BLOCK_10,
+    BLOCK_11,
+    BLOCK_12,
+    BLOCK_13,
+    BLOCK_14,
+    BLOCK_15,
 };
 
 enum class OtpByte
 {
-	BYTE_0,
-	BYTE_1,
-	BYTE_2,
-	BYTE_3,
-	BYTE_4,
-	BYTE_5,
-	BYTE_6,
-	BYTE_7,
-	BYTE_8,
-	BYTE_9,
-	BYTE_10,
-	BYTE_11,
-	BYTE_12,
-	BYTE_13,
-	BYTE_14,
-	BYTE_15,
-	BYTE_16,
-	BYTE_17,
-	BYTE_18,
-	BYTE_19,
-	BYTE_20,
-	BYTE_21,
-	BYTE_22,
-	BYTE_23,
-	BYTE_24,
-	BYTE_25,
-	BYTE_26,
-	BYTE_27,
-	BYTE_28,
-	BYTE_29,
-	BYTE_30,
-	BYTE_31,
+    BYTE_0,
+    BYTE_1,
+    BYTE_2,
+    BYTE_3,
+    BYTE_4,
+    BYTE_5,
+    BYTE_6,
+    BYTE_7,
+    BYTE_8,
+    BYTE_9,
+    BYTE_10,
+    BYTE_11,
+    BYTE_12,
+    BYTE_13,
+    BYTE_14,
+    BYTE_15,
+    BYTE_16,
+    BYTE_17,
+    BYTE_18,
+    BYTE_19,
+    BYTE_20,
+    BYTE_21,
+    BYTE_22,
+    BYTE_23,
+    BYTE_24,
+    BYTE_25,
+    BYTE_26,
+    BYTE_27,
+    BYTE_28,
+    BYTE_29,
+    BYTE_30,
+    BYTE_31,
 };
 
 enum class Flag
 {
-	BSY    = FLASH_SR_BSY,
-	PGSERR = FLASH_SR_PGSERR,
-	PGPERR = FLASH_SR_PGPERR,
-	PGAERR = FLASH_SR_PGAERR,
-	WRPERR = FLASH_SR_WRPERR,
-	OPERR  = FLASH_SR_OPERR,
-	EOP    = FLASH_SR_EOP,
+    BSY = FLASH_SR_BSY,
+    PGSERR = FLASH_SR_PGSERR,
+    PGPERR = FLASH_SR_PGPERR,
+    PGAERR = FLASH_SR_PGAERR,
+    WRPERR = FLASH_SR_WRPERR,
+    OPERR = FLASH_SR_OPERR,
+    EOP = FLASH_SR_EOP,
 };
 
 class FlashOtp
 {
-public:
-	static void write(OtpBlock block, OtpByte byte, uint8_t data)
-	{
-		flash_unlock();
-		clear_flag(Flag::EOP);
-		clear_flag(Flag::OPERR);
-		clear_flag(Flag::WRPERR);
-		clear_flag(Flag::PGAERR);
-		clear_flag(Flag::PGPERR);
-		clear_flag(Flag::PGSERR);
-		flash_wait_for_last_operation();
-		uint32_t address = _OTP_START_ADDR + ((uint32_t)block * _OTP_BYTES_IN_BLOCK) + (uint32_t)byte;
-		__disable_irq();
-		flash_program_byte(address, data);
-		__enable_irq();
-		flash_lock();
-	}
-
-	static uint8_t read(OtpBlock block, OtpByte byte)
-	{
-		uint32_t address = _OTP_START_ADDR + ((uint32_t)block * _OTP_BYTES_IN_BLOCK) + (uint32_t)byte;
-		return *(uint8_t*)address;
-	}
-
-	static const uint8_t* const get_pointer(OtpBlock block, OtpByte byte)
-	{
-		uint32_t address = _OTP_START_ADDR + ((uint32_t)block * _OTP_BYTES_IN_BLOCK) + (uint32_t)byte;
-		return (uint8_t*)address;
-	}
-
-	static bool get_flag(Flag flag)
-	{
-		uint32_t status = FLASH_SR | (uint32_t)flag;
-		if (status > 0)
-			return true;
-		return false;
-	}
-
-	static void clear_flag(Flag flag)
-	{
-		if (flag == Flag::BSY)
-			return;
-
-		FLASH_SR |= (uint32_t)flag;
-	}
-private:
-
-static constexpr uint32_t _OTP_START_ADDR	   = (0x1FFF7800);
-static constexpr uint32_t _OTP_LOCK_ADDR	   = (0x1FFF7A00);
-static constexpr uint32_t _OTP_BLOCKS		   = 16;
-static constexpr uint32_t _OTP_BYTES_IN_BLOCK  = 32;
-static constexpr uint32_t _OTP_SIZE			   =(_OTP_BLOCKS * _OTP_BYTES_IN_BLOCK);
+ public:
+    static void write(OtpBlock block, OtpByte byte, uint8_t data)
+    {
+        flash_unlock();
+        clear_flag(Flag::EOP);
+        clear_flag(Flag::OPERR);
+        clear_flag(Flag::WRPERR);
+        clear_flag(Flag::PGAERR);
+        clear_flag(Flag::PGPERR);
+        clear_flag(Flag::PGSERR);
+        flash_wait_for_last_operation();
+        uint32_t address = _OTP_START_ADDR +
+                           ((uint32_t)block * _OTP_BYTES_IN_BLOCK) +
+                           (uint32_t)byte;
+        __disable_irq();
+        flash_program_byte(address, data);
+        __enable_irq();
+        flash_lock();
+    }
+
+    static uint8_t read(OtpBlock block, OtpByte byte)
+    {
+        uint32_t address = _OTP_START_ADDR +
+                           ((uint32_t)block * _OTP_BYTES_IN_BLOCK) +
+                           (uint32_t)byte;
+        return *(uint8_t*)address;
+    }
+
+    static const uint8_t* const get_pointer(OtpBlock block, OtpByte byte)
+    {
+        uint32_t address = _OTP_START_ADDR +
+                           ((uint32_t)block * _OTP_BYTES_IN_BLOCK) +
+                           (uint32_t)byte;
+        return (uint8_t*)address;
+    }
+
+    static bool get_flag(Flag flag)
+    {
+        uint32_t status = FLASH_SR | (uint32_t)flag;
+        if (status > 0)
+            return true;
+        return false;
+    }
+
+    static void clear_flag(Flag flag)
+    {
+        if (flag == Flag::BSY)
+            return;
+
+        FLASH_SR |= (uint32_t)flag;
+    }
+
+ private:
+    static constexpr uint32_t _OTP_START_ADDR = (0x1FFF7800);
+    static constexpr uint32_t _OTP_LOCK_ADDR = (0x1FFF7A00);
+    static constexpr uint32_t _OTP_BLOCKS = 16;
+    static constexpr uint32_t _OTP_BYTES_IN_BLOCK = 32;
+    static constexpr uint32_t _OTP_SIZE = (_OTP_BLOCKS * _OTP_BYTES_IN_BLOCK);
 };
 
-}  /* namespace flash */
+} /* namespace flash */
 
-}  /* namespace cm3cpp */
+} /* namespace cm3cpp */
 
 #endif /* CM3CPP_FLASH_OTP_HPP_ */
diff --git a/cm3cpp_gpio.cpp b/cm3cpp_gpio.cpp
index 02141b8..80d7185 100644
--- a/cm3cpp_gpio.cpp
+++ b/cm3cpp_gpio.cpp
@@ -19,8 +19,8 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/* 
-GPIO C++ Wrapper of libopencm3 library for STM32F2, STM32F4 
+/*
+GPIO C++ Wrapper of libopencm3 library for STM32F2, STM32F4
 */
 
 #include "cm3cpp_gpio.h"
@@ -31,176 +31,171 @@ namespace gpio {
 
 Gpio::Gpio(Pinout pinout)
 {
-	_pinout = pinout;
+    _pinout = pinout;
 }
 
 void Gpio::init(Pinout pinout)
 {
-	_pinout = pinout;
+    _pinout = pinout;
 }
 
 void Gpio::set()
 {
-	gpio_set(_pinout.port, _pinout.pin);
+    gpio_set(_pinout.port, _pinout.pin);
 }
 
 void Gpio::clear()
 {
-	gpio_clear(_pinout.port, _pinout.pin);
+    gpio_clear(_pinout.port, _pinout.pin);
 }
 
 bool Gpio::get() const
 {
-	return gpio_get(_pinout.port, _pinout.pin);
+    return gpio_get(_pinout.port, _pinout.pin);
 }
 
 void Gpio::toggle()
 {
-	gpio_toggle(_pinout.port, _pinout.pin);
+    gpio_toggle(_pinout.port, _pinout.pin);
 }
 
 uint16_t Gpio::port_read() const
 {
-	return gpio_port_read(_pinout.port);
+    return gpio_port_read(_pinout.port);
 }
 
 void Gpio::port_write(uint16_t data)
 {
-	gpio_port_write(_pinout.port, data);
+    gpio_port_write(_pinout.port, data);
 }
 
 void Gpio::port_config_lock()
 {
-	gpio_port_config_lock (_pinout.port, _pinout.pin);
+    gpio_port_config_lock(_pinout.port, _pinout.pin);
 }
 
 void Gpio::mode_setup(Mode mode, PullMode pull_mode)
 {
-	uint8_t _mode;
-	uint8_t _pull_mode;
-
-	switch (mode)
-	{
-		case INPUT:
-			_mode = GPIO_MODE_INPUT;
-			break;
-		case OUTPUT:
-			_mode = GPIO_MODE_OUTPUT;
-			break;
-		case ALTERNATE_FUNCTION:
-			_mode = GPIO_MODE_AF;
-			break;
-		case ANALOG:
-			_mode = GPIO_MODE_ANALOG;
-			break;
-	}
-
-	switch (pull_mode)
-	{
-		case NO_PULL:
-			_pull_mode = GPIO_PUPD_NONE;
-			break;
-		case PULL_UP:
-			_pull_mode = GPIO_PUPD_PULLUP;
-			break;
-		case PULL_DOWN:
-			_pull_mode = GPIO_PUPD_PULLDOWN;
-			break;
-	}
-
-	gpio_mode_setup(_pinout.port, _mode, _pull_mode, _pinout.pin);
+    uint8_t _mode;
+    uint8_t _pull_mode;
+
+    switch (mode) {
+        case INPUT:
+            _mode = GPIO_MODE_INPUT;
+            break;
+        case OUTPUT:
+            _mode = GPIO_MODE_OUTPUT;
+            break;
+        case ALTERNATE_FUNCTION:
+            _mode = GPIO_MODE_AF;
+            break;
+        case ANALOG:
+            _mode = GPIO_MODE_ANALOG;
+            break;
+    }
+
+    switch (pull_mode) {
+        case NO_PULL:
+            _pull_mode = GPIO_PUPD_NONE;
+            break;
+        case PULL_UP:
+            _pull_mode = GPIO_PUPD_PULLUP;
+            break;
+        case PULL_DOWN:
+            _pull_mode = GPIO_PUPD_PULLDOWN;
+            break;
+    }
+
+    gpio_mode_setup(_pinout.port, _mode, _pull_mode, _pinout.pin);
 }
 
 void Gpio::set_output_options(OutputType type, Speed speed)
 {
-	uint8_t _type;
-	uint8_t _speed;
-
-	switch (type)
-	{
-		case PUSH_PULL:
-			_type = GPIO_OTYPE_PP;
-			break;
-		case OPEN_DRAIN:
-			_type = GPIO_OTYPE_OD;
-			break;
-	}
-
-	switch (speed)
-	{
-		case LOW_2MHz:
-			_speed = GPIO_OSPEED_2MHZ;
-			break;
-		case MEDIUM_25MHz:
-			_speed = GPIO_OSPEED_25MHZ;
-			break;
-		case FAST_50MHz:
-			_speed = GPIO_OSPEED_50MHZ;
-			break;
-		case HIGH_SPEED_100MHz:
-			_speed = GPIO_OSPEED_100MHZ;
-			break;
-	}
-
-	gpio_set_output_options(_pinout.port, _type, _speed, _pinout.pin);
+    uint8_t _type;
+    uint8_t _speed;
+
+    switch (type) {
+        case PUSH_PULL:
+            _type = GPIO_OTYPE_PP;
+            break;
+        case OPEN_DRAIN:
+            _type = GPIO_OTYPE_OD;
+            break;
+    }
+
+    switch (speed) {
+        case LOW_2MHz:
+            _speed = GPIO_OSPEED_2MHZ;
+            break;
+        case MEDIUM_25MHz:
+            _speed = GPIO_OSPEED_25MHZ;
+            break;
+        case FAST_50MHz:
+            _speed = GPIO_OSPEED_50MHZ;
+            break;
+        case HIGH_SPEED_100MHz:
+            _speed = GPIO_OSPEED_100MHZ;
+            break;
+    }
+
+    gpio_set_output_options(_pinout.port, _type, _speed, _pinout.pin);
 }
 
 void Gpio::set_af(AltFuncNumber af_num)
 {
-	uint8_t _af;
-	switch (af_num)
-	{
-		case AF0:
-			_af = GPIO_AF0;
-			break;
-		case AF1:
-			_af = GPIO_AF1;
-			break;
-		case AF2:
-			_af = GPIO_AF2;
-			break;
-		case AF3:
-			_af = GPIO_AF3;
-			break;
-		case AF4:
-			_af = GPIO_AF4;
-			break;
-		case AF5:
-			_af = GPIO_AF5;
-			break;
-		case AF6:
-			_af = GPIO_AF6;
-			break;
-		case AF7:
-			_af = GPIO_AF7;
-			break;
-		case AF8:
-			_af = GPIO_AF8;
-			break;
-		case AF9:
-			_af = GPIO_AF9;
-			break;
-		case AF10:
-			_af = GPIO_AF10;
-			break;
-		case AF11:
-			_af = GPIO_AF11;
-			break;
-		case AF12:
-			_af = GPIO_AF12;
-			break;
-		case AF13:
-			_af = GPIO_AF13;
-			break;
-		case AF14:
-			_af = GPIO_AF14;
-			break;
-		case AF15:
-			_af = GPIO_AF15;
-			break;
-	}
-
-	gpio_set_af(_pinout.port, _af, _pinout.pin);
+    uint8_t _af;
+    switch (af_num) {
+        case AF0:
+            _af = GPIO_AF0;
+            break;
+        case AF1:
+            _af = GPIO_AF1;
+            break;
+        case AF2:
+            _af = GPIO_AF2;
+            break;
+        case AF3:
+            _af = GPIO_AF3;
+            break;
+        case AF4:
+            _af = GPIO_AF4;
+            break;
+        case AF5:
+            _af = GPIO_AF5;
+            break;
+        case AF6:
+            _af = GPIO_AF6;
+            break;
+        case AF7:
+            _af = GPIO_AF7;
+            break;
+        case AF8:
+            _af = GPIO_AF8;
+            break;
+        case AF9:
+            _af = GPIO_AF9;
+            break;
+        case AF10:
+            _af = GPIO_AF10;
+            break;
+        case AF11:
+            _af = GPIO_AF11;
+            break;
+        case AF12:
+            _af = GPIO_AF12;
+            break;
+        case AF13:
+            _af = GPIO_AF13;
+            break;
+        case AF14:
+            _af = GPIO_AF14;
+            break;
+        case AF15:
+            _af = GPIO_AF15;
+            break;
+    }
+
+    gpio_set_af(_pinout.port, _af, _pinout.pin);
 }
 
 void Gpio::setup_exti(exti_trigger_type trigger)
@@ -218,10 +213,11 @@ void Gpio::clear_exti_pending_bit()
 bool Gpio::get_exti_flag_status() const
 {
     uint32_t flag = exti_get_flag_status(_pinout.pin);
-    if (flag != 0) return true;
+    if (flag != 0)
+        return true;
     return false;
 }
 
-} // namespace gpio
+}  // namespace gpio
 
-} // namespace cm3cpp
+}  // namespace cm3cpp
diff --git a/cm3cpp_gpio.h b/cm3cpp_gpio.h
index d693ee2..340c6f2 100644
--- a/cm3cpp_gpio.h
+++ b/cm3cpp_gpio.h
@@ -19,32 +19,28 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/* 
-GPIO C++ Wrapper of libopencm3 library for STM32F2, STM32F4 
+/*
+GPIO C++ Wrapper of libopencm3 library for STM32F2, STM32F4
 */
 
 #ifndef CM3CPP_GPIO_H_
 #define CM3CPP_GPIO_H_
 
-/**************************************************************************************************
- * GENERAL INCLUDES
- *************************************************************************************************/
+// GENERAL INCLUDES
 #include "stdint.h"
-/**************************************************************************************************
- * LIBOPENCM3 INCLUDES
- *************************************************************************************************/
-#include <libopencm3/stm32/rcc.h>
-#include <libopencm3/stm32/gpio.h>
+
+// LIBOPENCM3 INCLUDES
 #include <libopencm3/stm32/exti.h>
+#include <libopencm3/stm32/gpio.h>
+#include <libopencm3/stm32/rcc.h>
 #ifdef STM32F2
 #include <libopencm3/stm32/f2/nvic.h>
 #endif
 #ifdef STM32F4
 #include <libopencm3/stm32/f4/nvic.h>
 #endif
-/**************************************************************************************************
- * CM3CPP INCLUDES
- *************************************************************************************************/
+
+// CM3CPP INCLUDES
 #include "private/pinout.h"
 
 namespace cm3cpp {
@@ -53,81 +49,87 @@ namespace gpio {
 
 class Gpio
 {
-public:
-	struct Pinout {
-		uint32_t port;
-		uint16_t pin;
+ public:
+    struct Pinout
+    {
+        uint32_t port;
+        uint16_t pin;
         uint8_t pin_number;
     };
 
-	enum Mode {
-		INPUT,
-		OUTPUT,
-		ALTERNATE_FUNCTION,
-		ANALOG
-	};
-
-	enum PullMode {
-		NO_PULL,
-		PULL_UP,
-		PULL_DOWN
-	};
-
-	enum OutputType {
-		PUSH_PULL,
-		OPEN_DRAIN
-	};
-
-	enum Speed {
-		LOW_2MHz,
-		MEDIUM_25MHz,
-		FAST_50MHz,
-		HIGH_SPEED_100MHz
-	};
-
-	enum AltFuncNumber {
-		AF0,
-		AF1,
-		AF2,
-		AF3,
-		AF4,
-		AF5,
-		AF6,
-		AF7,
-		AF8,
-		AF9,
-		AF10,
-		AF11,
-		AF12,
-		AF13,
-		AF14,
-		AF15
-	};
-
-	Gpio() {}
-	Gpio(Pinout pinout);
-
-	void init(Pinout pinout);
-	void set();
-	void clear();
+    enum Mode
+    {
+        INPUT,
+        OUTPUT,
+        ALTERNATE_FUNCTION,
+        ANALOG
+    };
+
+    enum PullMode
+    {
+        NO_PULL,
+        PULL_UP,
+        PULL_DOWN
+    };
+
+    enum OutputType
+    {
+        PUSH_PULL,
+        OPEN_DRAIN
+    };
+
+    enum Speed
+    {
+        LOW_2MHz,
+        MEDIUM_25MHz,
+        FAST_50MHz,
+        HIGH_SPEED_100MHz
+    };
+
+    enum AltFuncNumber
+    {
+        AF0,
+        AF1,
+        AF2,
+        AF3,
+        AF4,
+        AF5,
+        AF6,
+        AF7,
+        AF8,
+        AF9,
+        AF10,
+        AF11,
+        AF12,
+        AF13,
+        AF14,
+        AF15
+    };
+
+    Gpio() {}
+    Gpio(Pinout pinout);
+
+    void init(Pinout pinout);
+    void set();
+    void clear();
     bool get() const;
     void toggle();
     uint16_t port_read() const;
     void port_write(uint16_t data);
-	void port_config_lock();
-	void mode_setup(Mode mode, PullMode pull_mode);
-	void set_output_options(OutputType type, Speed speed);
-	void set_af(AltFuncNumber af_num);
-	void setup_exti(enum exti_trigger_type trigger);
-	void clear_exti_pending_bit();
+    void port_config_lock();
+    void mode_setup(Mode mode, PullMode pull_mode);
+    void set_output_options(OutputType type, Speed speed);
+    void set_af(AltFuncNumber af_num);
+    void setup_exti(enum exti_trigger_type trigger);
+    void clear_exti_pending_bit();
     bool get_exti_flag_status() const;
 
  private:
-	Pinout _pinout;
+    Pinout _pinout;
 };
 
-} // namespace gpio
+}  // namespace gpio
 
-} // namespace cm3cpp
+}  // namespace cm3cpp
 
 #endif /* CM3CPP_GPIO_H_ */
diff --git a/cm3cpp_i2c.cpp b/cm3cpp_i2c.cpp
index 845a8d4..c2f7bd0 100644
--- a/cm3cpp_i2c.cpp
+++ b/cm3cpp_i2c.cpp
@@ -19,8 +19,8 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/* 
-I2C C++ Wrapper of libopencm3 library for STM32F2, STM32F4 
+/*
+I2C C++ Wrapper of libopencm3 library for STM32F2, STM32F4
 */
 
 #include "cm3cpp_i2c.h"
@@ -29,218 +29,226 @@ namespace cm3cpp {
 
 namespace i2c {
 
-I2c::I2c(Config i2c_conf) : _counter_ms(new systick::Counter(systick::Counter::Mode::ONE_SHOT, MAX_TRANSMIT_TIME_MS))
+I2c::I2c(Config i2c_conf) :
+  _counter_ms(new systick::Counter(systick::Counter::Mode::ONE_SHOT,
+                                   MAX_TRANSMIT_TIME_MS))
 {
-	_config = i2c_conf;
-
-	switch(_config.number)
-	{
-		case 1: _i2c = I2C1; break;
-		case 2: _i2c = I2C2; break;
-		default: break;
-	}
-
-	Gpio scl(_config.scl_pin);
-	scl.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);
-	scl.set_output_options(Gpio::OutputType::OPEN_DRAIN, Gpio::Speed::LOW_2MHz);
-	scl.set_af(Gpio::AltFuncNumber::AF4);
-
-	Gpio sda(_config.sda_pin);
-	sda.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);
-	sda.set_output_options(Gpio::OutputType::OPEN_DRAIN, Gpio::Speed::LOW_2MHz);
-	sda.set_af(Gpio::AltFuncNumber::AF4);
+    _config = i2c_conf;
+
+    switch (_config.number) {
+        case 1:
+            _i2c = I2C1;
+            break;
+        case 2:
+            _i2c = I2C2;
+            break;
+        default:
+            break;
+    }
+
+    Gpio scl(_config.scl_pin);
+    scl.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);
+    scl.set_output_options(Gpio::OutputType::OPEN_DRAIN, Gpio::Speed::LOW_2MHz);
+    scl.set_af(Gpio::AltFuncNumber::AF4);
+
+    Gpio sda(_config.sda_pin);
+    sda.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);
+    sda.set_output_options(Gpio::OutputType::OPEN_DRAIN, Gpio::Speed::LOW_2MHz);
+    sda.set_af(Gpio::AltFuncNumber::AF4);
 }
 
-void I2c::reset() {
-	i2c_reset(_i2c);
+void I2c::reset()
+{
+    i2c_reset(_i2c);
 }
 
-void I2c::enable() {
-	i2c_peripheral_enable(_i2c);
+void I2c::enable()
+{
+    i2c_peripheral_enable(_i2c);
 }
 
-void I2c::disable() {
-	i2c_peripheral_disable(_i2c);
+void I2c::disable()
+{
+    i2c_peripheral_disable(_i2c);
 }
 
-void I2c::set_clock_frequency(ClockFrequency freq) {
-	i2c_set_clock_frequency(_i2c, freq);
+void I2c::set_clock_frequency(ClockFrequency freq)
+{
+    i2c_set_clock_frequency(_i2c, freq);
 }
 
-void I2c::set_ccr(uint16_t freq) {
-	i2c_set_ccr(_i2c, freq);
+void I2c::set_ccr(uint16_t freq)
+{
+    i2c_set_ccr(_i2c, freq);
 }
 
-void I2c::set_trise(uint16_t trise) {
-	i2c_set_trise(_i2c, trise);
+void I2c::set_trise(uint16_t trise)
+{
+    i2c_set_trise(_i2c, trise);
 }
 
 void I2c::set_mode(Mode mode)
 {
-	switch (mode)
-	{
-		case STANDARD :
-			i2c_set_standard_mode(_i2c);
-			break;
-		case FAST     :
-			i2c_set_fast_mode(_i2c);
-			break;
-	}
+    switch (mode) {
+        case STANDARD:
+            i2c_set_standard_mode(_i2c);
+            break;
+        case FAST:
+            i2c_set_fast_mode(_i2c);
+            break;
+    }
 }
 
 void I2c::set_address_mode(AddressMode mode)
 {
-	switch (mode)
-	{
-	case ADDRESS_MODE_7BIT  :
-		I2C_OAR1(_i2c) &= ~I2C_OAR1_ADDMODE;
-		break;
-	case ADDRESS_MODE_10BIT :
-		I2C_OAR1(_i2c) |= I2C_OAR1_ADDMODE;
-		break;
-	}
+    switch (mode) {
+        case ADDRESS_MODE_7BIT:
+            I2C_OAR1(_i2c) &= ~I2C_OAR1_ADDMODE;
+            break;
+        case ADDRESS_MODE_10BIT:
+            I2C_OAR1(_i2c) |= I2C_OAR1_ADDMODE;
+            break;
+    }
 }
 
-void I2c::set_dutycycle(FastModeDuty dutycycle) {
-	i2c_set_dutycycle(_i2c, dutycycle);
+void I2c::set_dutycycle(FastModeDuty dutycycle)
+{
+    i2c_set_dutycycle(_i2c, dutycycle);
 }
 
-void I2c::set_own_7bit_slave_address(uint8_t slave) {
-	i2c_set_own_7bit_slave_address(_i2c, slave);
+void I2c::set_own_7bit_slave_address(uint8_t slave)
+{
+    i2c_set_own_7bit_slave_address(_i2c, slave);
 }
 
-void I2c::set_own_10bit_slave_address(uint16_t slave) {
-	i2c_set_own_10bit_slave_address(_i2c, slave);
+void I2c::set_own_10bit_slave_address(uint16_t slave)
+{
+    i2c_set_own_10bit_slave_address(_i2c, slave);
 }
 
-void I2c::set_own_7bit_slave_address_two(uint8_t slave) {
-	i2c_set_own_7bit_slave_address_two(_i2c, slave);
+void I2c::set_own_7bit_slave_address_two(uint8_t slave)
+{
+    i2c_set_own_7bit_slave_address_two(_i2c, slave);
 }
 
-void I2c::enable_dual_addressing_mode() {
-	i2c_enable_dual_addressing_mode(_i2c);
+void I2c::enable_dual_addressing_mode()
+{
+    i2c_enable_dual_addressing_mode(_i2c);
 }
 
-void I2c::disable_dual_addressing_mode() {
-	i2c_disable_dual_addressing_mode(_i2c);
+void I2c::disable_dual_addressing_mode()
+{
+    i2c_disable_dual_addressing_mode(_i2c);
 }
 
 void I2c::enable_interrupt(Interrupt interrupt)
 {
-	switch (interrupt)
-	{
-		case IT_BUFFER :
-			i2c_enable_interrupt(_i2c, I2C_CR2_ITBUFEN);
-			break;
-		case IT_EVENT  :
-			i2c_enable_interrupt(_i2c, I2C_CR2_ITEVTEN);
-			break;
-		case IT_ERROR  :
-			i2c_enable_interrupt(_i2c, I2C_CR2_ITERREN);
-			break;
-	}
+    switch (interrupt) {
+        case IT_BUFFER:
+            i2c_enable_interrupt(_i2c, I2C_CR2_ITBUFEN);
+            break;
+        case IT_EVENT:
+            i2c_enable_interrupt(_i2c, I2C_CR2_ITEVTEN);
+            break;
+        case IT_ERROR:
+            i2c_enable_interrupt(_i2c, I2C_CR2_ITERREN);
+            break;
+    }
 }
 
 void I2c::disable_interrupt(Interrupt interrupt)
 {
-	switch (interrupt)
-	{
-		case IT_BUFFER :
-			i2c_disable_interrupt(_i2c, I2C_CR2_ITBUFEN);
-			break;
-		case IT_EVENT  :
-			i2c_disable_interrupt(_i2c, I2C_CR2_ITEVTEN);
-			break;
-		case IT_ERROR  :
-			i2c_disable_interrupt(_i2c, I2C_CR2_ITERREN);
-			break;
-	}
+    switch (interrupt) {
+        case IT_BUFFER:
+            i2c_disable_interrupt(_i2c, I2C_CR2_ITBUFEN);
+            break;
+        case IT_EVENT:
+            i2c_disable_interrupt(_i2c, I2C_CR2_ITEVTEN);
+            break;
+        case IT_ERROR:
+            i2c_disable_interrupt(_i2c, I2C_CR2_ITERREN);
+            break;
+    }
 }
 
 auto I2c::master_transfer(MasterTransferCfg cfg) -> Result
 {
-	uint32_t reg __attribute__((unused));
-	Result result = OK;
-
-	_counter_ms->start();
-
-	_send_start();
-	while (_get_flag_status(MASTER_MODE_SELECTED) == Result::ERROR)
-	{
-		if(_counter_ms->timeout()) {
-			result = TIMEOUT;
-		    break;
-		}
-	}
-
-	_send_7bit_address(cfg.device_address, WRITE);
-	while (_get_flag_status(MASTER_TRANSMITTER_MODE_SELECTED) == Result::ERROR)
-	{
-		if(_counter_ms->timeout()) {
-			result = TIMEOUT;
-		   break;
-		}
-	}
+    uint32_t reg __attribute__((unused));
+    Result result = OK;
+
+    _counter_ms->start();
+
+    _send_start();
+    while (_get_flag_status(MASTER_MODE_SELECTED) == Result::ERROR) {
+        if (_counter_ms->timeout()) {
+            result = TIMEOUT;
+            break;
+        }
+    }
+
+    _send_7bit_address(cfg.device_address, WRITE);
+    while (_get_flag_status(MASTER_TRANSMITTER_MODE_SELECTED) ==
+           Result::ERROR) {
+        if (_counter_ms->timeout()) {
+            result = TIMEOUT;
+            break;
+        }
+    }
 
     uint8_t index = 0;
 
-    while(cfg.write_len > 0)
-    {
-    	_send_data(cfg.write_buf[index]);
+    while (cfg.write_len > 0) {
+        _send_data(cfg.write_buf[index]);
 
-    	while (_get_flag_status(MASTER_BYTE_TRANSMITTED) == Result::ERROR)
-    	{
-    		if(_counter_ms->timeout()) {
-    			result = TIMEOUT;
-    			break;
-    		}
-    	}
+        while (_get_flag_status(MASTER_BYTE_TRANSMITTED) == Result::ERROR) {
+            if (_counter_ms->timeout()) {
+                result = TIMEOUT;
+                break;
+            }
+        }
 
-    	cfg.write_len--;
+        cfg.write_len--;
         index++;
     }
 
-    if(cfg.read_len != 0) {
-    	_send_start();
-    	while (_get_flag_status(MASTER_MODE_SELECTED) == Result::ERROR)
-    	{
-    		if(_counter_ms->timeout()) {
-    			result = TIMEOUT;
-    			break;
-    		}
-    	}
-
-    	_enable_ack();
-
-    	_send_7bit_address(cfg.device_address, READ);
-    	while (_get_flag_status(MASTER_RECEIVER_MODE_SELECTED) == Result::ERROR)
-    	{
-    		if(_counter_ms->timeout()) {
-    			result = TIMEOUT;
-    			break;
-    		}
-    	}
-
-    	uint8_t size_to_read = cfg.read_len;
-    	index = 0;
-
-    	while (size_to_read > 0)
-    	{
-    		size_to_read--;
-    		if (!size_to_read)
-    			_disable_ack();
-    		while (_get_flag_status(MASTER_BYTE_RECEIVED) == Result::ERROR)
-    		{
-    			if(_counter_ms->timeout()) {
-    				result = TIMEOUT;
-    				break;
-    			}
-    		}
-
-    		uint8_t data = _get_data();
-    		cfg.read_buf[index] = data;
-    		index++;
-    	}
+    if (cfg.read_len != 0) {
+        _send_start();
+        while (_get_flag_status(MASTER_MODE_SELECTED) == Result::ERROR) {
+            if (_counter_ms->timeout()) {
+                result = TIMEOUT;
+                break;
+            }
+        }
+
+        _enable_ack();
+
+        _send_7bit_address(cfg.device_address, READ);
+        while (_get_flag_status(MASTER_RECEIVER_MODE_SELECTED) ==
+               Result::ERROR) {
+            if (_counter_ms->timeout()) {
+                result = TIMEOUT;
+                break;
+            }
+        }
+
+        uint8_t size_to_read = cfg.read_len;
+        index = 0;
+
+        while (size_to_read > 0) {
+            size_to_read--;
+            if (!size_to_read)
+                _disable_ack();
+            while (_get_flag_status(MASTER_BYTE_RECEIVED) == Result::ERROR) {
+                if (_counter_ms->timeout()) {
+                    result = TIMEOUT;
+                    break;
+                }
+            }
+
+            uint8_t data = _get_data();
+            cfg.read_buf[index] = data;
+            index++;
+        }
     }
 
     _send_stop();
@@ -249,92 +257,99 @@ auto I2c::master_transfer(MasterTransferCfg cfg) -> Result
     return result;
 }
 
-void I2c::_send_start() {
-	i2c_send_start(_i2c);
+void I2c::_send_start()
+{
+    i2c_send_start(_i2c);
 }
 
-void I2c::_send_stop() {
-	i2c_send_stop(_i2c);
+void I2c::_send_stop()
+{
+    i2c_send_stop(_i2c);
 }
 
-void I2c::_clear_stop() {
-	i2c_clear_stop(_i2c);
+void I2c::_clear_stop()
+{
+    i2c_clear_stop(_i2c);
 }
 
-void I2c::_send_data(uint8_t data) {
-	i2c_send_data(_i2c, data);
+void I2c::_send_data(uint8_t data)
+{
+    i2c_send_data(_i2c, data);
 }
 
-uint8_t I2c::_get_data() {
-	return i2c_get_data(_i2c);
+uint8_t I2c::_get_data()
+{
+    return i2c_get_data(_i2c);
 }
 
-void I2c::_send_7bit_address(uint8_t slave, Command readwrite) {
-	i2c_send_7bit_address(_i2c, slave, readwrite);
+void I2c::_send_7bit_address(uint8_t slave, Command readwrite)
+{
+    i2c_send_7bit_address(_i2c, slave, readwrite);
 }
 
-void I2c::_enable_ack() {
-	i2c_enable_ack(_i2c);
+void I2c::_enable_ack()
+{
+    i2c_enable_ack(_i2c);
 }
 
-void I2c::_disable_ack() {
-	i2c_disable_ack(_i2c);
+void I2c::_disable_ack()
+{
+    i2c_disable_ack(_i2c);
 }
 
 auto I2c::_get_flag_status(Event event) -> Result
 {
-	Result result = ERROR;
-	uint32_t reg_sr1 = I2C_SR1(_i2c);
-	uint32_t reg_sr2 = (I2C_SR2(_i2c)) << 16;
-	uint32_t lastevent = (reg_sr1 | reg_sr2) & I2C_FLAG_MASK;
-
-	switch (event)
-	{
-		case MASTER_MODE_SELECTED			       :
-			if ((lastevent & MASTER_MODE_SELECTED_MASK) ==
-							 MASTER_MODE_SELECTED_MASK) {
-				result = OK;
-			}
-			break;
-		case MASTER_TRANSMITTER_MODE_SELECTED  :
-			if ((lastevent & MASTER_TRANSMITTER_MODE_SELECTED_MASK) ==
-							 MASTER_TRANSMITTER_MODE_SELECTED_MASK) {
-				result = OK;
-			}
-			break;
-		case MASTER_RECEIVER_MODE_SELECTED     :
-			if ((lastevent & MASTER_RECEIVER_MODE_SELECTED_MASK) ==
-							 MASTER_RECEIVER_MODE_SELECTED_MASK) {
-				result = OK;
-			}
-			break;
-		case MASTER_MODE_ADDRESS10	           :
-			if ((lastevent & MASTER_MODE_ADDRESS10_MASK) ==
-							 MASTER_MODE_ADDRESS10_MASK) {
-				result = OK;
-			}
-			break;
-		case MASTER_BYTE_RECEIVED              :
-			if ((lastevent & MASTER_BYTE_RECEIVED_MASK) ==
-							 MASTER_BYTE_RECEIVED_MASK) {
-				result = OK;
-			}
-			break;
-		case MASTER_BYTE_TRANSMITTING          :
-			if ((lastevent & MASTER_BYTE_TRANSMITTING_MASK) ==
-							MASTER_BYTE_TRANSMITTING_MASK) {
-				result = OK;
-			}
-			break;
-		case MASTER_BYTE_TRANSMITTED           :
-			if ((lastevent & MASTER_BYTE_TRANSMITTED_MASK) ==
-							 MASTER_BYTE_TRANSMITTED_MASK) {
-				result = OK;
-			}
-			break;
-	}
-
-	return result;
+    Result result = ERROR;
+    uint32_t reg_sr1 = I2C_SR1(_i2c);
+    uint32_t reg_sr2 = (I2C_SR2(_i2c)) << 16;
+    uint32_t lastevent = (reg_sr1 | reg_sr2) & I2C_FLAG_MASK;
+
+    switch (event) {
+        case MASTER_MODE_SELECTED:
+            if ((lastevent & MASTER_MODE_SELECTED_MASK) ==
+                MASTER_MODE_SELECTED_MASK) {
+                result = OK;
+            }
+            break;
+        case MASTER_TRANSMITTER_MODE_SELECTED:
+            if ((lastevent & MASTER_TRANSMITTER_MODE_SELECTED_MASK) ==
+                MASTER_TRANSMITTER_MODE_SELECTED_MASK) {
+                result = OK;
+            }
+            break;
+        case MASTER_RECEIVER_MODE_SELECTED:
+            if ((lastevent & MASTER_RECEIVER_MODE_SELECTED_MASK) ==
+                MASTER_RECEIVER_MODE_SELECTED_MASK) {
+                result = OK;
+            }
+            break;
+        case MASTER_MODE_ADDRESS10:
+            if ((lastevent & MASTER_MODE_ADDRESS10_MASK) ==
+                MASTER_MODE_ADDRESS10_MASK) {
+                result = OK;
+            }
+            break;
+        case MASTER_BYTE_RECEIVED:
+            if ((lastevent & MASTER_BYTE_RECEIVED_MASK) ==
+                MASTER_BYTE_RECEIVED_MASK) {
+                result = OK;
+            }
+            break;
+        case MASTER_BYTE_TRANSMITTING:
+            if ((lastevent & MASTER_BYTE_TRANSMITTING_MASK) ==
+                MASTER_BYTE_TRANSMITTING_MASK) {
+                result = OK;
+            }
+            break;
+        case MASTER_BYTE_TRANSMITTED:
+            if ((lastevent & MASTER_BYTE_TRANSMITTED_MASK) ==
+                MASTER_BYTE_TRANSMITTED_MASK) {
+                result = OK;
+            }
+            break;
+    }
+
+    return result;
 }
 
 }  // namespace i2c
diff --git a/cm3cpp_i2c.h b/cm3cpp_i2c.h
index 49cb775..c2b4f35 100644
--- a/cm3cpp_i2c.h
+++ b/cm3cpp_i2c.h
@@ -19,15 +19,15 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/* 
-I2C C++ Wrapper of libopencm3 library for STM32F2, STM32F4 
+/*
+I2C C++ Wrapper of libopencm3 library for STM32F2, STM32F4
 */
 
 #ifndef I2C_EXT_H
 #define I2C_EXT_H
 
-#include <libopencm3/stm32/i2c.h>
 #include <cm3cpp_config.h>
+#include <libopencm3/stm32/i2c.h>
 
 #include "cm3cpp_gpio.h"
 #include "private/assert.h"
@@ -40,172 +40,180 @@ namespace i2c {
 
 class I2c
 {
-public:
-	using Gpio = gpio::Gpio;
-
-	enum Mode {
-		STANDARD = 0,
-		FAST
-	};
-
-	enum FastModeDuty {
-		DUTY_DIV2 = 0,
-		DUTY_16_DIV_9
-	};
-
-	enum AddressMode {
-		ADDRESS_MODE_7BIT  = 0,
-		ADDRESS_MODE_10BIT = 1
-	};
-
-	enum Command {
-		WRITE = 0,
-		READ  = 1
-	};
-
-	enum Event {
-		MASTER_MODE_SELECTED,
-		MASTER_TRANSMITTER_MODE_SELECTED,
-		MASTER_RECEIVER_MODE_SELECTED,
-		MASTER_MODE_ADDRESS10,
-		MASTER_BYTE_RECEIVED,
-		MASTER_BYTE_TRANSMITTING,
-		MASTER_BYTE_TRANSMITTED
-	};
-
-	enum TransferStatus {
-		MASTER_MODE_SELECTED_ERROR,
-		MASTER_TRANSMITTER_MODE_SELECTED_ERROR,
-		MASTER_RECEIVER_MODE_SELECTED_ERROR,
-		MASTER_MODE_ADDRESS10_ERROR,
-		MASTER_BYTE_RECEIVED_ERROR,
-		MASTER_BYTE_TRANSMITTING_ERROR,
-		MASTER_BYTE_TRANSMITTED_ERROR,
-		SUCCESS
-	};
-
-	enum Interrupt {
-		IT_BUFFER,
-		IT_EVENT,
-		IT_ERROR
-	};
-
-	enum ClockFrequency {
-		FREQ_2MHZ	=	0x02,
-		FREQ_3MHZ	=	0x03,
-		FREQ_4MHZ	=	0x04,
-		FREQ_5MHZ	=	0x05,
-		FREQ_6MHZ	=	0x06,
-		FREQ_7MHZ	=	0x07,
-		FREQ_8MHZ	=	0x08,
-		FREQ_9MHZ	=	0x09,
-		FREQ_10MHZ	=	0x0a,
-		FREQ_11MHZ	=	0x0b,
-		FREQ_12MHZ	=	0x0c,
-		FREQ_13MHZ	=	0x0d,
-		FREQ_14MHZ	=	0x0e,
-		FREQ_15MHZ	=	0x0f,
-		FREQ_16MHZ	=	0x10,
-		FREQ_17MHZ	=	0x11,
-		FREQ_18MHZ	=	0x12,
-		FREQ_19MHZ	=	0x13,
-		FREQ_20MHZ	=	0x14,
-		FREQ_21MHZ	=	0x15,
-		FREQ_22MHZ	=	0x16,
-		FREQ_23MHZ	=	0x17,
-		FREQ_24MHZ	=	0x18,
-		FREQ_25MHZ	=	0x19,
-		FREQ_26MHZ	=	0x1a,
-		FREQ_27MHZ	=	0x1b,
-		FREQ_28MHZ	=	0x1c,
-		FREQ_29MHZ	=	0x1d,
-		FREQ_30MHZ	=	0x1e,
-		FREQ_31MHZ	=	0x1f,
-		FREQ_32MHZ	=	0x20,
-		FREQ_33MHZ	=	0x21,
-		FREQ_34MHZ	=	0x22,
-		FREQ_35MHZ	=	0x23,
-		FREQ_36MHZ	=	0x24,
-		FREQ_37MHZ	=	0x25,
-		FREQ_38MHZ	=	0x26,
-		FREQ_39MHZ	=	0x27,
-		FREQ_40MHZ	=	0x28,
-		FREQ_41MHZ	=	0x29,
-		FREQ_42MHZ	=	0x2a
-	};
-
-	struct Config
-	{
-		uint8_t number;
-		Gpio::Pinout scl_pin;
-		Gpio::Pinout sda_pin;
-	};
-
-	struct MasterTransferCfg
-	{
-		uint16_t device_address;
-		uint8_t* write_buf;
-		uint8_t write_len;
-		uint8_t read_len;
-		uint8_t* read_buf;
-	};
-
-	enum Result
-	{
-		OK,
-		ERROR,
-		TIMEOUT,
-	};
-
-	I2c(Config i2c_conf);
-	CM3CPP_EXPLISIT_DESTRUCTOR(I2c)
-
-	void reset();
-	void enable();
-	void disable();
-	void set_clock_frequency(ClockFrequency freq);
-	void set_ccr(uint16_t freq);
-	void set_trise(uint16_t trise);
-	void set_mode(Mode mode);
-	void set_address_mode(AddressMode mode);
-	void set_dutycycle(FastModeDuty dutycycle);
-	void set_own_7bit_slave_address(uint8_t slave);
-	void set_own_10bit_slave_address(uint16_t slave);
-	void set_own_7bit_slave_address_two(uint8_t slave);
-	void enable_dual_addressing_mode();
-	void disable_dual_addressing_mode();
-	void enable_interrupt(Interrupt interrupt);
-	void disable_interrupt(Interrupt interrupt);
-	Result master_transfer(MasterTransferCfg cfg);
-
-private:
-	static constexpr uint8_t MAX_TRANSMIT_TIME_MS        			     = 3;
-	static constexpr uint32_t I2C_FLAG_MASK               			     = 0x00FFFFFF;
-	static constexpr uint32_t MASTER_MODE_SELECTED_MASK  		    	 = 0x00030001;
-	static constexpr uint32_t MASTER_TRANSMITTER_MODE_SELECTED_MASK      = 0x00070082;
-	static constexpr uint32_t MASTER_RECEIVER_MODE_SELECTED_MASK         = 0x00030002;
-	static constexpr uint32_t MASTER_MODE_ADDRESS10_MASK                 = 0x00030008;
-	static constexpr uint32_t MASTER_BYTE_RECEIVED_MASK                  = 0x00030040;
-	static constexpr uint32_t MASTER_BYTE_TRANSMITTING_MASK              = 0x00070080;
-	static constexpr uint32_t MASTER_BYTE_TRANSMITTED_MASK               = 0x00070084;
-
-	uint32_t _i2c;
-	Config _config;
-
-	systick::Counter *_counter_ms;
-
-	void _send_start();
-	void _send_stop();
-	void _clear_stop();
-	void _send_data(uint8_t data);
-	uint8_t _get_data();
-	void _send_7bit_address(uint8_t slave, Command readwrite);
-	void _enable_ack();
-	void _disable_ack();
-	Result _get_flag_status(Event event);
+ public:
+    using Gpio = gpio::Gpio;
+
+    enum Mode
+    {
+        STANDARD = 0,
+        FAST
+    };
+
+    enum FastModeDuty
+    {
+        DUTY_DIV2 = 0,
+        DUTY_16_DIV_9
+    };
+
+    enum AddressMode
+    {
+        ADDRESS_MODE_7BIT = 0,
+        ADDRESS_MODE_10BIT = 1
+    };
+
+    enum Command
+    {
+        WRITE = 0,
+        READ = 1
+    };
+
+    enum Event
+    {
+        MASTER_MODE_SELECTED,
+        MASTER_TRANSMITTER_MODE_SELECTED,
+        MASTER_RECEIVER_MODE_SELECTED,
+        MASTER_MODE_ADDRESS10,
+        MASTER_BYTE_RECEIVED,
+        MASTER_BYTE_TRANSMITTING,
+        MASTER_BYTE_TRANSMITTED
+    };
+
+    enum TransferStatus
+    {
+        MASTER_MODE_SELECTED_ERROR,
+        MASTER_TRANSMITTER_MODE_SELECTED_ERROR,
+        MASTER_RECEIVER_MODE_SELECTED_ERROR,
+        MASTER_MODE_ADDRESS10_ERROR,
+        MASTER_BYTE_RECEIVED_ERROR,
+        MASTER_BYTE_TRANSMITTING_ERROR,
+        MASTER_BYTE_TRANSMITTED_ERROR,
+        SUCCESS
+    };
+
+    enum Interrupt
+    {
+        IT_BUFFER,
+        IT_EVENT,
+        IT_ERROR
+    };
+
+    enum ClockFrequency
+    {
+        FREQ_2MHZ = 0x02,
+        FREQ_3MHZ = 0x03,
+        FREQ_4MHZ = 0x04,
+        FREQ_5MHZ = 0x05,
+        FREQ_6MHZ = 0x06,
+        FREQ_7MHZ = 0x07,
+        FREQ_8MHZ = 0x08,
+        FREQ_9MHZ = 0x09,
+        FREQ_10MHZ = 0x0a,
+        FREQ_11MHZ = 0x0b,
+        FREQ_12MHZ = 0x0c,
+        FREQ_13MHZ = 0x0d,
+        FREQ_14MHZ = 0x0e,
+        FREQ_15MHZ = 0x0f,
+        FREQ_16MHZ = 0x10,
+        FREQ_17MHZ = 0x11,
+        FREQ_18MHZ = 0x12,
+        FREQ_19MHZ = 0x13,
+        FREQ_20MHZ = 0x14,
+        FREQ_21MHZ = 0x15,
+        FREQ_22MHZ = 0x16,
+        FREQ_23MHZ = 0x17,
+        FREQ_24MHZ = 0x18,
+        FREQ_25MHZ = 0x19,
+        FREQ_26MHZ = 0x1a,
+        FREQ_27MHZ = 0x1b,
+        FREQ_28MHZ = 0x1c,
+        FREQ_29MHZ = 0x1d,
+        FREQ_30MHZ = 0x1e,
+        FREQ_31MHZ = 0x1f,
+        FREQ_32MHZ = 0x20,
+        FREQ_33MHZ = 0x21,
+        FREQ_34MHZ = 0x22,
+        FREQ_35MHZ = 0x23,
+        FREQ_36MHZ = 0x24,
+        FREQ_37MHZ = 0x25,
+        FREQ_38MHZ = 0x26,
+        FREQ_39MHZ = 0x27,
+        FREQ_40MHZ = 0x28,
+        FREQ_41MHZ = 0x29,
+        FREQ_42MHZ = 0x2a
+    };
+
+    struct Config
+    {
+        uint8_t number;
+        Gpio::Pinout scl_pin;
+        Gpio::Pinout sda_pin;
+    };
+
+    struct MasterTransferCfg
+    {
+        uint16_t device_address;
+        uint8_t* write_buf;
+        uint8_t write_len;
+        uint8_t read_len;
+        uint8_t* read_buf;
+    };
+
+    enum Result
+    {
+        OK,
+        ERROR,
+        TIMEOUT,
+    };
+
+    I2c(Config i2c_conf);
+    CM3CPP_EXPLISIT_DESTRUCTOR(I2c)
+
+    void reset();
+    void enable();
+    void disable();
+    void set_clock_frequency(ClockFrequency freq);
+    void set_ccr(uint16_t freq);
+    void set_trise(uint16_t trise);
+    void set_mode(Mode mode);
+    void set_address_mode(AddressMode mode);
+    void set_dutycycle(FastModeDuty dutycycle);
+    void set_own_7bit_slave_address(uint8_t slave);
+    void set_own_10bit_slave_address(uint16_t slave);
+    void set_own_7bit_slave_address_two(uint8_t slave);
+    void enable_dual_addressing_mode();
+    void disable_dual_addressing_mode();
+    void enable_interrupt(Interrupt interrupt);
+    void disable_interrupt(Interrupt interrupt);
+    Result master_transfer(MasterTransferCfg cfg);
+
+ private:
+    static constexpr uint8_t MAX_TRANSMIT_TIME_MS = 3;
+    static constexpr uint32_t I2C_FLAG_MASK = 0x00FFFFFF;
+    static constexpr uint32_t MASTER_MODE_SELECTED_MASK = 0x00030001;
+    static constexpr uint32_t MASTER_TRANSMITTER_MODE_SELECTED_MASK =
+      0x00070082;
+    static constexpr uint32_t MASTER_RECEIVER_MODE_SELECTED_MASK = 0x00030002;
+    static constexpr uint32_t MASTER_MODE_ADDRESS10_MASK = 0x00030008;
+    static constexpr uint32_t MASTER_BYTE_RECEIVED_MASK = 0x00030040;
+    static constexpr uint32_t MASTER_BYTE_TRANSMITTING_MASK = 0x00070080;
+    static constexpr uint32_t MASTER_BYTE_TRANSMITTED_MASK = 0x00070084;
+
+    uint32_t _i2c;
+    Config _config;
+
+    systick::Counter* _counter_ms;
+
+    void _send_start();
+    void _send_stop();
+    void _clear_stop();
+    void _send_data(uint8_t data);
+    uint8_t _get_data();
+    void _send_7bit_address(uint8_t slave, Command readwrite);
+    void _enable_ack();
+    void _disable_ack();
+    Result _get_flag_status(Event event);
 };
 
-
 }  // namespace i2c
 
 }  // namespace cm3cpp
diff --git a/cm3cpp_spi.cpp b/cm3cpp_spi.cpp
index eb71a63..39eed40 100644
--- a/cm3cpp_spi.cpp
+++ b/cm3cpp_spi.cpp
@@ -20,8 +20,8 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/* 
-SPI C++ Wrapper of libopencm3 library for STM32F2, STM32F4 
+/*
+SPI C++ Wrapper of libopencm3 library for STM32F2, STM32F4
 */
 
 #include "cm3cpp_spi.h"
@@ -32,154 +32,149 @@ namespace spi {
 
 Spi::Spi(Config spi_conf)
 {
-	switch(spi_conf.spi_number)
-	{
-		case 1:
-		    _spi = SPI1;
-		    _irq = Interrupt::ISR_SPI1;
-		break;
-		case 2:
+    switch (spi_conf.spi_number) {
+        case 1:
+            _spi = SPI1;
+            _irq = Interrupt::ISR_SPI1;
+            break;
+        case 2:
             _spi = SPI2;
             _irq = Interrupt::ISR_SPI2;
-		break;
+            break;
         case 3:
             _spi = SPI3;
             _irq = Interrupt::ISR_SPI3;
-        break;
-		default: break;
-	}
-
-	this->register_isr(_irq, this);
-
-	Gpio mosi(spi_conf.mosi_pin);
-	mosi.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);
-	mosi.set_output_options(Gpio::OutputType::PUSH_PULL, Gpio::Speed::HIGH_SPEED_100MHz);
-
-	Gpio miso(spi_conf.miso_pin);
-	miso.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);
-	miso.set_output_options(Gpio::OutputType::PUSH_PULL, Gpio::Speed::HIGH_SPEED_100MHz);
-
-	Gpio scl(spi_conf.scl_pin);
-	scl.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);
-	scl.set_output_options(Gpio::OutputType::PUSH_PULL, Gpio::Speed::HIGH_SPEED_100MHz);
-
-	switch(_spi)
-	{
-		case SPI1:
-		case SPI2:
-			mosi.set_af(Gpio::AltFuncNumber::AF5);
-			miso.set_af(Gpio::AltFuncNumber::AF5);
-			scl.set_af(Gpio::AltFuncNumber::AF5);
-			break;
-
-		case SPI3 :
-			mosi.set_af(Gpio::AltFuncNumber::AF6);
-			miso.set_af(Gpio::AltFuncNumber::AF6);
-			scl.set_af(Gpio::AltFuncNumber::AF6);
-			break;
-
-		default: break;
-	}
+            break;
+        default:
+            break;
+    }
+
+    this->register_isr(_irq, this);
+
+    Gpio mosi(spi_conf.mosi_pin);
+    mosi.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);
+    mosi.set_output_options(Gpio::OutputType::PUSH_PULL,
+                            Gpio::Speed::HIGH_SPEED_100MHz);
+
+    Gpio miso(spi_conf.miso_pin);
+    miso.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);
+    miso.set_output_options(Gpio::OutputType::PUSH_PULL,
+                            Gpio::Speed::HIGH_SPEED_100MHz);
+
+    Gpio scl(spi_conf.scl_pin);
+    scl.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);
+    scl.set_output_options(Gpio::OutputType::PUSH_PULL,
+                           Gpio::Speed::HIGH_SPEED_100MHz);
+
+    switch (_spi) {
+        case SPI1:
+        case SPI2:
+            mosi.set_af(Gpio::AltFuncNumber::AF5);
+            miso.set_af(Gpio::AltFuncNumber::AF5);
+            scl.set_af(Gpio::AltFuncNumber::AF5);
+            break;
+
+        case SPI3:
+            mosi.set_af(Gpio::AltFuncNumber::AF6);
+            miso.set_af(Gpio::AltFuncNumber::AF6);
+            scl.set_af(Gpio::AltFuncNumber::AF6);
+            break;
+
+        default:
+            break;
+    }
 }
 
 void Spi::set_next_tx_from(NextTx next)
 {
-	switch(next)
-	{
-		case NEXT_TX_FROM_BUFFER :
-			spi_set_next_tx_from_buffer(_spi);
-			break;
-		case NEXT_TX_FROM_CRC :
-			spi_set_next_tx_from_crc(_spi);
-			break;
-	}
+    switch (next) {
+        case NEXT_TX_FROM_BUFFER:
+            spi_set_next_tx_from_buffer(_spi);
+            break;
+        case NEXT_TX_FROM_CRC:
+            spi_set_next_tx_from_crc(_spi);
+            break;
+    }
 }
 
 void Spi::set_data_drame_format(DataFrameFormat dff)
 {
-	switch(dff)
-	{
-		case DFF_8BIT :
-			spi_set_dff_8bit(_spi);
-			break;
-		case DFF_16BIT :
-			spi_set_dff_16bit(_spi);
-			break;
-
-	}
+    switch (dff) {
+        case DFF_8BIT:
+            spi_set_dff_8bit(_spi);
+            break;
+        case DFF_16BIT:
+            spi_set_dff_16bit(_spi);
+            break;
+    }
 }
 
 void Spi::set_software_slave_management(State state)
 {
-	switch(state)
-	{
-		case DISABLE :
-			spi_disable_software_slave_management(_spi);
-			break;
-		case ENABLE :
-			spi_enable_software_slave_management(_spi);
-			break;
-	}
+    switch (state) {
+        case DISABLE:
+            spi_disable_software_slave_management(_spi);
+            break;
+        case ENABLE:
+            spi_enable_software_slave_management(_spi);
+            break;
+    }
 }
 
 void Spi::set_nss(NssState nss)
 {
-	switch(nss)
-	{
-		case LOW :
-			spi_set_nss_low(_spi);
-			break;
-		case HIGH :
-			spi_set_nss_high(_spi);
-			break;
-	}
+    switch (nss) {
+        case LOW:
+            spi_set_nss_low(_spi);
+            break;
+        case HIGH:
+            spi_set_nss_high(_spi);
+            break;
+    }
 }
 
 void Spi::set_bit_position(BitPos pos)
 {
-	switch(pos)
-	{
-		case MSB_FIRST :
+    switch (pos) {
+        case MSB_FIRST:
             spi_send_msb_first(_spi);
             break;
-		case LSB_FIRST :
-			spi_send_lsb_first(_spi);
-			break;
-	}
+        case LSB_FIRST:
+            spi_send_lsb_first(_spi);
+            break;
+    }
 }
 
 void Spi::set_clock_polarity(Polarity polarity)
 {
-	switch(polarity)
-	{
-		case POLARITY_LOW :
-			spi_set_clock_polarity_0(_spi);
-			break;
-		case POLARITY_HIGH :
-			spi_set_clock_polarity_1(_spi);
-			break;
-	}
+    switch (polarity) {
+        case POLARITY_LOW:
+            spi_set_clock_polarity_0(_spi);
+            break;
+        case POLARITY_HIGH:
+            spi_set_clock_polarity_1(_spi);
+            break;
+    }
 }
 
 void Spi::set_clock_phase(Phase phase)
 {
-	switch(phase)
-	{
-		case PHASE_LOW :
-			spi_set_clock_phase_0(_spi);
-			break;
-		case PHASE_HIGH :
-			spi_set_clock_phase_1(_spi);
-			break;
-	}
+    switch (phase) {
+        case PHASE_LOW:
+            spi_set_clock_phase_0(_spi);
+            break;
+        case PHASE_HIGH:
+            spi_set_clock_phase_1(_spi);
+            break;
+    }
 }
 
 bool Spi::get_flag_status(Flag flag) const
 {
-	const uint32_t reg_sr = SPI_SR(_spi);
-	const uint32_t flag_state = reg_sr & static_cast<uint32_t>(flag);
+    const uint32_t reg_sr = SPI_SR(_spi);
+    const uint32_t flag_state = reg_sr & static_cast<uint32_t>(flag);
 
-	return flag == static_cast<Flag>(flag_state);
+    return flag == static_cast<Flag>(flag_state);
 }
 
 inline void Spi::enable_nvic()
@@ -187,10 +182,8 @@ inline void Spi::enable_nvic()
     nvic_enable_irq(static_cast<uint8_t>(_irq));
 }
 
-void Spi::call()
-{ }
-
+void Spi::call() {}
 
-} // namespace spi
+}  // namespace spi
 
-} // namespace cm3cpp
+}  // namespace cm3cpp
diff --git a/cm3cpp_spi.h b/cm3cpp_spi.h
index 31d3dd0..69e2a48 100644
--- a/cm3cpp_spi.h
+++ b/cm3cpp_spi.h
@@ -20,15 +20,15 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/* 
-SPI C++ Wrapper of libopencm3 library for STM32F2, STM32F4 
+/*
+SPI C++ Wrapper of libopencm3 library for STM32F2, STM32F4
 */
 
 #ifndef SPI_EXT_H
 #define SPI_EXT_H
 
-#include <libopencm3/stm32/spi.h>
 #include <cm3cpp_config.h>
+#include <libopencm3/stm32/spi.h>
 
 #include "cm3cpp_gpio.h"
 #include "irq/cm3cpp_irq.h"
@@ -37,243 +37,223 @@ namespace cm3cpp {
 
 namespace spi {
 
-constexpr bool OK									= true;
-constexpr bool ERROR       							= false;
-
-enum Flag : uint32_t {
-	RECEIVE_BUFFER_NOT_EMPTY = 0x0001,
-	TRANSMIT_BUFFER_EMPTY    = 0x0002,
-	CHANEL_SIDE              = 0x0004,
-	UNDERRUN_FLAG            = 0x0008,
-	CRC_ERROR                = 0x0010,
-	MODE_FAULT               = 0x0020,
-	OVERRUN_FLAG             = 0x0040,
-	BUSY_FLAG                = 0x0080,
-	TI_FRAME_FORMAT_ERROR    = 0x0100,
+constexpr bool OK = true;
+constexpr bool ERROR = false;
+
+enum Flag : uint32_t
+{
+    RECEIVE_BUFFER_NOT_EMPTY = 0x0001,
+    TRANSMIT_BUFFER_EMPTY = 0x0002,
+    CHANEL_SIDE = 0x0004,
+    UNDERRUN_FLAG = 0x0008,
+    CRC_ERROR = 0x0010,
+    MODE_FAULT = 0x0020,
+    OVERRUN_FLAG = 0x0040,
+    BUSY_FLAG = 0x0080,
+    TI_FRAME_FORMAT_ERROR = 0x0100,
 };
 
-enum BaudRate : uint8_t {
-	BAUDRATE_FPCLK_DIV_2   = 0x00,
-	BAUDRATE_FPCLK_DIV_4   = 0x01,
-	BAUDRATE_FPCLK_DIV_8   = 0x02,
-	BAUDRATE_FPCLK_DIV_16  = 0x03,
-	BAUDRATE_FPCLK_DIV_32  = 0x04,
-	BAUDRATE_FPCLK_DIV_64  = 0x05,
-	BAUDRATE_FPCLK_DIV_128 = 0x06,
-	BAUDRATE_FPCLK_DIV_256 = 0x07,
+enum BaudRate : uint8_t
+{
+    BAUDRATE_FPCLK_DIV_2 = 0x00,
+    BAUDRATE_FPCLK_DIV_4 = 0x01,
+    BAUDRATE_FPCLK_DIV_8 = 0x02,
+    BAUDRATE_FPCLK_DIV_16 = 0x03,
+    BAUDRATE_FPCLK_DIV_32 = 0x04,
+    BAUDRATE_FPCLK_DIV_64 = 0x05,
+    BAUDRATE_FPCLK_DIV_128 = 0x06,
+    BAUDRATE_FPCLK_DIV_256 = 0x07,
 };
 
-enum NextTx {
-	NEXT_TX_FROM_BUFFER,
-	NEXT_TX_FROM_CRC
+enum NextTx
+{
+    NEXT_TX_FROM_BUFFER,
+    NEXT_TX_FROM_CRC
 };
 
-enum DataFrameFormat {
-	DFF_8BIT,
-	DFF_16BIT
+enum DataFrameFormat
+{
+    DFF_8BIT,
+    DFF_16BIT
 };
 
-enum State {
-	DISABLE,
-	ENABLE
+enum State
+{
+    DISABLE,
+    ENABLE
 };
 
-enum NssState {
-	LOW,
-	HIGH
+enum NssState
+{
+    LOW,
+    HIGH
 };
 
-enum Polarity {
-	POLARITY_LOW,
-	POLARITY_HIGH
+enum Polarity
+{
+    POLARITY_LOW,
+    POLARITY_HIGH
 };
 
-enum Phase {
-	PHASE_LOW,
-	PHASE_HIGH
+enum Phase
+{
+    PHASE_LOW,
+    PHASE_HIGH
 };
 
-enum BitPos {
-	MSB_FIRST,
-	LSB_FIRST
+enum BitPos
+{
+    MSB_FIRST,
+    LSB_FIRST
 };
 
-enum StdMode{
-	MODE_0 = 0,
-	MODE_1,
-	MODE_2,
-	MODE_3
+enum StdMode
+{
+    MODE_0 = 0,
+    MODE_1,
+    MODE_2,
+    MODE_3
 };
 
 class Spi : public IInterruptable
 {
-public:
-	using Gpio = gpio::Gpio;
-
-	struct Config {
-		uint8_t spi_number;
-		Gpio::Pinout mosi_pin;
-		Gpio::Pinout miso_pin;
-		Gpio::Pinout scl_pin;
-	};
-
-	Spi();
-	Spi(Config spi_conf);
-
-	void call();
-
-	bool get_flag_status(Flag flag) const;
-
-	void reset() {
-		spi_reset(_spi);
-	}
-
-	void enable() {
-		spi_enable(_spi);
-	}
-
-	void disable() {
-		spi_disable(_spi);
-	}
-
-	void clean_disable() {
-		spi_clean_disable(_spi);
-	}
-
-	void write(uint16_t data)
-	{
-		while(!get_flag_status(Flag::TRANSMIT_BUFFER_EMPTY));
-		SPI_DR(_spi) = data;
-	}
-
-	void write_end()
-	{
-		while(!get_flag_status(Flag::RECEIVE_BUFFER_NOT_EMPTY));
-		(void)SPI_DR(_spi);
-	}
-
-	uint16_t read(uint16_t data)
-	{
-		while(!get_flag_status(Flag::TRANSMIT_BUFFER_EMPTY));
-		SPI_DR(_spi) = data;
-		while(!get_flag_status(Flag::RECEIVE_BUFFER_NOT_EMPTY));
-		return SPI_DR(_spi);
-	}
-
-	void set_master_mode() {
-		spi_set_master_mode(_spi);
-	}
-
-	void set_slave_mode() {
-		spi_set_slave_mode(_spi);
-	}
-
-	void full_duplex_mode() {
-		spi_set_full_duplex_mode(_spi);
-	}
-
-	void set_bidirectional_mode() {
-		spi_set_bidirectional_mode(_spi);
-	}
-
-	void set_bidirectional_transmit_only_mode() {
-		spi_set_bidirectional_transmit_only_mode(_spi);
-	}
-
-	void set_bidirectional_receive_only_mode() {
-		spi_set_bidirectional_receive_only_mode(_spi);
-	}
-
-	void set_unidirectional_mode() {
-		spi_set_unidirectional_mode(_spi);
-	}
-
-	void set_receive_only_mode() {
-		spi_set_receive_only_mode(_spi);
-	}
-
-	void enable_crc() {
-		spi_enable_crc(_spi);
-	}
-
-	void disable_crc() {
-		spi_disable_crc(_spi);
-	}
-
-	void set_next_tx_from(NextTx next);
-	void set_data_drame_format(DataFrameFormat dff);
-	void set_software_slave_management(State state);
-	void set_nss(NssState nss);
-	void set_bit_position(BitPos pos);
-
-	void set_baudrate_prescaler(BaudRate baudrate) {
-		spi_set_baudrate_prescaler(_spi, (uint8_t)baudrate);
-	}
-
-	void set_clock_polarity(Polarity polarity);
-	void set_clock_phase(Phase phase);
-
-	void enable_nvic();
-
-	void enable_tx_buffer_empty_interrupt() {
-		spi_enable_tx_buffer_empty_interrupt(_spi);
-	}
-
-	void disable_tx_buffer_empty_interrupt() {
-		spi_disable_tx_buffer_empty_interrupt(_spi);
-	}
-
-	void enable_rx_buffer_not_empty_interrupt() {
-		spi_enable_rx_buffer_not_empty_interrupt(_spi);
-	}
-
-	void disable_rx_buffer_not_empty_interrupt() {
-		spi_disable_rx_buffer_not_empty_interrupt(_spi);
-	}
-
-	void enable_error_interrupt() {
-		spi_enable_error_interrupt(_spi);
-	}
-
-	void disable_error_interrupt() {
-		spi_disable_error_interrupt(_spi);
-	}
-
-	void enable_ss_output() {
-		spi_enable_ss_output(_spi);
-	}
-
-	void disable_ss_output() {
-		spi_disable_ss_output(_spi);
-	}
-
-	void enable_tx_dma() {
-		spi_enable_tx_dma(_spi);
-	}
-
-	void disable_tx_dma() {
-		spi_disable_tx_dma(_spi);
-	}
-
-	void enable_rx_dma() {
-		spi_enable_rx_dma(_spi);
-	}
+ public:
+    using Gpio = gpio::Gpio;
+
+    struct Config
+    {
+        uint8_t spi_number;
+        Gpio::Pinout mosi_pin;
+        Gpio::Pinout miso_pin;
+        Gpio::Pinout scl_pin;
+    };
+
+    Spi();
+    Spi(Config spi_conf);
+
+    void call();
+
+    bool get_flag_status(Flag flag) const;
+
+    void reset() { spi_reset(_spi); }
+
+    void enable() { spi_enable(_spi); }
+
+    void disable() { spi_disable(_spi); }
+
+    void clean_disable() { spi_clean_disable(_spi); }
+
+    void write(uint16_t data)
+    {
+        while (!get_flag_status(Flag::TRANSMIT_BUFFER_EMPTY))
+            ;
+        SPI_DR(_spi) = data;
+    }
+
+    void write_end()
+    {
+        while (!get_flag_status(Flag::RECEIVE_BUFFER_NOT_EMPTY))
+            ;
+        (void)SPI_DR(_spi);
+    }
+
+    uint16_t read(uint16_t data)
+    {
+        while (!get_flag_status(Flag::TRANSMIT_BUFFER_EMPTY))
+            ;
+        SPI_DR(_spi) = data;
+        while (!get_flag_status(Flag::RECEIVE_BUFFER_NOT_EMPTY))
+            ;
+        return SPI_DR(_spi);
+    }
+
+    void set_master_mode() { spi_set_master_mode(_spi); }
+
+    void set_slave_mode() { spi_set_slave_mode(_spi); }
+
+    void full_duplex_mode() { spi_set_full_duplex_mode(_spi); }
+
+    void set_bidirectional_mode() { spi_set_bidirectional_mode(_spi); }
+
+    void set_bidirectional_transmit_only_mode()
+    {
+        spi_set_bidirectional_transmit_only_mode(_spi);
+    }
+
+    void set_bidirectional_receive_only_mode()
+    {
+        spi_set_bidirectional_receive_only_mode(_spi);
+    }
+
+    void set_unidirectional_mode() { spi_set_unidirectional_mode(_spi); }
+
+    void set_receive_only_mode() { spi_set_receive_only_mode(_spi); }
+
+    void enable_crc() { spi_enable_crc(_spi); }
+
+    void disable_crc() { spi_disable_crc(_spi); }
+
+    void set_next_tx_from(NextTx next);
+    void set_data_drame_format(DataFrameFormat dff);
+    void set_software_slave_management(State state);
+    void set_nss(NssState nss);
+    void set_bit_position(BitPos pos);
+
+    void set_baudrate_prescaler(BaudRate baudrate)
+    {
+        spi_set_baudrate_prescaler(_spi, (uint8_t)baudrate);
+    }
+
+    void set_clock_polarity(Polarity polarity);
+    void set_clock_phase(Phase phase);
+
+    void enable_nvic();
+
+    void enable_tx_buffer_empty_interrupt()
+    {
+        spi_enable_tx_buffer_empty_interrupt(_spi);
+    }
+
+    void disable_tx_buffer_empty_interrupt()
+    {
+        spi_disable_tx_buffer_empty_interrupt(_spi);
+    }
+
+    void enable_rx_buffer_not_empty_interrupt()
+    {
+        spi_enable_rx_buffer_not_empty_interrupt(_spi);
+    }
+
+    void disable_rx_buffer_not_empty_interrupt()
+    {
+        spi_disable_rx_buffer_not_empty_interrupt(_spi);
+    }
+
+    void enable_error_interrupt() { spi_enable_error_interrupt(_spi); }
+
+    void disable_error_interrupt() { spi_disable_error_interrupt(_spi); }
+
+    void enable_ss_output() { spi_enable_ss_output(_spi); }
+
+    void disable_ss_output() { spi_disable_ss_output(_spi); }
+
+    void enable_tx_dma() { spi_enable_tx_dma(_spi); }
+
+    void disable_tx_dma() { spi_disable_tx_dma(_spi); }
+
+    void enable_rx_dma() { spi_enable_rx_dma(_spi); }
 
-	void disable_rx_dma() {
-		spi_disable_rx_dma(_spi);
-	}
+    void disable_rx_dma() { spi_disable_rx_dma(_spi); }
 
-	void set_standard_mode(StdMode mode) {
-		spi_set_standard_mode(_spi, mode);
-	}
+    void set_standard_mode(StdMode mode) { spi_set_standard_mode(_spi, mode); }
 
-private:
-	uint32_t _spi;
-	Interrupt _irq;
+ private:
+    uint32_t _spi;
+    Interrupt _irq;
 };
 
-} // namespace spi
+}  // namespace spi
 
-} // namespace cm3cpp
+}  // namespace cm3cpp
 
 #endif
diff --git a/cm3cpp_timer.cpp b/cm3cpp_timer.cpp
index adde1f5..5fc0586 100644
--- a/cm3cpp_timer.cpp
+++ b/cm3cpp_timer.cpp
@@ -19,8 +19,8 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/* 
-TIM C++ Wrapper of libopencm3 library for STM32F2, STM32F4 
+/*
+TIM C++ Wrapper of libopencm3 library for STM32F2, STM32F4
 */
 
 #include "cm3cpp_timer.h"
@@ -29,200 +29,192 @@ namespace cm3cpp {
 
 namespace tim {
 
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
+// 1,2,3,4,5,6,7,8,9,10,11,12,13,14
 auto Timer::enable_counter() -> Result
 {
-	TIM_CR1(_timer) |= TIM_CR1_CEN;
-	return OK;
+    TIM_CR1(_timer) |= TIM_CR1_CEN;
+    return OK;
 }
 
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
+// 1,2,3,4,5,6,7,8,9,10,11,12,13,14
 auto Timer::disable_counter() -> Result
 {
-	TIM_CR1(_timer) &= ~TIM_CR1_CEN;
-	return OK;
+    TIM_CR1(_timer) &= ~TIM_CR1_CEN;
+    return OK;
 }
 
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
+// 1,2,3,4,5,6,7,8,9,10,11,12,13,14
 auto Timer::enable_update_event_generation() -> Result
 {
-	TIM_CR1(_timer) &= ~TIM_CR1_UDIS;
-	return OK;
+    TIM_CR1(_timer) &= ~TIM_CR1_UDIS;
+    return OK;
 }
 
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
+// 1,2,3,4,5,6,7,8,9,10,11,12,13,14
 auto Timer::disable_update_event_generation() -> Result
 {
-	TIM_CR1(_timer) |= TIM_CR1_UDIS;
-	return OK;
+    TIM_CR1(_timer) |= TIM_CR1_UDIS;
+    return OK;
 }
 
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
+// 1,2,3,4,5,6,7,8,9,10,11,12,13,14
 auto Timer::set_update_event_source(UevSource source) -> Result
 {
-	switch (source)
-	{
-		case COUNTER_OVERFLOW_AND_UG:
-			TIM_CR1(_timer) &= ~TIM_CR1_URS;
-			break;
-		case COUNTER_OVERFLOW:
-			TIM_CR1(_timer) |= TIM_CR1_URS;
-			break;
-	}
+    switch (source) {
+        case COUNTER_OVERFLOW_AND_UG:
+            TIM_CR1(_timer) &= ~TIM_CR1_URS;
+            break;
+        case COUNTER_OVERFLOW:
+            TIM_CR1(_timer) |= TIM_CR1_URS;
+            break;
+    }
 
-	return OK;
+    return OK;
 }
 
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
+// 1,2,3,4,5,6,7,8,9,10,11,12,13,14
 auto Timer::set_counter_mode(CounterMode mode) -> Result
 {
-	switch (mode)
-	{
-		case ONE_SHOT:
-			TIM_CR1(_timer) |= TIM_CR1_OPM;
-			break;
-		case CONTINUOUS:
-			TIM_CR1(_timer) &= ~TIM_CR1_OPM;
-			break;
-	}
+    switch (mode) {
+        case ONE_SHOT:
+            TIM_CR1(_timer) |= TIM_CR1_OPM;
+            break;
+        case CONTINUOUS:
+            TIM_CR1(_timer) &= ~TIM_CR1_OPM;
+            break;
+    }
 
-	return OK;
+    return OK;
 }
 
-//1,2,3,4,5,8
+// 1,2,3,4,5,8
 auto Timer::set_counter_direction(CounterDirection dir) -> Result
 {
-	if((_timer != TIM1) && (_timer != TIM2) &&
-	   (_timer != TIM3) && (_timer != TIM4) &&
-	   (_timer != TIM5) && (_timer != TIM8)) {
-		return NOT_SUPPORTED;
-	}
+    if ((_timer != TIM1) && (_timer != TIM2) && (_timer != TIM3) &&
+        (_timer != TIM4) && (_timer != TIM5) && (_timer != TIM8)) {
+        return NOT_SUPPORTED;
+    }
 
-	switch (dir)
-	{
-		case UP:
-			TIM_CR1(_timer) &= ~TIM_CR1_DIR_DOWN;
-			break;
-		case DOWN:
-			TIM_CR1(_timer) |= TIM_CR1_DIR_DOWN;
-			break;
-	}
+    switch (dir) {
+        case UP:
+            TIM_CR1(_timer) &= ~TIM_CR1_DIR_DOWN;
+            break;
+        case DOWN:
+            TIM_CR1(_timer) |= TIM_CR1_DIR_DOWN;
+            break;
+    }
 
-	return OK;
+    return OK;
 }
 
-//1,2,3,4,5,8
+// 1,2,3,4,5,8
 auto Timer::set_alignment(Alignment alignment) -> Result
 {
-	if((_timer != TIM1) && (_timer != TIM2) &&
-	   (_timer != TIM3) && (_timer != TIM4) &&
-	   (_timer != TIM5) && (_timer != TIM8)) {
-		return NOT_SUPPORTED;
-	}
-
-	bool counter_enable = TIM_CR1(_timer) & TIM_CR1_CEN;
-
-	switch (alignment)
-	{
-		case EDGE:
-			TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) |
-			                   TIM_CR1_CMS_EDGE ;
-			return OK;
-		case CENTER_DOWN:
-			if (counter_enable) {
-				return USAGE_ERROR;
-			}
-			TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) |
-							   TIM_CR1_CMS_CENTER_1;
-			return OK;
-		case CENTER_UP:
-			if (counter_enable) {
-				return USAGE_ERROR;
-			}
-			TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) |
-			                   TIM_CR1_CMS_CENTER_2 ;
-			return OK;
-		case CENTER_UP_DOWN:
-			if (counter_enable) {
-				return USAGE_ERROR;
-			}
-			TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) |
-			                   TIM_CR1_CMS_CENTER_3 ;
-			return OK;
-	}
-
-	return NOT_SUPPORTED;
-}
-
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
+    if ((_timer != TIM1) && (_timer != TIM2) && (_timer != TIM3) &&
+        (_timer != TIM4) && (_timer != TIM5) && (_timer != TIM8)) {
+        return NOT_SUPPORTED;
+    }
+
+    bool counter_enable = TIM_CR1(_timer) & TIM_CR1_CEN;
+
+    switch (alignment) {
+        case EDGE:
+            TIM_CR1(_timer) =
+              (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) | TIM_CR1_CMS_EDGE;
+            return OK;
+        case CENTER_DOWN:
+            if (counter_enable) {
+                return USAGE_ERROR;
+            }
+            TIM_CR1(_timer) =
+              (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) | TIM_CR1_CMS_CENTER_1;
+            return OK;
+        case CENTER_UP:
+            if (counter_enable) {
+                return USAGE_ERROR;
+            }
+            TIM_CR1(_timer) =
+              (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) | TIM_CR1_CMS_CENTER_2;
+            return OK;
+        case CENTER_UP_DOWN:
+            if (counter_enable) {
+                return USAGE_ERROR;
+            }
+            TIM_CR1(_timer) =
+              (TIM_CR1(_timer) & ~TIM_CR1_CMS_MASK) | TIM_CR1_CMS_CENTER_3;
+            return OK;
+    }
+
+    return NOT_SUPPORTED;
+}
+
+// 1,2,3,4,5,6,7,8,9,10,11,12,13,14
 auto Timer::enable_autoreload_preload() -> Result
 {
-	TIM_CR1(_timer) |= TIM_CR1_ARPE;
-	return OK;
+    TIM_CR1(_timer) |= TIM_CR1_ARPE;
+    return OK;
 }
 
-//1,2,3,4,5,6,7,8,9,10,11,12,13,14
+// 1,2,3,4,5,6,7,8,9,10,11,12,13,14
 auto Timer::disable_autoreload_preload() -> Result
 {
-	TIM_CR1(_timer) &= ~TIM_CR1_ARPE;
-	return OK;
+    TIM_CR1(_timer) &= ~TIM_CR1_ARPE;
+    return OK;
 }
 
-//1,2,3,4,5,8,9,10,11,12,13,14
+// 1,2,3,4,5,8,9,10,11,12,13,14
 auto Timer::set_clock_division(ClockDivision div) -> Result
 {
-	if((_timer == TIM6) || (_timer == TIM7)) {
-		return USAGE_ERROR;
-	}
-
-	switch (div)
-	{
-		case TIMER_CLOCK_MUL_1:
-			TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CKD_CK_INT_MASK) |
-			                   TIM_CR1_CKD_CK_INT ;
-			break;
-		case TIMER_CLOCK_MUL_2:
-			TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CKD_CK_INT_MASK) |
-			                   TIM_CR1_CKD_CK_INT_MUL_2 ;
-			break;
-		case TIMER_CLOCK_MUL_4:
-			TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CKD_CK_INT_MASK) |
-			                   TIM_CR1_CKD_CK_INT_MUL_4 ;
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    if ((_timer == TIM6) || (_timer == TIM7)) {
+        return USAGE_ERROR;
+    }
+
+    switch (div) {
+        case TIMER_CLOCK_MUL_1:
+            TIM_CR1(_timer) =
+              (TIM_CR1(_timer) & ~TIM_CR1_CKD_CK_INT_MASK) | TIM_CR1_CKD_CK_INT;
+            break;
+        case TIMER_CLOCK_MUL_2:
+            TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CKD_CK_INT_MASK) |
+                              TIM_CR1_CKD_CK_INT_MUL_2;
+            break;
+        case TIMER_CLOCK_MUL_4:
+            TIM_CR1(_timer) = (TIM_CR1(_timer) & ~TIM_CR1_CKD_CK_INT_MASK) |
+                              TIM_CR1_CKD_CK_INT_MUL_4;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_master_mode(MasterMode mode) -> Result
 {
-	switch (mode)
-	{
-		case MASTER_RESET:
-			TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-			                   TIM_CR2_MMS_RESET ;
-			break;
-		case ENABLE:
-			TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-			                   TIM_CR2_MMS_ENABLE ;
-			break;
-		case UPDATE:
-			TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-			                   TIM_CR2_MMS_UPDATE ;
-			break;
-		case COMPARE_PULSE:
-			TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-			                   TIM_CR2_MMS_COMPARE_PULSE ;
-			break;
-		case COMPARE_OC1REF:
-			TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-			                   TIM_CR2_MMS_COMPARE_OC1REF ;
-			break;
-		case COMPARE_OC2REF:
-			TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
-			                   TIM_CR2_MMS_COMPARE_OC2REF ;
-			break;
+    switch (mode) {
+        case MASTER_RESET:
+            TIM_CR2(_timer) =
+              (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) | TIM_CR2_MMS_RESET;
+            break;
+        case ENABLE:
+            TIM_CR2(_timer) =
+              (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) | TIM_CR2_MMS_ENABLE;
+            break;
+        case UPDATE:
+            TIM_CR2(_timer) =
+              (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) | TIM_CR2_MMS_UPDATE;
+            break;
+        case COMPARE_PULSE:
+            TIM_CR2(_timer) =
+              (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) | TIM_CR2_MMS_COMPARE_PULSE;
+            break;
+        case COMPARE_OC1REF:
+            TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
+                              TIM_CR2_MMS_COMPARE_OC1REF;
+            break;
+        case COMPARE_OC2REF:
+            TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
+                              TIM_CR2_MMS_COMPARE_OC2REF;
+            break;
         case COMPARE_OC3REF:
             TIM_CR2(_timer) = (TIM_CR2(_timer) & ~TIM_CR2_MMS_MASK) |
                               TIM_CR2_MMS_COMPARE_OC3REF;
@@ -233,1505 +225,1479 @@ auto Timer::set_master_mode(MasterMode mode) -> Result
             break;
     }
 
-	return OK;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::set_slave_mode(SlaveMode mode) -> Result
 {
-	switch (mode)
-	{
-	    case DISABLED:
-			TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) |
-			                    TIM_SMCR_SMS_OFF ;
-			break;
-		case SLAVE_RESET:
-			TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) |
-			                    TIM_SMCR_SMS_RM ;
-			break;
-		case GATED:
-			if(TIM_SMCR(_timer) & TIM_SMCR_TS_TI1F_ED) {
-				return USAGE_ERROR;
-			}
-			TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) |
-			                    TIM_SMCR_SMS_GM ;
-			break;
-		case TRIGGER:
-			TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) |
-			                    TIM_SMCR_SMS_TM ;
-			break;
-		case EXTERNAL_CLOCK:
-			TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) |
-			                    TIM_SMCR_SMS_ECM1 ;
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    switch (mode) {
+        case DISABLED:
+            TIM_SMCR(_timer) =
+              (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) | TIM_SMCR_SMS_OFF;
+            break;
+        case SLAVE_RESET:
+            TIM_SMCR(_timer) =
+              (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) | TIM_SMCR_SMS_RM;
+            break;
+        case GATED:
+            if (TIM_SMCR(_timer) & TIM_SMCR_TS_TI1F_ED) {
+                return USAGE_ERROR;
+            }
+            TIM_SMCR(_timer) =
+              (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) | TIM_SMCR_SMS_GM;
+            break;
+        case TRIGGER:
+            TIM_SMCR(_timer) =
+              (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) | TIM_SMCR_SMS_TM;
+            break;
+        case EXTERNAL_CLOCK:
+            TIM_SMCR(_timer) =
+              (TIM_SMCR(_timer) & ~TIM_SMCR_SMS_MASK) | TIM_SMCR_SMS_ECM1;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_trigger(Trigger trigger) -> Result
 {
-	switch (trigger)
-		{
-		    case INTERNAL_TRIGGER_0:
-				TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) |
-				                    TIM_SMCR_TS_ITR0 ;
-				break;
-			case INTERNAL_TRIGGER_1:
-				TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) |
-				                    TIM_SMCR_TS_ITR1 ;
-				break;
-			case INTERNAL_TRIGGER_2:
-				TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) |
-				                    TIM_SMCR_TS_ITR2 ;
-				break;
-			case INTERNAL_TRIGGER_3:
-				TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) |
-				                    TIM_SMCR_TS_ITR3 ;
-				break;
-			case EDGE_DETECTOR:
-				TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) |
-				                    TIM_SMCR_TS_TI1F_ED ;
-				break;
-			case FILTERED_TIMER_INPUT_1:
-				TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) |
-				                    TIM_SMCR_TS_TI1FP1 ;
-				break;
-			case FILTERED_TIMER_INPUT_2:
-				TIM_SMCR(_timer) = (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) |
-				                    TIM_SMCR_TS_TI2FP2 ;
-				break;
-		}
-
-		return OK;
-}
-
-//9,12
+    switch (trigger) {
+        case INTERNAL_TRIGGER_0:
+            TIM_SMCR(_timer) =
+              (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) | TIM_SMCR_TS_ITR0;
+            break;
+        case INTERNAL_TRIGGER_1:
+            TIM_SMCR(_timer) =
+              (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) | TIM_SMCR_TS_ITR1;
+            break;
+        case INTERNAL_TRIGGER_2:
+            TIM_SMCR(_timer) =
+              (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) | TIM_SMCR_TS_ITR2;
+            break;
+        case INTERNAL_TRIGGER_3:
+            TIM_SMCR(_timer) =
+              (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) | TIM_SMCR_TS_ITR3;
+            break;
+        case EDGE_DETECTOR:
+            TIM_SMCR(_timer) =
+              (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) | TIM_SMCR_TS_TI1F_ED;
+            break;
+        case FILTERED_TIMER_INPUT_1:
+            TIM_SMCR(_timer) =
+              (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) | TIM_SMCR_TS_TI1FP1;
+            break;
+        case FILTERED_TIMER_INPUT_2:
+            TIM_SMCR(_timer) =
+              (TIM_SMCR(_timer) & ~TIM_SMCR_TS_MASK) | TIM_SMCR_TS_TI2FP2;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::enable_master_slave_mode() -> Result
 {
-	TIM_SMCR(_timer) |= TIM_SMCR_MSM;
-	return OK;
+    TIM_SMCR(_timer) |= TIM_SMCR_MSM;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_master_slave_mode() -> Result
 {
-	TIM_SMCR(_timer) &= ~TIM_SMCR_MSM;
-	return OK;
+    TIM_SMCR(_timer) &= ~TIM_SMCR_MSM;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::enable_update_interrupt() -> Result
 {
-	TIM_DIER(_timer) |= TIM_DIER_UIE;
-	return OK;
+    TIM_DIER(_timer) |= TIM_DIER_UIE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_update_interrupt() -> Result
 {
-	TIM_DIER(_timer) &= ~TIM_DIER_UIE;
-	return OK;
+    TIM_DIER(_timer) &= ~TIM_DIER_UIE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::enable_capture_compare_1_interrupt() -> Result
 {
-	TIM_DIER(_timer) |= TIM_DIER_CC1IE;
-	return OK;
+    TIM_DIER(_timer) |= TIM_DIER_CC1IE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_capture_compare_1_interrupt() -> Result
 {
-	TIM_DIER(_timer) &= ~TIM_DIER_CC1IE;
-	return OK;
+    TIM_DIER(_timer) &= ~TIM_DIER_CC1IE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::enable_capture_compare_2_interrupt() -> Result
 {
-	TIM_DIER(_timer) |= TIM_DIER_CC2IE;
-	return OK;
+    TIM_DIER(_timer) |= TIM_DIER_CC2IE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_capture_compare_2_interrupt() -> Result
 {
-	TIM_DIER(_timer) &= ~TIM_DIER_CC2IE;
-	return OK;
+    TIM_DIER(_timer) &= ~TIM_DIER_CC2IE;
+    return OK;
 }
 
 auto Timer::enable_capture_compare_3_interrupt() -> Result
 {
-	TIM_DIER(_timer) |= TIM_DIER_CC3IE;
-	return OK;
+    TIM_DIER(_timer) |= TIM_DIER_CC3IE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_capture_compare_3_interrupt() -> Result
 {
-	TIM_DIER(_timer) &= ~TIM_DIER_CC3IE;
-	return OK;
+    TIM_DIER(_timer) &= ~TIM_DIER_CC3IE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::enable_capture_compare_4_interrupt() -> Result
 {
-	TIM_DIER(_timer) |= TIM_DIER_CC4IE;
-	return OK;
+    TIM_DIER(_timer) |= TIM_DIER_CC4IE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_capture_compare_4_interrupt() -> Result
 {
-	TIM_DIER(_timer) &= ~TIM_DIER_CC4IE;
-	return OK;
+    TIM_DIER(_timer) &= ~TIM_DIER_CC4IE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::enable_trigger_interrupt() -> Result
 {
-	TIM_DIER(_timer) |= TIM_DIER_TIE;
-	return OK;
+    TIM_DIER(_timer) |= TIM_DIER_TIE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_trigger_interrupt() -> Result
 {
-	TIM_DIER(_timer) &= ~TIM_DIER_TIE;
-	return OK;
+    TIM_DIER(_timer) &= ~TIM_DIER_TIE;
+    return OK;
 }
 
-//9,12
+// 9,12
 bool Timer::get_flag_status(Flag flag)
 {
-	bool status = false;
-
-	switch (flag)
-	{
-		case UPDATE_INTERRUPT:
-			status = TIM_SR(_timer) & TIM_SR_UIF;
-			break;
-		case CAPTURE_COMPARE_1_INTERRUPT:
-			status = TIM_SR(_timer) & TIM_SR_CC1IF;
-			break;
-		case CAPTURE_COMPARE_2_INTERRUPT:
-			status = TIM_SR(_timer) & TIM_SR_CC2IF;
-			break;
-		case CAPTURE_COMPARE_3_INTERRUPT:
-			status = TIM_SR(_timer) & TIM_SR_CC3IF;
-			break;
-		case CAPTURE_COMPARE_4_INTERRUPT:
-			status = TIM_SR(_timer) & TIM_SR_CC4IF;
-			break;
-		case TRIGGER_INTERRUPT:
-			status = TIM_SR(_timer) & TIM_SR_TIF;
-			break;
-		case CAPTURE_COMPARE_1_OVERCAPTURE:
-			status = TIM_SR(_timer) & TIM_SR_CC1OF;
-			break;
-		case CAPTURE_COMPARE_2_OVERCAPTURE:
-			status = TIM_SR(_timer) & TIM_SR_CC2OF;
-			break;
-		case CAPTURE_COMPARE_3_OVERCAPTURE:
-			status = TIM_SR(_timer) & TIM_SR_CC3OF;
-			break;
-		case CAPTURE_COMPARE_4_OVERCAPTURE:
-			status = TIM_SR(_timer) & TIM_SR_CC4OF;
-			break;
-	}
-
-	return status;
-}
-
-//9,12
+    bool status = false;
+
+    switch (flag) {
+        case UPDATE_INTERRUPT:
+            status = TIM_SR(_timer) & TIM_SR_UIF;
+            break;
+        case CAPTURE_COMPARE_1_INTERRUPT:
+            status = TIM_SR(_timer) & TIM_SR_CC1IF;
+            break;
+        case CAPTURE_COMPARE_2_INTERRUPT:
+            status = TIM_SR(_timer) & TIM_SR_CC2IF;
+            break;
+        case CAPTURE_COMPARE_3_INTERRUPT:
+            status = TIM_SR(_timer) & TIM_SR_CC3IF;
+            break;
+        case CAPTURE_COMPARE_4_INTERRUPT:
+            status = TIM_SR(_timer) & TIM_SR_CC4IF;
+            break;
+        case TRIGGER_INTERRUPT:
+            status = TIM_SR(_timer) & TIM_SR_TIF;
+            break;
+        case CAPTURE_COMPARE_1_OVERCAPTURE:
+            status = TIM_SR(_timer) & TIM_SR_CC1OF;
+            break;
+        case CAPTURE_COMPARE_2_OVERCAPTURE:
+            status = TIM_SR(_timer) & TIM_SR_CC2OF;
+            break;
+        case CAPTURE_COMPARE_3_OVERCAPTURE:
+            status = TIM_SR(_timer) & TIM_SR_CC3OF;
+            break;
+        case CAPTURE_COMPARE_4_OVERCAPTURE:
+            status = TIM_SR(_timer) & TIM_SR_CC4OF;
+            break;
+    }
+
+    return status;
+}
+
+// 9,12
 auto Timer::clear_flag_status(Flag flag) -> Result
 {
-	switch (flag)
-	{
-		case UPDATE_INTERRUPT:
-			TIM_SR(_timer) &= ~TIM_SR_UIF;
-			break;
-		case CAPTURE_COMPARE_1_INTERRUPT:
-			TIM_SR(_timer) &= ~TIM_SR_CC1IF;
-			break;
-		case CAPTURE_COMPARE_2_INTERRUPT:
-			TIM_SR(_timer) &= ~TIM_SR_CC2IF;
-			break;
-		case CAPTURE_COMPARE_3_INTERRUPT:
-			TIM_SR(_timer) &= ~TIM_SR_CC3IF;
-			break;
-		case CAPTURE_COMPARE_4_INTERRUPT:
-			TIM_SR(_timer) &= ~TIM_SR_CC4IF;
-			break;
-		case TRIGGER_INTERRUPT:
-			TIM_SR(_timer) &= ~TIM_SR_TIF;
-			break;
-		case CAPTURE_COMPARE_1_OVERCAPTURE:
-			TIM_SR(_timer) &= ~TIM_SR_CC1OF;
-			break;
-		case CAPTURE_COMPARE_2_OVERCAPTURE:
-			TIM_SR(_timer) &= ~TIM_SR_CC2OF;
-			break;
-		case CAPTURE_COMPARE_3_OVERCAPTURE:
-			TIM_SR(_timer) &= ~TIM_SR_CC3OF;
-			break;
-		case CAPTURE_COMPARE_4_OVERCAPTURE:
-			TIM_SR(_timer) &= ~TIM_SR_CC4OF;
-			break;
-	}
-
-	return OK;
+    switch (flag) {
+        case UPDATE_INTERRUPT:
+            TIM_SR(_timer) &= ~TIM_SR_UIF;
+            break;
+        case CAPTURE_COMPARE_1_INTERRUPT:
+            TIM_SR(_timer) &= ~TIM_SR_CC1IF;
+            break;
+        case CAPTURE_COMPARE_2_INTERRUPT:
+            TIM_SR(_timer) &= ~TIM_SR_CC2IF;
+            break;
+        case CAPTURE_COMPARE_3_INTERRUPT:
+            TIM_SR(_timer) &= ~TIM_SR_CC3IF;
+            break;
+        case CAPTURE_COMPARE_4_INTERRUPT:
+            TIM_SR(_timer) &= ~TIM_SR_CC4IF;
+            break;
+        case TRIGGER_INTERRUPT:
+            TIM_SR(_timer) &= ~TIM_SR_TIF;
+            break;
+        case CAPTURE_COMPARE_1_OVERCAPTURE:
+            TIM_SR(_timer) &= ~TIM_SR_CC1OF;
+            break;
+        case CAPTURE_COMPARE_2_OVERCAPTURE:
+            TIM_SR(_timer) &= ~TIM_SR_CC2OF;
+            break;
+        case CAPTURE_COMPARE_3_OVERCAPTURE:
+            TIM_SR(_timer) &= ~TIM_SR_CC3OF;
+            break;
+        case CAPTURE_COMPARE_4_OVERCAPTURE:
+            TIM_SR(_timer) &= ~TIM_SR_CC4OF;
+            break;
+    }
+
+    return OK;
 }
 
 void Timer::update_generation()
 {
-	TIM_EGR(_timer) |= TIM_EGR_UG;
+    TIM_EGR(_timer) |= TIM_EGR_UG;
 }
 
-//9,12
+// 9,12
 auto Timer::set_capture_compare_1_mode(CcMode mode) -> Result
 {
-	bool channel_on = TIM_CCER(_timer) & TIM_CCER_CC1E;
-
-	if (channel_on) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case OUTPUT:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
-			                     TIM_CCMR1_CC1S_OUT;
-			break;
-		case INPUT_MAPPED_TI1:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
-			                     TIM_CCMR1_CC1S_IN_TI1;
-			break;
-		case INPUT_MAPPED_TI2:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
-			                     TIM_CCMR1_CC1S_IN_TI2;
-			break;
-		case INPUT_MAPPED_TRC:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
-			                     TIM_CCMR1_CC1S_IN_TRC;
-			break;
-
-		default: break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_on = TIM_CCER(_timer) & TIM_CCER_CC1E;
+
+    if (channel_on) {
+        return USAGE_ERROR;
+    }
+
+    switch (mode) {
+        case OUTPUT:
+            TIM_CCMR1(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) | TIM_CCMR1_CC1S_OUT;
+            break;
+        case INPUT_MAPPED_TI1:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
+                                TIM_CCMR1_CC1S_IN_TI1;
+            break;
+        case INPUT_MAPPED_TI2:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
+                                TIM_CCMR1_CC1S_IN_TI2;
+            break;
+        case INPUT_MAPPED_TRC:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC1S_MASK) |
+                                TIM_CCMR1_CC1S_IN_TRC;
+            break;
+
+        default:
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_capture_compare_2_mode(CcMode mode) -> Result
 {
-	bool channel_on = TIM_CCER(_timer) & TIM_CCER_CC2E;
-
-	if (channel_on) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case OUTPUT:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
-								 TIM_CCMR1_CC2S_OUT;
-			break;
-		case INPUT_MAPPED_TI1:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
-								 TIM_CCMR1_CC2S_IN_TI1;
-			break;
-		case INPUT_MAPPED_TI2:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
-								 TIM_CCMR1_CC2S_IN_TI2;
-			break;
-		case INPUT_MAPPED_TRC:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
-								 TIM_CCMR1_CC2S_IN_TRC;
-			break;
-
-		default: break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_on = TIM_CCER(_timer) & TIM_CCER_CC2E;
+
+    if (channel_on) {
+        return USAGE_ERROR;
+    }
+
+    switch (mode) {
+        case OUTPUT:
+            TIM_CCMR1(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) | TIM_CCMR1_CC2S_OUT;
+            break;
+        case INPUT_MAPPED_TI1:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
+                                TIM_CCMR1_CC2S_IN_TI1;
+            break;
+        case INPUT_MAPPED_TI2:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
+                                TIM_CCMR1_CC2S_IN_TI2;
+            break;
+        case INPUT_MAPPED_TRC:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_CC2S_MASK) |
+                                TIM_CCMR1_CC2S_IN_TRC;
+            break;
+
+        default:
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_input_capture_1_prescaler(Prescaler prescaler) -> Result
 {
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (prescaler)
-	{
-		case NO_PRESCALER:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) |
-			                     TIM_CCMR1_IC1PSC_OFF;
-			break;
-		case CAPTURE_EVERY_2_EVENTS:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) |
-			                     TIM_CCMR1_IC1PSC_2;
-			break;
-		case CAPTURE_EVERY_4_EVENTS:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) |
-			                     TIM_CCMR1_IC1PSC_4;
-			break;
-		case CAPTURE_EVERY_8_EVENTS:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) |
-			                     TIM_CCMR1_IC1PSC_8;
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
+
+    if (!channel_is_input) {
+        return USAGE_ERROR;
+    }
+
+    switch (prescaler) {
+        case NO_PRESCALER:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) |
+                                TIM_CCMR1_IC1PSC_OFF;
+            break;
+        case CAPTURE_EVERY_2_EVENTS:
+            TIM_CCMR1(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) | TIM_CCMR1_IC1PSC_2;
+            break;
+        case CAPTURE_EVERY_4_EVENTS:
+            TIM_CCMR1(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) | TIM_CCMR1_IC1PSC_4;
+            break;
+        case CAPTURE_EVERY_8_EVENTS:
+            TIM_CCMR1(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1PSC_MASK) | TIM_CCMR1_IC1PSC_8;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_input_capture_2_prescaler(Prescaler prescaler) -> Result
 {
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (prescaler)
-	{
-		case NO_PRESCALER:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) |
-								 TIM_CCMR1_IC2PSC_OFF;
-			break;
-		case CAPTURE_EVERY_2_EVENTS:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) |
-								 TIM_CCMR1_IC2PSC_2;
-			break;
-		case CAPTURE_EVERY_4_EVENTS:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) |
-								 TIM_CCMR1_IC2PSC_4;
-			break;
-		case CAPTURE_EVERY_8_EVENTS:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) |
-								 TIM_CCMR1_IC2PSC_8;
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
+
+    if (!channel_is_input) {
+        return USAGE_ERROR;
+    }
+
+    switch (prescaler) {
+        case NO_PRESCALER:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) |
+                                TIM_CCMR1_IC2PSC_OFF;
+            break;
+        case CAPTURE_EVERY_2_EVENTS:
+            TIM_CCMR1(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) | TIM_CCMR1_IC2PSC_2;
+            break;
+        case CAPTURE_EVERY_4_EVENTS:
+            TIM_CCMR1(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) | TIM_CCMR1_IC2PSC_4;
+            break;
+        case CAPTURE_EVERY_8_EVENTS:
+            TIM_CCMR1(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2PSC_MASK) | TIM_CCMR1_IC2PSC_8;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_input_capture_1_filter(Filter filter) -> Result
 {
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (filter)
-	{
-		case NO_FILTER:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_OFF;
-			break;
-		case CK_INT_N_2:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_CK_INT_N_2;
-			break;
-		case CK_INT_N_4:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_CK_INT_N_4;
-			break;
-		case CK_INT_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_CK_INT_N_8;
-			break;
-		case DTF_DIV_2_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_2_N_6;
-			break;
-		case DTF_DIV_2_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_2_N_8;
-			break;
-		case TF_DIV_4_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_4_N_6;
-			break;
-		case DTF_DIV_4_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_4_N_8;
-			break;
-		case DTF_DIV_8_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_8_N_6;
-			break;
-		case DTF_DIV_8_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_8_N_8;
-			break;
-		case DTF_DIV_16_N_5:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_16_N_5;
-			break;
-		case DTF_DIV_16_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_16_N_6;
-			break;
-		case DTF_DIV_16_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_16_N_8;
-			break;
-		case DTF_DIV_32_N_5:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_32_N_5;
-			break;
-		case DTF_DIV_32_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_32_N_6;
-			break;
-		case DTF_DIV_32_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
-			TIM_CCMR1_IC1F_DTF_DIV_32_N_8;
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
+
+    if (!channel_is_input) {
+        return USAGE_ERROR;
+    }
+
+    switch (filter) {
+        case NO_FILTER:
+            TIM_CCMR1(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) | TIM_CCMR1_IC1F_OFF;
+            break;
+        case CK_INT_N_2:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_CK_INT_N_2;
+            break;
+        case CK_INT_N_4:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_CK_INT_N_4;
+            break;
+        case CK_INT_N_8:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_CK_INT_N_8;
+            break;
+        case DTF_DIV_2_N_6:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_DTF_DIV_2_N_6;
+            break;
+        case DTF_DIV_2_N_8:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_DTF_DIV_2_N_8;
+            break;
+        case TF_DIV_4_N_6:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_DTF_DIV_4_N_6;
+            break;
+        case DTF_DIV_4_N_8:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_DTF_DIV_4_N_8;
+            break;
+        case DTF_DIV_8_N_6:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_DTF_DIV_8_N_6;
+            break;
+        case DTF_DIV_8_N_8:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_DTF_DIV_8_N_8;
+            break;
+        case DTF_DIV_16_N_5:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_DTF_DIV_16_N_5;
+            break;
+        case DTF_DIV_16_N_6:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_DTF_DIV_16_N_6;
+            break;
+        case DTF_DIV_16_N_8:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_DTF_DIV_16_N_8;
+            break;
+        case DTF_DIV_32_N_5:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_DTF_DIV_32_N_5;
+            break;
+        case DTF_DIV_32_N_6:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_DTF_DIV_32_N_6;
+            break;
+        case DTF_DIV_32_N_8:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC1F_MASK) |
+                                TIM_CCMR1_IC1F_DTF_DIV_32_N_8;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_input_capture_2_filter(Filter filter) -> Result
 {
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (filter)
-	{
-		case NO_FILTER:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_OFF;
-			break;
-		case CK_INT_N_2:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_CK_INT_N_2;
-			break;
-		case CK_INT_N_4:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_CK_INT_N_4;
-			break;
-		case CK_INT_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_CK_INT_N_8;
-			break;
-		case DTF_DIV_2_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_2_N_6;
-			break;
-		case DTF_DIV_2_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_2_N_8;
-			break;
-		case TF_DIV_4_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_4_N_6;
-			break;
-		case DTF_DIV_4_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_4_N_8;
-			break;
-		case DTF_DIV_8_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_8_N_6;
-			break;
-		case DTF_DIV_8_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_8_N_8;
-			break;
-		case DTF_DIV_16_N_5:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_16_N_5;
-			break;
-		case DTF_DIV_16_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_16_N_6;
-			break;
-		case DTF_DIV_16_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_16_N_8;
-			break;
-		case DTF_DIV_32_N_5:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_32_N_5;
-			break;
-		case DTF_DIV_32_N_6:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_32_N_6;
-			break;
-		case DTF_DIV_32_N_8:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
-			TIM_CCMR1_IC2F_DTF_DIV_32_N_8;
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
+
+    if (!channel_is_input) {
+        return USAGE_ERROR;
+    }
+
+    switch (filter) {
+        case NO_FILTER:
+            TIM_CCMR1(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) | TIM_CCMR1_IC2F_OFF;
+            break;
+        case CK_INT_N_2:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_CK_INT_N_2;
+            break;
+        case CK_INT_N_4:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_CK_INT_N_4;
+            break;
+        case CK_INT_N_8:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_CK_INT_N_8;
+            break;
+        case DTF_DIV_2_N_6:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_DTF_DIV_2_N_6;
+            break;
+        case DTF_DIV_2_N_8:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_DTF_DIV_2_N_8;
+            break;
+        case TF_DIV_4_N_6:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_DTF_DIV_4_N_6;
+            break;
+        case DTF_DIV_4_N_8:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_DTF_DIV_4_N_8;
+            break;
+        case DTF_DIV_8_N_6:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_DTF_DIV_8_N_6;
+            break;
+        case DTF_DIV_8_N_8:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_DTF_DIV_8_N_8;
+            break;
+        case DTF_DIV_16_N_5:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_DTF_DIV_16_N_5;
+            break;
+        case DTF_DIV_16_N_6:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_DTF_DIV_16_N_6;
+            break;
+        case DTF_DIV_16_N_8:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_DTF_DIV_16_N_8;
+            break;
+        case DTF_DIV_32_N_5:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_DTF_DIV_32_N_5;
+            break;
+        case DTF_DIV_32_N_6:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_DTF_DIV_32_N_6;
+            break;
+        case DTF_DIV_32_N_8:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_IC2F_MASK) |
+                                TIM_CCMR1_IC2F_DTF_DIV_32_N_8;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::enable_fast_output_compare_1() -> Result
 {
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
+    bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR1(_timer) |= TIM_CCMR1_OC1FE;
-	return OK;
+    TIM_CCMR1(_timer) |= TIM_CCMR1_OC1FE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_fast_output_compare_1() -> Result
 {
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
+    bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC1FE;
-	return OK;
+    TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC1FE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::enable_fast_output_compare_2() -> Result
 {
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
+    bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR1(_timer) |= TIM_CCMR1_OC2FE;
-	return OK;
+    TIM_CCMR1(_timer) |= TIM_CCMR1_OC2FE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_fast_output_compare_2() -> Result
 {
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
+    bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC2FE;
-	return OK;
+    TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC2FE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::enable_output_compare_1_preload() -> Result
 {
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
+    bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR1(_timer) |= TIM_CCMR1_OC1PE;
-	return OK;
+    TIM_CCMR1(_timer) |= TIM_CCMR1_OC1PE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_output_compare_1_preload() -> Result
 {
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
+    bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC1PE;
-	return OK;
+    TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC1PE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::enable_output_compare_2_preload() -> Result
 {
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
+    bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR1(_timer) |= TIM_CCMR1_OC2PE;
+    TIM_CCMR1(_timer) |= TIM_CCMR1_OC2PE;
 
-	return OK;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_output_compare_2_preload() -> Result
 {
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
+    bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC2PE;
-	return OK;
+    TIM_CCMR1(_timer) &= ~TIM_CCMR1_OC2PE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::set_output_compare_1_mode(OcMode mode) -> Result
 {
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case FROZEN:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_FROZEN;
-			break;
-		case ACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_ACTIVE;
-			break;
-		case INACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_INACTIVE;
-			break;
-		case TOGGLE:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_TOGGLE;
-			break;
-		case FORCE_INACTIVE_LEVEL:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_FORCE_LOW;
-			break;
-		case FORCE_ACTIVE_LEVEL:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_FORCE_HIGH;
-			break;
-		case PWM_MODE_1:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_PWM1;
-			break;
-		case PWM_MODE_2:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
-			TIM_CCMR1_OC1M_PWM2;
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC1S_MASK;
+
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
+
+    switch (mode) {
+        case FROZEN:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
+                                TIM_CCMR1_OC1M_FROZEN;
+            break;
+        case ACTIVE_LEVEL_ON_MATCH:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
+                                TIM_CCMR1_OC1M_ACTIVE;
+            break;
+        case INACTIVE_LEVEL_ON_MATCH:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
+                                TIM_CCMR1_OC1M_INACTIVE;
+            break;
+        case TOGGLE:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
+                                TIM_CCMR1_OC1M_TOGGLE;
+            break;
+        case FORCE_INACTIVE_LEVEL:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
+                                TIM_CCMR1_OC1M_FORCE_LOW;
+            break;
+        case FORCE_ACTIVE_LEVEL:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) |
+                                TIM_CCMR1_OC1M_FORCE_HIGH;
+            break;
+        case PWM_MODE_1:
+            TIM_CCMR1(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) | TIM_CCMR1_OC1M_PWM1;
+            break;
+        case PWM_MODE_2:
+            TIM_CCMR1(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC1M_MASK) | TIM_CCMR1_OC1M_PWM2;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_output_compare_2_mode(OcMode mode) -> Result
 {
-	bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case FROZEN:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_FROZEN;
-			break;
-		case ACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_ACTIVE;
-			break;
-		case INACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_INACTIVE;
-			break;
-		case TOGGLE:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_TOGGLE;
-			break;
-		case FORCE_INACTIVE_LEVEL:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_FORCE_LOW;
-			break;
-		case FORCE_ACTIVE_LEVEL:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_FORCE_HIGH;
-			break;
-		case PWM_MODE_1:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_PWM1;
-			break;
-		case PWM_MODE_2:
-			TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
-			TIM_CCMR1_OC2M_PWM2;
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_is_input = TIM_CCMR1(_timer) & TIM_CCMR1_CC2S_MASK;
+
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
+
+    switch (mode) {
+        case FROZEN:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
+                                TIM_CCMR1_OC2M_FROZEN;
+            break;
+        case ACTIVE_LEVEL_ON_MATCH:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
+                                TIM_CCMR1_OC2M_ACTIVE;
+            break;
+        case INACTIVE_LEVEL_ON_MATCH:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
+                                TIM_CCMR1_OC2M_INACTIVE;
+            break;
+        case TOGGLE:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
+                                TIM_CCMR1_OC2M_TOGGLE;
+            break;
+        case FORCE_INACTIVE_LEVEL:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
+                                TIM_CCMR1_OC2M_FORCE_LOW;
+            break;
+        case FORCE_ACTIVE_LEVEL:
+            TIM_CCMR1(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) |
+                                TIM_CCMR1_OC2M_FORCE_HIGH;
+            break;
+        case PWM_MODE_1:
+            TIM_CCMR1(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) | TIM_CCMR1_OC2M_PWM1;
+            break;
+        case PWM_MODE_2:
+            TIM_CCMR1(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR1_OC2M_MASK) | TIM_CCMR1_OC2M_PWM2;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_capture_compare_3_mode(CcMode mode) -> Result
 {
-	bool channel_on = TIM_CCER(_timer) & TIM_CCER_CC3E;
-
-	if (channel_on) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case OUTPUT:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
-			                     TIM_CCMR2_CC3S_OUT;
-			break;
-		case INPUT_MAPPED_TI3:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
-			                     TIM_CCMR2_CC3S_IN_TI3;
-			break;
-		case INPUT_MAPPED_TI4:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
-			                     TIM_CCMR2_CC3S_IN_TI4;
-			break;
-		case INPUT_MAPPED_TRC:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
-			                     TIM_CCMR2_CC3S_IN_TRC;
-			break;
-
-		case INPUT_MAPPED_TI1:
-		case INPUT_MAPPED_TI2:
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_on = TIM_CCER(_timer) & TIM_CCER_CC3E;
+
+    if (channel_on) {
+        return USAGE_ERROR;
+    }
+
+    switch (mode) {
+        case OUTPUT:
+            TIM_CCMR2(_timer) =
+              (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) | TIM_CCMR2_CC3S_OUT;
+            break;
+        case INPUT_MAPPED_TI3:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
+                                TIM_CCMR2_CC3S_IN_TI3;
+            break;
+        case INPUT_MAPPED_TI4:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
+                                TIM_CCMR2_CC3S_IN_TI4;
+            break;
+        case INPUT_MAPPED_TRC:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC3S_MASK) |
+                                TIM_CCMR2_CC3S_IN_TRC;
+            break;
+
+        case INPUT_MAPPED_TI1:
+        case INPUT_MAPPED_TI2:
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_capture_compare_4_mode(CcMode mode) -> Result
 {
-	bool channel_on = TIM_CCER(_timer) & TIM_CCER_CC4E;
-
-	if (channel_on) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case OUTPUT:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
-								 TIM_CCMR2_CC4S_OUT;
-			break;
-		case INPUT_MAPPED_TI3:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
-								 TIM_CCMR2_CC4S_IN_TI3;
-			break;
-		case INPUT_MAPPED_TI4:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
-								 TIM_CCMR2_CC4S_IN_TI4;
-			break;
-		case INPUT_MAPPED_TRC:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
-								 TIM_CCMR2_CC4S_IN_TRC;
-			break;
-
-		case INPUT_MAPPED_TI1:
-		case INPUT_MAPPED_TI2:
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_on = TIM_CCER(_timer) & TIM_CCER_CC4E;
+
+    if (channel_on) {
+        return USAGE_ERROR;
+    }
+
+    switch (mode) {
+        case OUTPUT:
+            TIM_CCMR2(_timer) =
+              (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) | TIM_CCMR2_CC4S_OUT;
+            break;
+        case INPUT_MAPPED_TI3:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
+                                TIM_CCMR2_CC4S_IN_TI3;
+            break;
+        case INPUT_MAPPED_TI4:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
+                                TIM_CCMR2_CC4S_IN_TI4;
+            break;
+        case INPUT_MAPPED_TRC:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_CC4S_MASK) |
+                                TIM_CCMR2_CC4S_IN_TRC;
+            break;
+
+        case INPUT_MAPPED_TI1:
+        case INPUT_MAPPED_TI2:
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_input_capture_3_prescaler(Prescaler prescaler) -> Result
 {
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (prescaler)
-	{
-		case NO_PRESCALER:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) |
-			                     TIM_CCMR2_IC3PSC_OFF;
-			break;
-		case CAPTURE_EVERY_2_EVENTS:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) |
-			                     TIM_CCMR2_IC3PSC_2;
-			break;
-		case CAPTURE_EVERY_4_EVENTS:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) |
-			                     TIM_CCMR2_IC3PSC_4;
-			break;
-		case CAPTURE_EVERY_8_EVENTS:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) |
-			                     TIM_CCMR2_IC3PSC_8;
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
+
+    if (!channel_is_input) {
+        return USAGE_ERROR;
+    }
+
+    switch (prescaler) {
+        case NO_PRESCALER:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) |
+                                TIM_CCMR2_IC3PSC_OFF;
+            break;
+        case CAPTURE_EVERY_2_EVENTS:
+            TIM_CCMR2(_timer) =
+              (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) | TIM_CCMR2_IC3PSC_2;
+            break;
+        case CAPTURE_EVERY_4_EVENTS:
+            TIM_CCMR2(_timer) =
+              (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) | TIM_CCMR2_IC3PSC_4;
+            break;
+        case CAPTURE_EVERY_8_EVENTS:
+            TIM_CCMR2(_timer) =
+              (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC3PSC_MASK) | TIM_CCMR2_IC3PSC_8;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_input_capture_4_prescaler(Prescaler prescaler) -> Result
 {
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (prescaler)
-	{
-		case NO_PRESCALER:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) |
-								 TIM_CCMR2_IC4PSC_OFF;
-			break;
-		case CAPTURE_EVERY_2_EVENTS:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) |
-								 TIM_CCMR2_IC4PSC_2;
-			break;
-		case CAPTURE_EVERY_4_EVENTS:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) |
-								 TIM_CCMR2_IC4PSC_4;
-			break;
-		case CAPTURE_EVERY_8_EVENTS:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) |
-								 TIM_CCMR2_IC4PSC_8;
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
+
+    if (!channel_is_input) {
+        return USAGE_ERROR;
+    }
+
+    switch (prescaler) {
+        case NO_PRESCALER:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) |
+                                TIM_CCMR2_IC4PSC_OFF;
+            break;
+        case CAPTURE_EVERY_2_EVENTS:
+            TIM_CCMR2(_timer) =
+              (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) | TIM_CCMR2_IC4PSC_2;
+            break;
+        case CAPTURE_EVERY_4_EVENTS:
+            TIM_CCMR2(_timer) =
+              (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) | TIM_CCMR2_IC4PSC_4;
+            break;
+        case CAPTURE_EVERY_8_EVENTS:
+            TIM_CCMR2(_timer) =
+              (TIM_CCMR2(_timer) & ~TIM_CCMR2_IC4PSC_MASK) | TIM_CCMR2_IC4PSC_8;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_input_capture_3_filter(Filter filter) -> Result
 {
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (filter)
-	{
-		case NO_FILTER:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_OFF;
-			break;
-		case CK_INT_N_2:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_CK_INT_N_2;
-			break;
-		case CK_INT_N_4:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_CK_INT_N_4;
-			break;
-		case CK_INT_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_CK_INT_N_8;
-			break;
-		case DTF_DIV_2_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_2_N_6;
-			break;
-		case DTF_DIV_2_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_2_N_8;
-			break;
-		case TF_DIV_4_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_4_N_6;
-			break;
-		case DTF_DIV_4_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_4_N_8;
-			break;
-		case DTF_DIV_8_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_8_N_6;
-			break;
-		case DTF_DIV_8_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_8_N_8;
-			break;
-		case DTF_DIV_16_N_5:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_16_N_5;
-			break;
-		case DTF_DIV_16_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_16_N_6;
-			break;
-		case DTF_DIV_16_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_16_N_8;
-			break;
-		case DTF_DIV_32_N_5:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_32_N_5;
-			break;
-		case DTF_DIV_32_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_32_N_6;
-			break;
-		case DTF_DIV_32_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
-			TIM_CCMR2_IC3F_DTF_DIV_32_N_8;
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
+
+    if (!channel_is_input) {
+        return USAGE_ERROR;
+    }
+
+    switch (filter) {
+        case NO_FILTER:
+            TIM_CCMR2(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) | TIM_CCMR2_IC3F_OFF;
+            break;
+        case CK_INT_N_2:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_CK_INT_N_2;
+            break;
+        case CK_INT_N_4:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_CK_INT_N_4;
+            break;
+        case CK_INT_N_8:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_CK_INT_N_8;
+            break;
+        case DTF_DIV_2_N_6:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_DTF_DIV_2_N_6;
+            break;
+        case DTF_DIV_2_N_8:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_DTF_DIV_2_N_8;
+            break;
+        case TF_DIV_4_N_6:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_DTF_DIV_4_N_6;
+            break;
+        case DTF_DIV_4_N_8:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_DTF_DIV_4_N_8;
+            break;
+        case DTF_DIV_8_N_6:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_DTF_DIV_8_N_6;
+            break;
+        case DTF_DIV_8_N_8:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_DTF_DIV_8_N_8;
+            break;
+        case DTF_DIV_16_N_5:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_DTF_DIV_16_N_5;
+            break;
+        case DTF_DIV_16_N_6:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_DTF_DIV_16_N_6;
+            break;
+        case DTF_DIV_16_N_8:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_DTF_DIV_16_N_8;
+            break;
+        case DTF_DIV_32_N_5:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_DTF_DIV_32_N_5;
+            break;
+        case DTF_DIV_32_N_6:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_DTF_DIV_32_N_6;
+            break;
+        case DTF_DIV_32_N_8:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC3F_MASK) |
+                                TIM_CCMR2_IC3F_DTF_DIV_32_N_8;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_input_capture_4_filter(Filter filter) -> Result
 {
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
-
-	if (!channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (filter)
-	{
-		case NO_FILTER:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_OFF;
-			break;
-		case CK_INT_N_2:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_CK_INT_N_2;
-			break;
-		case CK_INT_N_4:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_CK_INT_N_4;
-			break;
-		case CK_INT_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_CK_INT_N_8;
-			break;
-		case DTF_DIV_2_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_2_N_6;
-			break;
-		case DTF_DIV_2_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_2_N_8;
-			break;
-		case TF_DIV_4_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_4_N_6;
-			break;
-		case DTF_DIV_4_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_4_N_8;
-			break;
-		case DTF_DIV_8_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_8_N_6;
-			break;
-		case DTF_DIV_8_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_8_N_8;
-			break;
-		case DTF_DIV_16_N_5:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_16_N_5;
-			break;
-		case DTF_DIV_16_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_16_N_6;
-			break;
-		case DTF_DIV_16_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_16_N_8;
-			break;
-		case DTF_DIV_32_N_5:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_32_N_5;
-			break;
-		case DTF_DIV_32_N_6:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_32_N_6;
-			break;
-		case DTF_DIV_32_N_8:
-			TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
-			TIM_CCMR2_IC4F_DTF_DIV_32_N_8;
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
+
+    if (!channel_is_input) {
+        return USAGE_ERROR;
+    }
+
+    switch (filter) {
+        case NO_FILTER:
+            TIM_CCMR2(_timer) =
+              (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) | TIM_CCMR2_IC4F_OFF;
+            break;
+        case CK_INT_N_2:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_CK_INT_N_2;
+            break;
+        case CK_INT_N_4:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_CK_INT_N_4;
+            break;
+        case CK_INT_N_8:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_CK_INT_N_8;
+            break;
+        case DTF_DIV_2_N_6:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_DTF_DIV_2_N_6;
+            break;
+        case DTF_DIV_2_N_8:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_DTF_DIV_2_N_8;
+            break;
+        case TF_DIV_4_N_6:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_DTF_DIV_4_N_6;
+            break;
+        case DTF_DIV_4_N_8:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_DTF_DIV_4_N_8;
+            break;
+        case DTF_DIV_8_N_6:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_DTF_DIV_8_N_6;
+            break;
+        case DTF_DIV_8_N_8:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_DTF_DIV_8_N_8;
+            break;
+        case DTF_DIV_16_N_5:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_DTF_DIV_16_N_5;
+            break;
+        case DTF_DIV_16_N_6:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_DTF_DIV_16_N_6;
+            break;
+        case DTF_DIV_16_N_8:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_DTF_DIV_16_N_8;
+            break;
+        case DTF_DIV_32_N_5:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_DTF_DIV_32_N_5;
+            break;
+        case DTF_DIV_32_N_6:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_DTF_DIV_32_N_6;
+            break;
+        case DTF_DIV_32_N_8:
+            TIM_CCMR2(_timer) = (TIM_CCMR1(_timer) & ~TIM_CCMR2_IC4F_MASK) |
+                                TIM_CCMR2_IC4F_DTF_DIV_32_N_8;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::enable_fast_output_compare_3() -> Result
 {
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
+    bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR2(_timer) |= TIM_CCMR2_OC3FE;
-	return OK;
+    TIM_CCMR2(_timer) |= TIM_CCMR2_OC3FE;
+    return OK;
 }
-//9,12
+// 9,12
 auto Timer::disable_fast_output_compare_3() -> Result
 {
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
+    bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC3FE;
-	return OK;
+    TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC3FE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::enable_fast_output_compare_4() -> Result
 {
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
+    bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR2(_timer) |= TIM_CCMR2_OC4FE;
-	return OK;
+    TIM_CCMR2(_timer) |= TIM_CCMR2_OC4FE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_fast_output_compare_4() -> Result
 {
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
+    bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC4FE;
-	return OK;
+    TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC4FE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::enable_output_compare_3_preload() -> Result
 {
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
+    bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR2(_timer) |= TIM_CCMR2_OC3PE;
-	return OK;
+    TIM_CCMR2(_timer) |= TIM_CCMR2_OC3PE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_output_compare_3_preload() -> Result
 {
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
+    bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC3PE;
-	return OK;
+    TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC3PE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::enable_output_compare_4_preload() -> Result
 {
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
+    bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR2(_timer) |= TIM_CCMR2_OC4PE;
-	return OK;
+    TIM_CCMR2(_timer) |= TIM_CCMR2_OC4PE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_output_compare_4_preload() -> Result
 {
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
+    bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
 
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
 
-	TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC4PE;
-	return OK;
+    TIM_CCMR2(_timer) &= ~TIM_CCMR2_OC4PE;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::set_output_compare_3_mode(OcMode mode) -> Result
 {
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case FROZEN:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_FROZEN;
-			break;
-		case ACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_ACTIVE;
-			break;
-		case INACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_INACTIVE;
-			break;
-		case TOGGLE:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_TOGGLE;
-			break;
-		case FORCE_INACTIVE_LEVEL:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_FORCE_LOW;
-			break;
-		case FORCE_ACTIVE_LEVEL:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_FORCE_HIGH;
-			break;
-		case PWM_MODE_1:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_PWM1;
-			break;
-		case PWM_MODE_2:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
-			TIM_CCMR2_OC3M_PWM2;
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC3S_MASK;
+
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
+
+    switch (mode) {
+        case FROZEN:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
+                                TIM_CCMR2_OC3M_FROZEN;
+            break;
+        case ACTIVE_LEVEL_ON_MATCH:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
+                                TIM_CCMR2_OC3M_ACTIVE;
+            break;
+        case INACTIVE_LEVEL_ON_MATCH:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
+                                TIM_CCMR2_OC3M_INACTIVE;
+            break;
+        case TOGGLE:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
+                                TIM_CCMR2_OC3M_TOGGLE;
+            break;
+        case FORCE_INACTIVE_LEVEL:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
+                                TIM_CCMR2_OC3M_FORCE_LOW;
+            break;
+        case FORCE_ACTIVE_LEVEL:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) |
+                                TIM_CCMR2_OC3M_FORCE_HIGH;
+            break;
+        case PWM_MODE_1:
+            TIM_CCMR2(_timer) =
+              (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) | TIM_CCMR2_OC3M_PWM1;
+            break;
+        case PWM_MODE_2:
+            TIM_CCMR2(_timer) =
+              (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC3M_MASK) | TIM_CCMR2_OC3M_PWM2;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::set_output_compare_4_mode(OcMode mode) -> Result
 {
-	bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
-
-	if (channel_is_input) {
-		return USAGE_ERROR;
-	}
-
-	switch (mode)
-	{
-		case FROZEN:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_FROZEN;
-			break;
-		case ACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_ACTIVE;
-			break;
-		case INACTIVE_LEVEL_ON_MATCH:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_INACTIVE;
-			break;
-		case TOGGLE:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_TOGGLE;
-			break;
-		case FORCE_INACTIVE_LEVEL:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_FORCE_LOW;
-			break;
-		case FORCE_ACTIVE_LEVEL:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_FORCE_HIGH;
-			break;
-		case PWM_MODE_1:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_PWM1;
-			break;
-		case PWM_MODE_2:
-			TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
-			TIM_CCMR2_OC4M_PWM2;
-			break;
-	}
-
-	return OK;
-}
-
-//9,12
+    bool channel_is_input = TIM_CCMR2(_timer) & TIM_CCMR2_CC4S_MASK;
+
+    if (channel_is_input) {
+        return USAGE_ERROR;
+    }
+
+    switch (mode) {
+        case FROZEN:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
+                                TIM_CCMR2_OC4M_FROZEN;
+            break;
+        case ACTIVE_LEVEL_ON_MATCH:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
+                                TIM_CCMR2_OC4M_ACTIVE;
+            break;
+        case INACTIVE_LEVEL_ON_MATCH:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
+                                TIM_CCMR2_OC4M_INACTIVE;
+            break;
+        case TOGGLE:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
+                                TIM_CCMR2_OC4M_TOGGLE;
+            break;
+        case FORCE_INACTIVE_LEVEL:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
+                                TIM_CCMR2_OC4M_FORCE_LOW;
+            break;
+        case FORCE_ACTIVE_LEVEL:
+            TIM_CCMR2(_timer) = (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) |
+                                TIM_CCMR2_OC4M_FORCE_HIGH;
+            break;
+        case PWM_MODE_1:
+            TIM_CCMR2(_timer) =
+              (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) | TIM_CCMR2_OC4M_PWM1;
+            break;
+        case PWM_MODE_2:
+            TIM_CCMR2(_timer) =
+              (TIM_CCMR2(_timer) & ~TIM_CCMR2_OC4M_MASK) | TIM_CCMR2_OC4M_PWM2;
+            break;
+    }
+
+    return OK;
+}
+
+// 9,12
 auto Timer::enable_capture_compare_1() -> Result
 {
-	TIM_CCER(_timer) |= TIM_CCER_CC1E;
-	return OK;
+    TIM_CCER(_timer) |= TIM_CCER_CC1E;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_capture_compare_1() -> Result
 {
-	TIM_CCER(_timer) &= ~TIM_CCER_CC1E;
-	return OK;
+    TIM_CCER(_timer) &= ~TIM_CCER_CC1E;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::set_capture_compare_1_polarity(Polarity polarity) -> Result
 {
-	switch (polarity)
-	{
-		case LO_FALLING_EDGE:
-			TIM_CCER(_timer) |= TIM_CCER_CC1P;
-			break;
-		case HI_RISING_EDGE:
-			TIM_CCER(_timer) &= ~TIM_CCER_CC1P;
-			break;
-	}
+    switch (polarity) {
+        case LO_FALLING_EDGE:
+            TIM_CCER(_timer) |= TIM_CCER_CC1P;
+            break;
+        case HI_RISING_EDGE:
+            TIM_CCER(_timer) &= ~TIM_CCER_CC1P;
+            break;
+    }
 
-	return OK;
+    return OK;
 }
 
 auto Timer::set_capture_compare_1_com_polarity(Polarity polarity) -> Result
 {
-	switch (polarity)
-	{
-		case LO_FALLING_EDGE:
-			TIM_CCER(_timer) |= TIM_CCER_CC1NP;
-			break;
-		case HI_RISING_EDGE:
-			TIM_CCER(_timer) &= ~TIM_CCER_CC1NP;
-			break;
-	}
+    switch (polarity) {
+        case LO_FALLING_EDGE:
+            TIM_CCER(_timer) |= TIM_CCER_CC1NP;
+            break;
+        case HI_RISING_EDGE:
+            TIM_CCER(_timer) &= ~TIM_CCER_CC1NP;
+            break;
+    }
 
-	return OK;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::enable_capture_compare_2() -> Result
 {
-	TIM_CCER(_timer) |= TIM_CCER_CC2E;
-	return OK;
+    TIM_CCER(_timer) |= TIM_CCER_CC2E;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_capture_compare_2() -> Result
 {
-	TIM_CCER(_timer) &= ~TIM_CCER_CC2E;
-	return OK;
+    TIM_CCER(_timer) &= ~TIM_CCER_CC2E;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::set_capture_compare_2_polarity(Polarity polarity) -> Result
 {
-	switch (polarity)
-	{
-		case LO_FALLING_EDGE:
-			TIM_CCER(_timer) |= TIM_CCER_CC2P;
-			break;
-		case HI_RISING_EDGE:
-			TIM_CCER(_timer) &= ~TIM_CCER_CC2P;
-			break;
-	}
+    switch (polarity) {
+        case LO_FALLING_EDGE:
+            TIM_CCER(_timer) |= TIM_CCER_CC2P;
+            break;
+        case HI_RISING_EDGE:
+            TIM_CCER(_timer) &= ~TIM_CCER_CC2P;
+            break;
+    }
 
-	return OK;
+    return OK;
 }
 
 auto Timer::enable_capture_compare_3() -> Result
 {
-	TIM_CCER(_timer) |= TIM_CCER_CC3E;
-	return OK;
+    TIM_CCER(_timer) |= TIM_CCER_CC3E;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_capture_compare_3() -> Result
 {
-	TIM_CCER(_timer) &= ~TIM_CCER_CC3E;
-	return OK;
+    TIM_CCER(_timer) &= ~TIM_CCER_CC3E;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::set_capture_compare_3_polarity(Polarity polarity) -> Result
 {
-	switch (polarity)
-	{
-		case LO_FALLING_EDGE:
-			TIM_CCER(_timer) |= TIM_CCER_CC3P;
-			break;
-		case HI_RISING_EDGE:
-			TIM_CCER(_timer) &= ~TIM_CCER_CC3P;
-			break;
-	}
+    switch (polarity) {
+        case LO_FALLING_EDGE:
+            TIM_CCER(_timer) |= TIM_CCER_CC3P;
+            break;
+        case HI_RISING_EDGE:
+            TIM_CCER(_timer) &= ~TIM_CCER_CC3P;
+            break;
+    }
 
-	return OK;
+    return OK;
 }
 
 auto Timer::set_capture_compare_3_com_polarity(Polarity polarity) -> Result
 {
-	switch (polarity)
-	{
-		case LO_FALLING_EDGE:
-			TIM_CCER(_timer) |= TIM_CCER_CC3NP;
-			break;
-		case HI_RISING_EDGE:
-			TIM_CCER(_timer) &= ~TIM_CCER_CC3NP;
-			break;
-	}
+    switch (polarity) {
+        case LO_FALLING_EDGE:
+            TIM_CCER(_timer) |= TIM_CCER_CC3NP;
+            break;
+        case HI_RISING_EDGE:
+            TIM_CCER(_timer) &= ~TIM_CCER_CC3NP;
+            break;
+    }
 
-	return OK;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::enable_capture_compare_4() -> Result
 {
-	TIM_CCER(_timer) |= TIM_CCER_CC4E;
-	return OK;
+    TIM_CCER(_timer) |= TIM_CCER_CC4E;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::disable_capture_compare_4() -> Result
 {
-	TIM_CCER(_timer) &= ~TIM_CCER_CC4E;
-	return OK;
+    TIM_CCER(_timer) &= ~TIM_CCER_CC4E;
+    return OK;
 }
 
-//9,12
+// 9,12
 auto Timer::set_capture_compare_4_polarity(Polarity polarity) -> Result
 {
-	switch (polarity)
-	{
-		case LO_FALLING_EDGE:
-			TIM_CCER(_timer) |= TIM_CCER_CC4P;
-			break;
-		case HI_RISING_EDGE:
-			TIM_CCER(_timer) &= ~TIM_CCER_CC4P;
-			break;
-	}
+    switch (polarity) {
+        case LO_FALLING_EDGE:
+            TIM_CCER(_timer) |= TIM_CCER_CC4P;
+            break;
+        case HI_RISING_EDGE:
+            TIM_CCER(_timer) &= ~TIM_CCER_CC4P;
+            break;
+    }
 
-	return OK;
+    return OK;
 }
 
 auto Timer::set_capture_compare_4_com_polarity(Polarity polarity) -> Result
 {
-	switch (polarity)
-	{
-		case LO_FALLING_EDGE:
-			TIM_CCER(_timer) |= (1<<15);
-			break;
-		case HI_RISING_EDGE:
-			TIM_CCER(_timer) &= ~(1<<15);
-			break;
-	}
+    switch (polarity) {
+        case LO_FALLING_EDGE:
+            TIM_CCER(_timer) |= (1 << 15);
+            break;
+        case HI_RISING_EDGE:
+            TIM_CCER(_timer) &= ~(1 << 15);
+            break;
+    }
 
-	return OK;
+    return OK;
 }
 
-//9,12
+// 9,12
 uint16_t Timer::get_counter_value()
 {
-	return TIM_CNT(_timer);
+    return TIM_CNT(_timer);
 }
 
 uint32_t Timer::get_counter_value32()
 {
-	return TIM_CNT(_timer);
+    return TIM_CNT(_timer);
 }
 
-//9,12
+// 9,12
 void Timer::set_counter_value(uint16_t value)
 {
-	TIM_CNT(_timer) = value;
+    TIM_CNT(_timer) = value;
 }
 
-//9,12
+// 9,12
 uint16_t Timer::get_prescaler_value()
 {
-	return TIM_PSC(_timer);
+    return TIM_PSC(_timer);
 }
 
-//9,12
+// 9,12
 void Timer::set_prescaler_value(uint32_t value)
 {
-	TIM_PSC(_timer) = value;
+    TIM_PSC(_timer) = value;
 }
 
-//9,12
+// 9,12
 uint16_t Timer::get_autoreload_value()
 {
-	return TIM_ARR(_timer);
+    return TIM_ARR(_timer);
 }
 
-//9,12
+// 9,12
 void Timer::set_autoreload_value(uint32_t value)
 {
-	TIM_ARR(_timer) = value;
+    TIM_ARR(_timer) = value;
 }
 
-//9,12
+// 9,12
 uint16_t Timer::get_capture_compare_1_value()
 {
-	return TIM_CCR1(_timer);
+    return TIM_CCR1(_timer);
 }
 
-//9,12
+// 9,12
 void Timer::set_capture_compare_1_value(uint32_t value)
 {
-	TIM_CCR1(_timer) = value;
+    TIM_CCR1(_timer) = value;
 }
 
-//9,12
+// 9,12
 uint16_t Timer::get_capture_compare_2_value()
 {
-	return TIM_CCR2(_timer);
+    return TIM_CCR2(_timer);
 }
 
-//9,12
+// 9,12
 void Timer::set_capture_compare_2_value(uint32_t value)
 {
-	TIM_CCR2(_timer) = value;
+    TIM_CCR2(_timer) = value;
 }
 
 uint16_t Timer::get_capture_compare_3_value()
 {
-	return TIM_CCR3(_timer);
+    return TIM_CCR3(_timer);
 }
 
-//9,12
+// 9,12
 void Timer::set_capture_compare_3_value(uint32_t value)
 {
-	TIM_CCR3(_timer) = value;
+    TIM_CCR3(_timer) = value;
 }
 
-//9,12
+// 9,12
 uint16_t Timer::get_capture_compare_4_value()
 {
-	return TIM_CCR4(_timer);
+    return TIM_CCR4(_timer);
 }
 
-//9,12
+// 9,12
 void Timer::set_capture_compare_4_value(uint32_t value)
 {
-	TIM_CCR4(_timer) = value;
+    TIM_CCR4(_timer) = value;
 }
 
+}  // namespace tim
 
 }  // namespace cm3cpp
-
-}  // namespace tim
diff --git a/cm3cpp_timer.h b/cm3cpp_timer.h
index 5392020..31b78a9 100644
--- a/cm3cpp_timer.h
+++ b/cm3cpp_timer.h
@@ -19,15 +19,15 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/* 
-TIM C++ Wrapper of libopencm3 library for STM32F2, STM32F4 
+/*
+TIM C++ Wrapper of libopencm3 library for STM32F2, STM32F4
 */
 
 #ifndef CM3CPP_TIMER_H_
 #define CM3CPP_TIMER_H_
 
-#include <libopencm3/stm32/timer.h>
 #include <libopencm3/stm32/rcc.h>
+#include <libopencm3/stm32/timer.h>
 
 namespace cm3cpp {
 
@@ -35,40 +35,46 @@ namespace tim {
 
 class Timer
 {
-public:
-	enum Result {
-		OK,
-		USAGE_ERROR,
-		NOT_SUPPORTED
-	};
+ public:
+    enum Result
+    {
+        OK,
+        USAGE_ERROR,
+        NOT_SUPPORTED
+    };
 
-	enum UevSource {
-		COUNTER_OVERFLOW_AND_UG,
-		COUNTER_OVERFLOW,
-	};
+    enum UevSource
+    {
+        COUNTER_OVERFLOW_AND_UG,
+        COUNTER_OVERFLOW,
+    };
 
-	enum CounterMode {
-		ONE_SHOT,
-		CONTINUOUS
-	};
+    enum CounterMode
+    {
+        ONE_SHOT,
+        CONTINUOUS
+    };
 
-	enum CounterDirection {
-		UP,
-		DOWN
-	};
+    enum CounterDirection
+    {
+        UP,
+        DOWN
+    };
 
-	enum Alignment {
-		EDGE,
-		CENTER_DOWN,
-		CENTER_UP,
-		CENTER_UP_DOWN
-	};
+    enum Alignment
+    {
+        EDGE,
+        CENTER_DOWN,
+        CENTER_UP,
+        CENTER_UP_DOWN
+    };
 
-	enum ClockDivision {
-		TIMER_CLOCK_MUL_1,
-		TIMER_CLOCK_MUL_2,
-		TIMER_CLOCK_MUL_4
-	};
+    enum ClockDivision
+    {
+        TIMER_CLOCK_MUL_1,
+        TIMER_CLOCK_MUL_2,
+        TIMER_CLOCK_MUL_4
+    };
 
     enum MasterMode
     {
@@ -82,269 +88,275 @@ public:
         COMPARE_OC4REF,
     };
 
-    enum SlaveMode {
-		DISABLED,
-		SLAVE_RESET,
-		GATED,
-		TRIGGER,
-		EXTERNAL_CLOCK
-	};
+    enum SlaveMode
+    {
+        DISABLED,
+        SLAVE_RESET,
+        GATED,
+        TRIGGER,
+        EXTERNAL_CLOCK
+    };
 
-	enum Trigger {
-		INTERNAL_TRIGGER_0,
-		INTERNAL_TRIGGER_1,
-		INTERNAL_TRIGGER_2,
-		INTERNAL_TRIGGER_3,
-		EDGE_DETECTOR,
-		FILTERED_TIMER_INPUT_1,
-		FILTERED_TIMER_INPUT_2
-	};
+    enum Trigger
+    {
+        INTERNAL_TRIGGER_0,
+        INTERNAL_TRIGGER_1,
+        INTERNAL_TRIGGER_2,
+        INTERNAL_TRIGGER_3,
+        EDGE_DETECTOR,
+        FILTERED_TIMER_INPUT_1,
+        FILTERED_TIMER_INPUT_2
+    };
 
-	enum Flag {
-		UPDATE_INTERRUPT,
-		CAPTURE_COMPARE_1_INTERRUPT,
-		CAPTURE_COMPARE_2_INTERRUPT,
-		CAPTURE_COMPARE_3_INTERRUPT,
-		CAPTURE_COMPARE_4_INTERRUPT,
-		TRIGGER_INTERRUPT,
-		CAPTURE_COMPARE_1_OVERCAPTURE,
-		CAPTURE_COMPARE_2_OVERCAPTURE,
-		CAPTURE_COMPARE_3_OVERCAPTURE,
-		CAPTURE_COMPARE_4_OVERCAPTURE
-	};
+    enum Flag
+    {
+        UPDATE_INTERRUPT,
+        CAPTURE_COMPARE_1_INTERRUPT,
+        CAPTURE_COMPARE_2_INTERRUPT,
+        CAPTURE_COMPARE_3_INTERRUPT,
+        CAPTURE_COMPARE_4_INTERRUPT,
+        TRIGGER_INTERRUPT,
+        CAPTURE_COMPARE_1_OVERCAPTURE,
+        CAPTURE_COMPARE_2_OVERCAPTURE,
+        CAPTURE_COMPARE_3_OVERCAPTURE,
+        CAPTURE_COMPARE_4_OVERCAPTURE
+    };
 
-	enum CcMode {
-		OUTPUT,
-		INPUT_MAPPED_TI1,
-		INPUT_MAPPED_TI2,
-		INPUT_MAPPED_TI3,
-		INPUT_MAPPED_TI4,
-		INPUT_MAPPED_TRC
-	};
+    enum CcMode
+    {
+        OUTPUT,
+        INPUT_MAPPED_TI1,
+        INPUT_MAPPED_TI2,
+        INPUT_MAPPED_TI3,
+        INPUT_MAPPED_TI4,
+        INPUT_MAPPED_TRC
+    };
 
-	enum Prescaler {
-		NO_PRESCALER,
-		CAPTURE_EVERY_2_EVENTS,
-		CAPTURE_EVERY_4_EVENTS,
-		CAPTURE_EVERY_8_EVENTS
-	};
+    enum Prescaler
+    {
+        NO_PRESCALER,
+        CAPTURE_EVERY_2_EVENTS,
+        CAPTURE_EVERY_4_EVENTS,
+        CAPTURE_EVERY_8_EVENTS
+    };
 
-	enum Filter {
-		NO_FILTER,
-		CK_INT_N_2,
-		CK_INT_N_4,
-		CK_INT_N_8,
-		DTF_DIV_2_N_6,
-		DTF_DIV_2_N_8,
-		TF_DIV_4_N_6,
-		DTF_DIV_4_N_8,
-		DTF_DIV_8_N_6,
-		DTF_DIV_8_N_8,
-		DTF_DIV_16_N_5,
-		DTF_DIV_16_N_6,
-		DTF_DIV_16_N_8,
-		DTF_DIV_32_N_5,
-		DTF_DIV_32_N_6,
-		DTF_DIV_32_N_8,
-	};
+    enum Filter
+    {
+        NO_FILTER,
+        CK_INT_N_2,
+        CK_INT_N_4,
+        CK_INT_N_8,
+        DTF_DIV_2_N_6,
+        DTF_DIV_2_N_8,
+        TF_DIV_4_N_6,
+        DTF_DIV_4_N_8,
+        DTF_DIV_8_N_6,
+        DTF_DIV_8_N_8,
+        DTF_DIV_16_N_5,
+        DTF_DIV_16_N_6,
+        DTF_DIV_16_N_8,
+        DTF_DIV_32_N_5,
+        DTF_DIV_32_N_6,
+        DTF_DIV_32_N_8,
+    };
 
-	enum OcMode {
-		FROZEN,
-		ACTIVE_LEVEL_ON_MATCH,
-		INACTIVE_LEVEL_ON_MATCH,
-		TOGGLE,
-		FORCE_INACTIVE_LEVEL,
-		FORCE_ACTIVE_LEVEL,
-		PWM_MODE_1,
-		PWM_MODE_2
-	};
+    enum OcMode
+    {
+        FROZEN,
+        ACTIVE_LEVEL_ON_MATCH,
+        INACTIVE_LEVEL_ON_MATCH,
+        TOGGLE,
+        FORCE_INACTIVE_LEVEL,
+        FORCE_ACTIVE_LEVEL,
+        PWM_MODE_1,
+        PWM_MODE_2
+    };
 
-	enum Polarity {
-		LO_FALLING_EDGE,
-		HI_RISING_EDGE
-	};
+    enum Polarity
+    {
+        LO_FALLING_EDGE,
+        HI_RISING_EDGE
+    };
 
-	Timer(uint8_t timer_num)
-	{
+    Timer(uint8_t timer_num)
+    {
 #if defined(STM32F2) || defined(STM32F4)
-		switch (timer_num)
-		{
-		case 1:
-			_timer = TIM1;
-			rcc_periph_reset_pulse(RST_TIM1);
-			break;
-		case 2:
-			_timer = TIM2;
-			rcc_periph_reset_pulse(RST_TIM2);
-			break;
-		case 3:
-			_timer = TIM3;
-			rcc_periph_reset_pulse(RST_TIM3);
-			break;
-		case 4:
-			_timer = TIM4;
-			rcc_periph_reset_pulse(RST_TIM4);
-			break;
-		case 5:
-			_timer = TIM5;
-			rcc_periph_reset_pulse(RST_TIM5);
-			break;
-		case 6:
-			_timer = TIM6;
-			rcc_periph_reset_pulse(RST_TIM6);
-			break;
-		case 7:
-			_timer = TIM7;
-			rcc_periph_reset_pulse(RST_TIM7);
-			break;
-		case 8:
-			_timer = TIM8;
-			rcc_periph_reset_pulse(RST_TIM8);
-			break;
-		case 9:
-			_timer = TIM9;
-			rcc_periph_reset_pulse(RST_TIM9);
-			break;
-		case 10:
-			_timer = TIM10;
-			rcc_periph_reset_pulse(RST_TIM10);
-			break;
-		case 11:
-			_timer = TIM11;
-			rcc_periph_reset_pulse(RST_TIM11);
-			break;
-		case 12:
-			_timer = TIM12;
-			rcc_periph_reset_pulse(RST_TIM12);
-			break;
-		case 13:
-			_timer = TIM13;
-			rcc_periph_reset_pulse(RST_TIM13);
-			break;
-		case 14:
-			_timer = TIM14;
-			rcc_periph_reset_pulse(RST_TIM14);
-			break;
-		}
+        switch (timer_num) {
+            case 1:
+                _timer = TIM1;
+                rcc_periph_reset_pulse(RST_TIM1);
+                break;
+            case 2:
+                _timer = TIM2;
+                rcc_periph_reset_pulse(RST_TIM2);
+                break;
+            case 3:
+                _timer = TIM3;
+                rcc_periph_reset_pulse(RST_TIM3);
+                break;
+            case 4:
+                _timer = TIM4;
+                rcc_periph_reset_pulse(RST_TIM4);
+                break;
+            case 5:
+                _timer = TIM5;
+                rcc_periph_reset_pulse(RST_TIM5);
+                break;
+            case 6:
+                _timer = TIM6;
+                rcc_periph_reset_pulse(RST_TIM6);
+                break;
+            case 7:
+                _timer = TIM7;
+                rcc_periph_reset_pulse(RST_TIM7);
+                break;
+            case 8:
+                _timer = TIM8;
+                rcc_periph_reset_pulse(RST_TIM8);
+                break;
+            case 9:
+                _timer = TIM9;
+                rcc_periph_reset_pulse(RST_TIM9);
+                break;
+            case 10:
+                _timer = TIM10;
+                rcc_periph_reset_pulse(RST_TIM10);
+                break;
+            case 11:
+                _timer = TIM11;
+                rcc_periph_reset_pulse(RST_TIM11);
+                break;
+            case 12:
+                _timer = TIM12;
+                rcc_periph_reset_pulse(RST_TIM12);
+                break;
+            case 13:
+                _timer = TIM13;
+                rcc_periph_reset_pulse(RST_TIM13);
+                break;
+            case 14:
+                _timer = TIM14;
+                rcc_periph_reset_pulse(RST_TIM14);
+                break;
+        }
 #endif
-	}
-	//CR1//////////////////////////////////////////////////////
-	Result enable_counter();
-	Result disable_counter();
-	Result enable_update_event_generation();
-	Result disable_update_event_generation();
-	Result set_update_event_source(UevSource source);
-	Result set_counter_mode(CounterMode mode);
-	Result set_counter_direction(CounterDirection dir);
-	Result set_alignment(Alignment alignment);
-	Result enable_autoreload_preload();
-	Result disable_autoreload_preload();
-	Result set_clock_division(ClockDivision div);
-	//CR2//////////////////////////////////////////////////////
-	Result set_master_mode(MasterMode mode);
-	//SMCR/////////////////////////////////////////////////////
-	Result set_slave_mode(SlaveMode mode);
-	Result set_trigger(Trigger trigger);
-	Result enable_master_slave_mode();
-	Result disable_master_slave_mode();
-	//DIER/////////////////////////////////////////////////////
-	Result enable_update_interrupt();
-	Result disable_update_interrupt();
-	Result enable_capture_compare_1_interrupt();
-	Result disable_capture_compare_1_interrupt();
-	Result enable_capture_compare_2_interrupt();
-	Result disable_capture_compare_2_interrupt();
-	Result enable_capture_compare_3_interrupt();
-	Result disable_capture_compare_3_interrupt();
-	Result enable_capture_compare_4_interrupt();
-	Result disable_capture_compare_4_interrupt();
-	Result enable_trigger_interrupt();
-	Result disable_trigger_interrupt();
-	//SR///////////////////////////////////////////////////////
-	bool get_flag_status(Flag flag);
-	Result clear_flag_status(Flag flag);
-	//EGR//////////////////////////////////////////////////////
-	void update_generation();
-	//CCMR1////////////////////////////////////////////////////
-	Result set_capture_compare_1_mode(CcMode mode);
-	Result set_capture_compare_2_mode(CcMode mode);
-	Result set_input_capture_1_prescaler(Prescaler prescaler);
-	Result set_input_capture_2_prescaler(Prescaler prescaler);
-	Result set_input_capture_1_filter(Filter filter);
-	Result set_input_capture_2_filter(Filter filter);
-	Result enable_fast_output_compare_1();
-	Result disable_fast_output_compare_1();
-	Result enable_fast_output_compare_2();
-	Result disable_fast_output_compare_2();
-	Result enable_output_compare_1_preload();
-	Result disable_output_compare_1_preload();
-	Result enable_output_compare_2_preload();
-	Result disable_output_compare_2_preload();
-	Result set_output_compare_1_mode(OcMode mode);
-	Result set_output_compare_2_mode(OcMode mode);
-	//CCMR2////////////////////////////////////////////////////
-	Result set_capture_compare_3_mode(CcMode mode);
-	Result set_capture_compare_4_mode(CcMode mode);
-	Result set_input_capture_3_prescaler(Prescaler prescaler);
-	Result set_input_capture_4_prescaler(Prescaler prescaler);
-	Result set_input_capture_3_filter(Filter filter);
-	Result set_input_capture_4_filter(Filter filter);
-	Result enable_fast_output_compare_3();
-	Result disable_fast_output_compare_3();
-	Result enable_fast_output_compare_4();
-	Result disable_fast_output_compare_4();
-	Result enable_output_compare_3_preload();
-	Result disable_output_compare_3_preload();
-	Result enable_output_compare_4_preload();
-	Result disable_output_compare_4_preload();
-	Result set_output_compare_3_mode(OcMode mode);
-	Result set_output_compare_4_mode(OcMode mode);
-	//CCER/////////////////////////////////////////////////////
-	Result enable_capture_compare_1();
-	Result disable_capture_compare_1();
-	Result set_capture_compare_1_polarity(Polarity polarity);
-	Result set_capture_compare_1_com_polarity(Polarity polarity);
-	Result enable_capture_compare_2();
-	Result disable_capture_compare_2();
-	Result set_capture_compare_2_polarity(Polarity polarity);
-	Result enable_capture_compare_3();
-	Result disable_capture_compare_3();
-	Result set_capture_compare_3_polarity(Polarity polarity);
-	Result set_capture_compare_3_com_polarity(Polarity polarity);
-	Result enable_capture_compare_4();
-	Result disable_capture_compare_4();
-	Result set_capture_compare_4_polarity(Polarity polarity);
-	Result set_capture_compare_4_com_polarity(Polarity polarity);
-	//CNT//////////////////////////////////////////////////////
-	uint16_t get_counter_value();
-	uint32_t get_counter_value32();
-	void set_counter_value(uint16_t value);
-	//PSC//////////////////////////////////////////////////////
-	uint16_t get_prescaler_value();
-	void set_prescaler_value(uint32_t value);
-	//ARR//////////////////////////////////////////////////////
-	uint16_t get_autoreload_value();
-	void set_autoreload_value(uint32_t value);
-	//CCR1/////////////////////////////////////////////////////
-	uint16_t get_capture_compare_1_value();
-	void set_capture_compare_1_value(uint32_t value);
-	//CCR2/////////////////////////////////////////////////////
-	uint16_t get_capture_compare_2_value();
-	void set_capture_compare_2_value(uint32_t value);
-	//CCR3/////////////////////////////////////////////////////
-	uint16_t get_capture_compare_3_value();
-	void set_capture_compare_3_value(uint32_t value);
-	//CCR4/////////////////////////////////////////////////////
-	uint16_t get_capture_compare_4_value();
-	void set_capture_compare_4_value(uint32_t value);
+    }
+    // CR1//////////////////////////////////////////////////////
+    Result enable_counter();
+    Result disable_counter();
+    Result enable_update_event_generation();
+    Result disable_update_event_generation();
+    Result set_update_event_source(UevSource source);
+    Result set_counter_mode(CounterMode mode);
+    Result set_counter_direction(CounterDirection dir);
+    Result set_alignment(Alignment alignment);
+    Result enable_autoreload_preload();
+    Result disable_autoreload_preload();
+    Result set_clock_division(ClockDivision div);
+    // CR2//////////////////////////////////////////////////////
+    Result set_master_mode(MasterMode mode);
+    // SMCR/////////////////////////////////////////////////////
+    Result set_slave_mode(SlaveMode mode);
+    Result set_trigger(Trigger trigger);
+    Result enable_master_slave_mode();
+    Result disable_master_slave_mode();
+    // DIER/////////////////////////////////////////////////////
+    Result enable_update_interrupt();
+    Result disable_update_interrupt();
+    Result enable_capture_compare_1_interrupt();
+    Result disable_capture_compare_1_interrupt();
+    Result enable_capture_compare_2_interrupt();
+    Result disable_capture_compare_2_interrupt();
+    Result enable_capture_compare_3_interrupt();
+    Result disable_capture_compare_3_interrupt();
+    Result enable_capture_compare_4_interrupt();
+    Result disable_capture_compare_4_interrupt();
+    Result enable_trigger_interrupt();
+    Result disable_trigger_interrupt();
+    // SR///////////////////////////////////////////////////////
+    bool get_flag_status(Flag flag);
+    Result clear_flag_status(Flag flag);
+    // EGR//////////////////////////////////////////////////////
+    void update_generation();
+    // CCMR1////////////////////////////////////////////////////
+    Result set_capture_compare_1_mode(CcMode mode);
+    Result set_capture_compare_2_mode(CcMode mode);
+    Result set_input_capture_1_prescaler(Prescaler prescaler);
+    Result set_input_capture_2_prescaler(Prescaler prescaler);
+    Result set_input_capture_1_filter(Filter filter);
+    Result set_input_capture_2_filter(Filter filter);
+    Result enable_fast_output_compare_1();
+    Result disable_fast_output_compare_1();
+    Result enable_fast_output_compare_2();
+    Result disable_fast_output_compare_2();
+    Result enable_output_compare_1_preload();
+    Result disable_output_compare_1_preload();
+    Result enable_output_compare_2_preload();
+    Result disable_output_compare_2_preload();
+    Result set_output_compare_1_mode(OcMode mode);
+    Result set_output_compare_2_mode(OcMode mode);
+    // CCMR2////////////////////////////////////////////////////
+    Result set_capture_compare_3_mode(CcMode mode);
+    Result set_capture_compare_4_mode(CcMode mode);
+    Result set_input_capture_3_prescaler(Prescaler prescaler);
+    Result set_input_capture_4_prescaler(Prescaler prescaler);
+    Result set_input_capture_3_filter(Filter filter);
+    Result set_input_capture_4_filter(Filter filter);
+    Result enable_fast_output_compare_3();
+    Result disable_fast_output_compare_3();
+    Result enable_fast_output_compare_4();
+    Result disable_fast_output_compare_4();
+    Result enable_output_compare_3_preload();
+    Result disable_output_compare_3_preload();
+    Result enable_output_compare_4_preload();
+    Result disable_output_compare_4_preload();
+    Result set_output_compare_3_mode(OcMode mode);
+    Result set_output_compare_4_mode(OcMode mode);
+    // CCER/////////////////////////////////////////////////////
+    Result enable_capture_compare_1();
+    Result disable_capture_compare_1();
+    Result set_capture_compare_1_polarity(Polarity polarity);
+    Result set_capture_compare_1_com_polarity(Polarity polarity);
+    Result enable_capture_compare_2();
+    Result disable_capture_compare_2();
+    Result set_capture_compare_2_polarity(Polarity polarity);
+    Result enable_capture_compare_3();
+    Result disable_capture_compare_3();
+    Result set_capture_compare_3_polarity(Polarity polarity);
+    Result set_capture_compare_3_com_polarity(Polarity polarity);
+    Result enable_capture_compare_4();
+    Result disable_capture_compare_4();
+    Result set_capture_compare_4_polarity(Polarity polarity);
+    Result set_capture_compare_4_com_polarity(Polarity polarity);
+    // CNT//////////////////////////////////////////////////////
+    uint16_t get_counter_value();
+    uint32_t get_counter_value32();
+    void set_counter_value(uint16_t value);
+    // PSC//////////////////////////////////////////////////////
+    uint16_t get_prescaler_value();
+    void set_prescaler_value(uint32_t value);
+    // ARR//////////////////////////////////////////////////////
+    uint16_t get_autoreload_value();
+    void set_autoreload_value(uint32_t value);
+    // CCR1/////////////////////////////////////////////////////
+    uint16_t get_capture_compare_1_value();
+    void set_capture_compare_1_value(uint32_t value);
+    // CCR2/////////////////////////////////////////////////////
+    uint16_t get_capture_compare_2_value();
+    void set_capture_compare_2_value(uint32_t value);
+    // CCR3/////////////////////////////////////////////////////
+    uint16_t get_capture_compare_3_value();
+    void set_capture_compare_3_value(uint32_t value);
+    // CCR4/////////////////////////////////////////////////////
+    uint16_t get_capture_compare_4_value();
+    void set_capture_compare_4_value(uint32_t value);
 
-private:
-	uint32_t _timer;
+ private:
+    uint32_t _timer;
 };
 
+}  // namespace tim
 
 }  // namespace cm3cpp
 
-}  // namespace tim
-
 #endif /* CM3CPP_TIMER_H_ */
diff --git a/cm3cpp_usart.cpp b/cm3cpp_usart.cpp
index 40b98bd..0c2e3e2 100644
--- a/cm3cpp_usart.cpp
+++ b/cm3cpp_usart.cpp
@@ -19,8 +19,8 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.

  */

 

-/* 

-USART C++ Wrapper of libopencm3 library for STM32F2, STM32F4 

+/*

+USART C++ Wrapper of libopencm3 library for STM32F2, STM32F4

 */

 

 #include "cm3cpp_usart.h"

@@ -31,69 +31,68 @@ namespace usart {
 

 Usart::Usart(LowLevelConfig config, Settings settings)

 {

-	init(config, settings);

+    init(config, settings);

 }

 

 void Usart::init(LowLevelConfig config, Settings settings)

 {

-	_mode = settings.mode;

-

-	switch (config.usart_number)

-	{

-		case 1:

-		    _usart = USART1;

-			_usart_nvic = NVIC_USART1_IRQ;

-        break;

-		case 2:

-		    _usart = USART2;

-		    _usart_nvic = NVIC_USART2_IRQ;

-        break;

-		case 3:

-		    _usart = USART3;

-		    _usart_nvic = NVIC_USART3_IRQ;

-        break;

-		case 4:

-		    _usart = UART4;

-		    _usart_nvic = NVIC_UART4_IRQ;

-        break;

-		case 5:

-		    _usart = UART5;

-		    _usart_nvic = NVIC_UART5_IRQ;

-        break;

-		case 6:

-		    _usart = USART6;

-		    _usart_nvic = NVIC_USART6_IRQ;

-        break;

-	}

-

-	set_settings(settings);

-	usart_enable(_usart);

-

-	if (_mode == Mode::RX or _mode == Mode::RX_TX)

-	{

-		_rx.init(config.rx);

-

-		if ((config.usart_number >= 1) && (config.usart_number <= 3))

-			_rx.set_af(Gpio::AltFuncNumber::AF7);

-		else

-			_rx.set_af(Gpio::AltFuncNumber::AF8);

-

-		_rx.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);

-		_rx.set_output_options(Gpio::OutputType::PUSH_PULL, Gpio::Speed::MEDIUM_25MHz);

-	}

-

-	if (_mode == Mode::TX or _mode == Mode::RX_TX)

-	{

-		_tx.init(config.tx);

-

-		if ((config.usart_number >= 1) && (config.usart_number <= 3))

-			_tx.set_af(Gpio::AltFuncNumber::AF7);

-		else

-			_tx.set_af(Gpio::AltFuncNumber::AF8);

-

-		_tx.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);

-		_tx.set_output_options(Gpio::OutputType::PUSH_PULL, Gpio::Speed::MEDIUM_25MHz);

-	}

+    _mode = settings.mode;

+

+    switch (config.usart_number) {

+        case 1:

+            _usart = USART1;

+            _usart_nvic = NVIC_USART1_IRQ;

+            break;

+        case 2:

+            _usart = USART2;

+            _usart_nvic = NVIC_USART2_IRQ;

+            break;

+        case 3:

+            _usart = USART3;

+            _usart_nvic = NVIC_USART3_IRQ;

+            break;

+        case 4:

+            _usart = UART4;

+            _usart_nvic = NVIC_UART4_IRQ;

+            break;

+        case 5:

+            _usart = UART5;

+            _usart_nvic = NVIC_UART5_IRQ;

+            break;

+        case 6:

+            _usart = USART6;

+            _usart_nvic = NVIC_USART6_IRQ;

+            break;

+    }

+

+    set_settings(settings);

+    usart_enable(_usart);

+

+    if (_mode == Mode::RX or _mode == Mode::RX_TX) {

+        _rx.init(config.rx);

+

+        if ((config.usart_number >= 1) && (config.usart_number <= 3))

+            _rx.set_af(Gpio::AltFuncNumber::AF7);

+        else

+            _rx.set_af(Gpio::AltFuncNumber::AF8);

+

+        _rx.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);

+        _rx.set_output_options(Gpio::OutputType::PUSH_PULL,

+                               Gpio::Speed::MEDIUM_25MHz);

+    }

+

+    if (_mode == Mode::TX or _mode == Mode::RX_TX) {

+        _tx.init(config.tx);

+

+        if ((config.usart_number >= 1) && (config.usart_number <= 3))

+            _tx.set_af(Gpio::AltFuncNumber::AF7);

+        else

+            _tx.set_af(Gpio::AltFuncNumber::AF8);

+

+        _tx.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);

+        _tx.set_output_options(Gpio::OutputType::PUSH_PULL,

+                               Gpio::Speed::MEDIUM_25MHz);

+    }

 

     nvic_set_priority(_usart_nvic, config.nvic_priority);

     nvic_enable_irq(_usart_nvic);

@@ -101,27 +100,27 @@ void Usart::init(LowLevelConfig config, Settings settings)
 

 void Usart::deinit()

 {

-	usart_disable(_usart);

-	nvic_disable_irq(_usart_nvic);

+    usart_disable(_usart);

+    nvic_disable_irq(_usart_nvic);

 

-	if (_mode == Mode::RX or _mode == Mode::RX_TX)

-		_rx.mode_setup(Gpio::Mode::INPUT, Gpio::PullMode::NO_PULL);

+    if (_mode == Mode::RX or _mode == Mode::RX_TX)

+        _rx.mode_setup(Gpio::Mode::INPUT, Gpio::PullMode::NO_PULL);

 

-	if (_mode == Mode::TX or _mode == Mode::RX_TX)

-		_tx.mode_setup(Gpio::Mode::INPUT, Gpio::PullMode::NO_PULL);

+    if (_mode == Mode::TX or _mode == Mode::RX_TX)

+        _tx.mode_setup(Gpio::Mode::INPUT, Gpio::PullMode::NO_PULL);

 }

 

 void Usart::set_settings(Settings settings)

 {

-	_mode = settings.mode;

-	usart_set_baudrate(_usart, settings.baud_rate);

-	usart_set_databits(_usart, settings.word_length);

-	usart_set_stopbits(_usart, settings.stop_bits);

-	usart_set_mode(_usart, settings.mode);

-	usart_set_parity(_usart, settings.parity);

-	usart_set_flow_control(_usart, settings.flow_control);

+    _mode = settings.mode;

+    usart_set_baudrate(_usart, settings.baud_rate);

+    usart_set_databits(_usart, settings.word_length);

+    usart_set_stopbits(_usart, settings.stop_bits);

+    usart_set_mode(_usart, settings.mode);

+    usart_set_parity(_usart, settings.parity);

+    usart_set_flow_control(_usart, settings.flow_control);

 }

 

-} // namespace usart

+}  // namespace usart

 

-} // namespace cm3cpp

+}  // namespace cm3cpp

diff --git a/cm3cpp_usart.h b/cm3cpp_usart.h
index d131647..89e018e 100644
--- a/cm3cpp_usart.h
+++ b/cm3cpp_usart.h
@@ -19,20 +19,17 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.

  */

 

-/* 

-USART C++ Wrapper of libopencm3 library for STM32F2, STM32F4 

+/*

+USART C++ Wrapper of libopencm3 library for STM32F2, STM32F4

 */

 

 #ifndef CM3CPP_USART_H_

 #define CM3CPP_USART_H_

 

-/**************************************************************************************************

- * GENERAL INCLUDES

- *************************************************************************************************/

+// GENERAL INCLUDES

 #include <cstdint>

-/**************************************************************************************************

- * LIBOPENCM3 INCLUDES

- *************************************************************************************************/

+

+// LIBOPENCM3 INCLUDES

 #include <libopencm3/stm32/usart.h>

 #ifdef STM32F2

 #include <libopencm3/stm32/f2/nvic.h>

@@ -40,14 +37,12 @@ USART C++ Wrapper of libopencm3 library for STM32F2, STM32F4
 #ifdef STM32F4

 #include <libopencm3/stm32/f4/nvic.h>

 #endif

-/**************************************************************************************************

- * CM3CPP INCLUDES

- *************************************************************************************************/

-#include "private/assert.h"

-#include <cm3cpp_config.h>

-#include "cm3cpp_gpio.h"

 

+// CM3CPP INCLUDES

+#include "cm3cpp_gpio.h"

 #include "irq/cm3cpp_irq.h"

+#include "private/assert.h"

+#include <cm3cpp_config.h>

 

 namespace cm3cpp {

 

@@ -55,195 +50,158 @@ namespace usart {
 

 enum DataBits : uint8_t

 {

-	_8 = 8,

-	_9 = 9

+    _8 = 8,

+    _9 = 9

 };

 

 enum Mode : uint16_t

 {

-	RX    = USART_MODE_RX,

-	TX    = USART_MODE_TX,

-	RX_TX = USART_MODE_TX_RX

+    RX = USART_MODE_RX,

+    TX = USART_MODE_TX,

+    RX_TX = USART_MODE_TX_RX

 };

 

 enum StopBits : uint16_t

 {

-	_0_5 = USART_STOPBITS_0_5,

-	_1   = USART_STOPBITS_1,

-	_1_5 = USART_STOPBITS_1_5,

-	_2   = USART_STOPBITS_2

+    _0_5 = USART_STOPBITS_0_5,

+    _1 = USART_STOPBITS_1,

+    _1_5 = USART_STOPBITS_1_5,

+    _2 = USART_STOPBITS_2

 };

 

 enum Parity : uint16_t

 {

-	PAR_NONE = USART_PARITY_NONE,

-	PAR_EVEN = USART_PARITY_EVEN,

-	PAR_ODD  = USART_PARITY_ODD

+    PAR_NONE = USART_PARITY_NONE,

+    PAR_EVEN = USART_PARITY_EVEN,

+    PAR_ODD = USART_PARITY_ODD

 };

 

 enum FlowControl : uint16_t

 {

-	NONE    = USART_FLOWCONTROL_NONE,

-	RTS     = USART_FLOWCONTROL_RTS,

-	CTS     = USART_FLOWCONTROL_CTS,

-	RTS_CTS = USART_FLOWCONTROL_RTS_CTS

+    NONE = USART_FLOWCONTROL_NONE,

+    RTS = USART_FLOWCONTROL_RTS,

+    CTS = USART_FLOWCONTROL_CTS,

+    RTS_CTS = USART_FLOWCONTROL_RTS_CTS

 };

 

 class Usart

 {

-public:

-	using Gpio = gpio::Gpio;

-

-	enum class Flag : uint16_t

-	{

-		TRANSMIT_COMPLETE = USART_SR_TC,

-		TX_BUFFER_EMPTY   = USART_SR_TXE,

-		RX_NOT_EMPTY      = USART_SR_RXNE,

-	};

-

-	struct Settings

-	{

-		uint32_t baud_rate;

-		DataBits word_length;

-		StopBits stop_bits;

-		Parity parity;

-		Mode mode;

-		FlowControl flow_control;

-	};

-

-	struct LowLevelConfig

-	{

-	    uint8_t usart_number;

-		gpio::Gpio::Pinout tx;

-		gpio::Gpio::Pinout rx;

-		uint8_t nvic_priority;

-	};

-

-	Usart() = default;

-

-	Usart(LowLevelConfig config, Settings settings);

-

-	void init(LowLevelConfig config, Settings settings);

-

-	void deinit();

-

-	void set_settings(Settings settings);

-

-	bool get_flag_status(Flag flag)

-	{

-		return usart_get_flag(_usart, (uint16_t)flag);

-	}

-

-	bool interrupt_source_rx() {

-		return (((USART_CR1(_usart) & USART_CR1_RXNEIE) != 0) &&

-				 usart_get_flag(_usart, USART_SR_RXNE));

-	}

-

-	bool interrupt_source_tx() {

-		return (((USART_CR1(_usart) & USART_CR1_TXEIE) != 0) &&

-				 usart_get_flag(_usart, USART_SR_TXE));

-	}

-

-	bool interrupt_source_TC()

-	{

-		return (((USART_CR1(_usart) & USART_CR1_TCIE) != 0) &&

-				usart_get_flag(_usart, USART_SR_TC));

-	}

+ public:

+    using Gpio = gpio::Gpio;

 

-    void clear_tc_flag() { USART_SR(_usart) = ~USART_SR_TC; }

+    enum class Flag : uint16_t

+    {

+        TRANSMIT_COMPLETE = USART_SR_TC,

+        TX_BUFFER_EMPTY = USART_SR_TXE,

+        RX_NOT_EMPTY = USART_SR_RXNE,

+    };

 

-    void enable_irq() {

-        nvic_enable_irq(_usart_nvic);

-    }

+    struct Settings

+    {

+        uint32_t baud_rate;

+        DataBits word_length;

+        StopBits stop_bits;

+        Parity parity;

+        Mode mode;

+        FlowControl flow_control;

+    };

+

+    struct LowLevelConfig

+    {

+        uint8_t usart_number;

+        gpio::Gpio::Pinout tx;

+        gpio::Gpio::Pinout rx;

+        uint8_t nvic_priority;

+    };

 

-	void disable_irq() {

-	    nvic_disable_irq(_usart_nvic);

-	}

+    Usart() = default;

 

-	void enable_rx_interrupt()

-	{

-		usart_enable_rx_interrupt(_usart);

-	}

+    Usart(LowLevelConfig config, Settings settings);

 

-	void enable_tx_interrupt() {

-		usart_enable_tx_interrupt(_usart);

-	}

+    void init(LowLevelConfig config, Settings settings);

 

-	void enable_tc_interrupt()

-	{

-		USART_CR1(_usart) |= USART_CR1_TCIE;

-	}

+    void deinit();

 

-	void disable_rx_interrupt()

-	{

-		usart_disable_rx_interrupt(_usart);

-	}

+    void set_settings(Settings settings);

 

-	void disable_tx_interrupt() {

-		usart_disable_tx_interrupt(_usart);

-	}

+    bool get_flag_status(Flag flag)

+    {

+        return usart_get_flag(_usart, (uint16_t)flag);

+    }

 

-	void disable_tc_interrupt() {

-		USART_CR1(_usart) &= ~USART_CR1_TCIE;

-	}

+    bool interrupt_source_rx()

+    {

+        return (((USART_CR1(_usart) & USART_CR1_RXNEIE) != 0) &&

+                usart_get_flag(_usart, USART_SR_RXNE));

+    }

 

-    bool is_framing_error() {

-        return (USART_SR(_usart) & USART_SR_FE)  != 0;

+    bool interrupt_source_tx()

+    {

+        return (((USART_CR1(_usart) & USART_CR1_TXEIE) != 0) &&

+                usart_get_flag(_usart, USART_SR_TXE));

     }

 

-    bool is_overrun_error() {

-        return (USART_SR(_usart) & USART_SR_IDLE) != 0;

+    bool interrupt_source_TC()

+    {

+        return (((USART_CR1(_usart) & USART_CR1_TCIE) != 0) &&

+                usart_get_flag(_usart, USART_SR_TC));

     }

 

+    void clear_tc_flag() { USART_SR(_usart) = ~USART_SR_TC; }

+

+    void enable_irq() { nvic_enable_irq(_usart_nvic); }

+

+    void disable_irq() { nvic_disable_irq(_usart_nvic); }

+

+    void enable_rx_interrupt() { usart_enable_rx_interrupt(_usart); }

+

+    void enable_tx_interrupt() { usart_enable_tx_interrupt(_usart); }

+

+    void enable_tc_interrupt() { USART_CR1(_usart) |= USART_CR1_TCIE; }

+

+    void disable_rx_interrupt() { usart_disable_rx_interrupt(_usart); }

+

+    void disable_tx_interrupt() { usart_disable_tx_interrupt(_usart); }

+

+    void disable_tc_interrupt() { USART_CR1(_usart) &= ~USART_CR1_TCIE; }

+

+    bool is_framing_error() { return (USART_SR(_usart) & USART_SR_FE) != 0; }

+

+    bool is_overrun_error() { return (USART_SR(_usart) & USART_SR_IDLE) != 0; }

+

     bool is_any_error_occurred()

     {

         return (USART_SR(_usart) &

                 (USART_SR_ORE | USART_SR_FE | USART_SR_PE | USART_SR_NE)) != 0;

     }

 

-    uint32_t get_sr_reg() {

-    	return USART_SR(_usart);

-    }

+    uint32_t get_sr_reg() { return USART_SR(_usart); }

 

-    bool is_data_received() {

-        return (USART_SR(_usart) & USART_SR_RXNE) != 0;

-    }

+    bool is_data_received() { return (USART_SR(_usart) & USART_SR_RXNE) != 0; }

 

-    bool is_data_sended() {

-    	return (USART_SR(_usart) & USART_SR_TXE) != 0;

-    }

+    bool is_data_sended() { return (USART_SR(_usart) & USART_SR_TXE) != 0; }

 

-    void write_blocking(uint16_t data) {

-	    usart_send_blocking(_usart, data);

-	}

+    void write_blocking(uint16_t data) { usart_send_blocking(_usart, data); }

 

-    void write(uint16_t data) {

-        usart_send(_usart, data);

-    }

+    void write(uint16_t data) { usart_send(_usart, data); }

 

-	uint16_t read() {

-	    return usart_recv(_usart);

-	}

+    uint16_t read() { return usart_recv(_usart); }

 

-	uint16_t read_blocking() {

-		return usart_recv_blocking(_usart);

-	}

+    uint16_t read_blocking() { return usart_recv_blocking(_usart); }

 

-	auto get_irq() {

-		return static_cast<Interrupt>(_usart_nvic);

-	}

+    auto get_irq() { return static_cast<Interrupt>(_usart_nvic); }

 

-protected:

-	Gpio     _rx;

-	Gpio     _tx;

-	uint32_t _usart;

-	uint32_t _usart_nvic;

+ protected:

+    Gpio _rx;

+    Gpio _tx;

+    uint32_t _usart;

+    uint32_t _usart_nvic;

 

-	Mode _mode;

+    Mode _mode;

 };

 

-} // namespace usart

+}  // namespace usart

 

-} // namespace cm3cpp

+}  // namespace cm3cpp

 

 #endif /* CM3CPP_USART_H_ */

diff --git a/cm3cpp_usart_rb.cpp b/cm3cpp_usart_rb.cpp
index b7270d7..adb332d 100644
--- a/cm3cpp_usart_rb.cpp
+++ b/cm3cpp_usart_rb.cpp
@@ -19,8 +19,8 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/* 
-USART C++ Wrapper of libopencm3 library for STM32F2, STM32F4 
+/*
+USART C++ Wrapper of libopencm3 library for STM32F2, STM32F4
 */
 
 #include "cm3cpp_usart_rb.h"
@@ -29,17 +29,19 @@ namespace cm3cpp {
 
 namespace usart {
 
-UsartRb::UsartRb(LowLevelConfig config, Settings settings,
-			     uint32_t rb_in_size, uint32_t rb_out_size)
-    : Usart(config, settings)
+UsartRb::UsartRb(LowLevelConfig config,
+                 Settings settings,
+                 uint32_t rb_in_size,
+                 uint32_t rb_out_size) :
+  Usart(config, settings)
 {
-	rb_in = new utils::RoundBuffer(rb_in_size);
-	rb_out = new utils::RoundBuffer(rb_out_size);
+    rb_in = new utils::RoundBuffer(rb_in_size);
+    rb_out = new utils::RoundBuffer(rb_out_size);
 
-	if (settings.mode & USART_MODE_RX)
-		usart_enable_rx_interrupt(_usart);
+    if (settings.mode & USART_MODE_RX)
+        usart_enable_rx_interrupt(_usart);
 }
 
-} // usart
+}  // namespace usart
 
-} // namespace cm3cpp
+}  // namespace cm3cpp
diff --git a/cm3cpp_usart_rb.h b/cm3cpp_usart_rb.h
index 57eeef0..b4b1391 100644
--- a/cm3cpp_usart_rb.h
+++ b/cm3cpp_usart_rb.h
@@ -19,8 +19,8 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/* 
-USART C++ Wrapper of libopencm3 library for STM32F2, STM32F4 
+/*
+USART C++ Wrapper of libopencm3 library for STM32F2, STM32F4
 */
 
 #ifndef CM3CPP_USART_RB_H_
@@ -29,8 +29,8 @@ USART C++ Wrapper of libopencm3 library for STM32F2, STM32F4
 /**************************************************************************************************
  * CM3CPP INCLUDES
  *************************************************************************************************/
-#include "utils/round_buffer.h"
 #include "cm3cpp_usart.h"
+#include "utils/round_buffer.h"
 
 namespace cm3cpp {
 
@@ -38,47 +38,47 @@ namespace usart {
 
 class UsartRb : public Usart
 {
-public:
-	utils::RoundBuffer *rb_in;
-	utils::RoundBuffer *rb_out;
+ public:
+    utils::RoundBuffer* rb_in;
+    utils::RoundBuffer* rb_out;
 
-	UsartRb(LowLevelConfig config, Settings settings,
-	        uint32_t rb_in_size, uint32_t rb_out_size);
+    UsartRb(LowLevelConfig config,
+            Settings settings,
+            uint32_t rb_in_size,
+            uint32_t rb_out_size);
 
-	CM3CPP_EXPLISIT_DESTRUCTOR(UsartRb)
+    CM3CPP_EXPLISIT_DESTRUCTOR(UsartRb)
 
-	void start_send() {
-		usart_enable_tx_interrupt(_usart);
-	}
+    void start_send() { usart_enable_tx_interrupt(_usart); }
 
-	void receive_handler()
-	{
-		if (interrupt_source_rx()) {
-			rb_in->push(read());
-		}
-	}
+    void receive_handler()
+    {
+        if (interrupt_source_rx()) {
+            rb_in->push(read());
+        }
+    }
 
-	void transmit_handler()
-	{
-		if (interrupt_source_tx()) {
-			if (rb_out->get_count()) {
-				write(rb_out->pop());
-			}
-			else {
-				usart_disable_tx_interrupt(_usart);
-			}
-		}
-	}
+    void transmit_handler()
+    {
+        if (interrupt_source_tx()) {
+            if (rb_out->get_count()) {
+                write(rb_out->pop());
+            }
+            else {
+                usart_disable_tx_interrupt(_usart);
+            }
+        }
+    }
 
-	void inirq()
-	{
-		receive_handler();
-		transmit_handler();
-	}
+    void inirq()
+    {
+        receive_handler();
+        transmit_handler();
+    }
 };
 
-} // namespace usart
+}  // namespace usart
 
-} // namespace cm3cpp
+}  // namespace cm3cpp
 
 #endif /* CM3CPP_USART_RB_H_ */
diff --git a/extra/one_wire.cpp b/extra/one_wire.cpp
index 5f5f2b1..451c9e2 100644
--- a/extra/one_wire.cpp
+++ b/extra/one_wire.cpp
@@ -5,32 +5,33 @@ namespace cm3cpp {
 namespace extra {
 
 OneWire::OneWire(Gpio::Pinout p, uint8_t tim_number, uint32_t tim_presc) :
-	_pinout(p), _timer(new Timer(tim_number))
+  _pinout(p),
+  _timer(tim_number)
 {
-	_timer->set_counter_direction(Timer::CounterDirection::UP);
-	_timer->set_alignment(Timer::Alignment::EDGE);
-	_timer->set_clock_division(Timer::ClockDivision::TIMER_CLOCK_MUL_1);
-	_timer->set_prescaler_value(tim_presc);
-	_timer->set_counter_mode(Timer::CounterMode::CONTINUOUS);
-	_timer->disable_autoreload_preload();
-	_timer->set_counter_value(0);
-
-	_last_discrepancy = 0;
-	_last_device = false;
-	_last_family_discrepancy = 0;
+    _timer.set_counter_direction(Timer::CounterDirection::UP);
+    _timer.set_alignment(Timer::Alignment::EDGE);
+    _timer.set_clock_division(Timer::ClockDivision::TIMER_CLOCK_MUL_1);
+    _timer.set_prescaler_value(tim_presc);
+    _timer.set_counter_mode(Timer::CounterMode::CONTINUOUS);
+    _timer.disable_autoreload_preload();
+    _timer.set_counter_value(0);
+
+    _last_discrepancy = 0;
+    _last_device = false;
+    _last_family_discrepancy = 0;
 }
 
 uint8_t OneWire::read_byte(void)
 {
     uint8_t data = 0;
 
-    for (uint8_t bit_count = 0; bit_count < 8; bit_count++)
-    {
+    for (uint8_t bit_count = 0; bit_count < 8; bit_count++) {
         /*pull low to initiate read*/
-    	_pinout.mode_setup(Gpio::Mode::OUTPUT, Gpio::PullMode::PULL_UP);
-    	_pinout.set_output_options(Gpio::OutputType::OPEN_DRAIN, Gpio::Speed::FAST_50MHz);
-    	_pinout.clear();
-    	_wait(_LOW_PULSE_TIME_US);
+        _pinout.mode_setup(Gpio::Mode::OUTPUT, Gpio::PullMode::PULL_UP);
+        _pinout.set_output_options(Gpio::OutputType::OPEN_DRAIN,
+                                   Gpio::Speed::FAST_50MHz);
+        _pinout.clear();
+        _wait(_LOW_PULSE_TIME_US);
 
         /*float high*/
         _pinout.mode_setup(Gpio::Mode::INPUT, Gpio::PullMode::PULL_UP);
@@ -50,13 +51,13 @@ uint8_t OneWire::read_byte(void)
 
 void OneWire::write_byte(uint8_t data)
 {
-    for (uint8_t bit_count = 0; bit_count < 8; bit_count++)
-    {
+    for (uint8_t bit_count = 0; bit_count < 8; bit_count++) {
         /*pull low to initiate write*/
-    	_pinout.mode_setup(Gpio::Mode::OUTPUT, Gpio::PullMode::PULL_UP);
-    	_pinout.set_output_options(Gpio::OutputType::OPEN_DRAIN, Gpio::Speed::FAST_50MHz);
-    	_pinout.clear();
-    	_wait(_LOW_PULSE_TIME_US);
+        _pinout.mode_setup(Gpio::Mode::OUTPUT, Gpio::PullMode::PULL_UP);
+        _pinout.set_output_options(Gpio::OutputType::OPEN_DRAIN,
+                                   Gpio::Speed::FAST_50MHz);
+        _pinout.clear();
+        _wait(_LOW_PULSE_TIME_US);
 
         /*write next bit*/
         ((bool)(data & 0x01)) ? _pinout.set() : _pinout.clear();
@@ -76,11 +77,12 @@ bool OneWire::read_bit(void)
     bool bit;
 
     /*pull low to initiate read*/
-	_pinout.mode_setup(Gpio::Mode::OUTPUT, Gpio::PullMode::PULL_UP);
-	_pinout.set_output_options(Gpio::OutputType::OPEN_DRAIN, Gpio::Speed::FAST_50MHz);
-	_pinout.clear();
+    _pinout.mode_setup(Gpio::Mode::OUTPUT, Gpio::PullMode::PULL_UP);
+    _pinout.set_output_options(Gpio::OutputType::OPEN_DRAIN,
+                               Gpio::Speed::FAST_50MHz);
+    _pinout.clear();
 
-	_wait(_LOW_PULSE_TIME_US);
+    _wait(_LOW_PULSE_TIME_US);
 
     /*float high*/
     _pinout.mode_setup(Gpio::Mode::INPUT, Gpio::PullMode::PULL_UP);
@@ -88,9 +90,9 @@ bool OneWire::read_bit(void)
 
     /*sample bus*/
     if (_pinout.get() > 0)
-    	bit = true;
+        bit = true;
     else
-    	bit = false;
+        bit = false;
 
     /*wait until end of time slot*/
     _wait(_END_READ_SLOT_WAIT_US);
@@ -101,11 +103,12 @@ bool OneWire::read_bit(void)
 void OneWire::write_bit(bool bit)
 {
     /*pull low to initiate write*/
-	_pinout.mode_setup(Gpio::Mode::OUTPUT, Gpio::PullMode::PULL_UP);
-	_pinout.set_output_options(Gpio::OutputType::OPEN_DRAIN, Gpio::Speed::FAST_50MHz);
-	_pinout.clear();
+    _pinout.mode_setup(Gpio::Mode::OUTPUT, Gpio::PullMode::PULL_UP);
+    _pinout.set_output_options(Gpio::OutputType::OPEN_DRAIN,
+                               Gpio::Speed::FAST_50MHz);
+    _pinout.clear();
 
-	_wait(_LOW_PULSE_TIME_US);
+    _wait(_LOW_PULSE_TIME_US);
 
     /*write next bit*/
     bit ? _pinout.set() : _pinout.clear();
@@ -124,21 +127,21 @@ bool OneWire::touch_reset(void)
     char sample_count = (_RESET_PULSE_TIME_US / 8);
 
     /*low reset pulse*/
-	_pinout.mode_setup(Gpio::Mode::OUTPUT, Gpio::PullMode::PULL_UP);
-	_pinout.set_output_options(Gpio::OutputType::OPEN_DRAIN, Gpio::Speed::FAST_50MHz);
-	_pinout.clear();
-	_wait(_RESET_PULSE_TIME_US);
+    _pinout.mode_setup(Gpio::Mode::OUTPUT, Gpio::PullMode::PULL_UP);
+    _pinout.set_output_options(Gpio::OutputType::OPEN_DRAIN,
+                               Gpio::Speed::FAST_50MHz);
+    _pinout.clear();
+    _wait(_RESET_PULSE_TIME_US);
 
     /*float high*/
     _pinout.mode_setup(Gpio::Mode::INPUT, Gpio::PullMode::PULL_UP);
 
-    while (sample_count-- != 0)
-    {
-    	_wait(8);
+    while (sample_count-- != 0) {
+        _wait(8);
 
         /*sample bus to check for connected devices*/
         if (_pinout.get() == 0)
-        	presence = true;
+            presence = true;
     }
 
     return presence;
@@ -146,177 +149,172 @@ bool OneWire::touch_reset(void)
 
 bool OneWire::search_first(bool do_reset, bool alarm_only)
 {
-	_last_discrepancy = 0;
-	_last_device = false;
-	_last_family_discrepancy = 0;
-	return search_next(do_reset, alarm_only);
+    _last_discrepancy = 0;
+    _last_device = false;
+    _last_family_discrepancy = 0;
+    return search_next(do_reset, alarm_only);
 }
 
 bool OneWire::search_next(bool do_reset, bool alarm_only)
 {
-	uint8_t bit_test, search_direction, bit_number;
-	uint8_t last_zero, serial_byte_number;
-	uint8_t serial_byte_mask;
-	uint8_t lastcrc8 = 0;
-
-	// initialize for search
-	bit_number = 1;
-	last_zero = 0;
-	serial_byte_number = 0;
-	serial_byte_mask = 1;
-	bool next_result = 0;
-
-	// if the last call was not the last one
-	if (!_last_device)
-	{
-		// check if reset first is requested
-		if (do_reset)
-		{
-			// reset the 1-wire
-			// if there are no parts on 1-wire, return FALSE
-			if (!touch_reset())
-			{
-				_last_discrepancy = 0;
-				_last_family_discrepancy = 0;
-				return false;
-			}
-		}
-
-		// If finding alarming devices issue a different command
-		if (alarm_only)
-			write_byte(_SEARCH_ALARM);  // issue the alarming search command
-		else
-			write_byte(_SEARCH);  // issue the search command
-
-		// loop to do the search
-		do
-		{
-			// read a bit and its compliment
-			bit_test = ((uint8_t)read_bit()) << 1;
-			bit_test |= ((uint8_t)read_bit());
-
-			// check for no devices on 1-wire
-			if (bit_test == 3)
-				break;
-			else
-			{
-				// all devices coupled have 0 or 1
-				if (bit_test > 0)
-					search_direction = !(bit_test & 0x01);  // bit write value for search
-				else
-				{
-					// if this discrepancy if before the Last Discrepancy
-					// on a previous next then pick the same as last time
-					if (bit_number < _last_discrepancy)
-						search_direction = ((_serial[serial_byte_number] & serial_byte_mask) > 0);
-					else
-						// if equal to last pick 1, if not then pick 0
-						search_direction = (bit_number == _last_discrepancy);
-
-					// if 0 was picked then record its position in LastZero
-					if (search_direction == 0)
-					{
-						last_zero = bit_number;
-
-						// check for Last discrepancy in family
-						if (last_zero < 9)
-							_last_family_discrepancy = last_zero;
-					}
-				}
-
-				// set or clear the bit in the SerialNum[portnum] byte serial_byte_number
-				// with mask serial_byte_mask
-				if (search_direction == 1)
-					_serial[serial_byte_number] |= serial_byte_mask;
-				else
-					_serial[serial_byte_number] &= ~serial_byte_mask;
-
-				// serial number search direction write bit
-				write_bit((bool)search_direction);
-
-				// increment the byte counter bit_number
-				// and shift the mask serial_byte_mask
-				bit_number++;
-				serial_byte_mask <<= 1;
-
-				// if the mask is 0 then go to new SerialNum[portnum] byte serial_byte_number
-				// and reset mask
-				if (serial_byte_mask == 0)
-				{
-					// The below has been added to accomidate the valid CRC with the
-					// possible changing serial number values of the DS28E04.
-					if (((_serial[0] & 0x7F) == 0x1C) && (serial_byte_number == 1))
-						_crc_check(0x7F, &lastcrc8);
-					else
-						_crc_check(_serial[serial_byte_number], &lastcrc8);  // accumulate the CRC
-
-					serial_byte_number++;
-					serial_byte_mask = 1;
-				}
-			}
-		}
-		while(serial_byte_number < 8);  // loop until through all SerialNum[portnum] bytes 0-7
-
-		// if the search was successful then
-		if (!((bit_number < 65) || lastcrc8))
-		{
-			// search successful so set LastDiscrepancy[portnum],LastDevice[portnum],next_result
-			_last_discrepancy = last_zero;
-			_last_device = (_last_discrepancy == 0);
-			next_result = true;
-		}
-	}
-
-	// if no device found then reset counters so next 'next' will be
-	// like a first
-	if (!next_result || !_serial[0])
-	{
-		_last_discrepancy = 0;
-		_last_device = false;
-		_last_family_discrepancy = 0;
-		next_result = false;
-	}
-
-	return next_result;
+    uint8_t bit_test, search_direction, bit_number;
+    uint8_t last_zero, serial_byte_number;
+    uint8_t serial_byte_mask;
+    uint8_t lastcrc8 = 0;
+
+    // initialize for search
+    bit_number = 1;
+    last_zero = 0;
+    serial_byte_number = 0;
+    serial_byte_mask = 1;
+    bool next_result = 0;
+
+    // if the last call was not the last one
+    if (!_last_device) {
+        // check if reset first is requested
+        if (do_reset) {
+            // reset the 1-wire
+            // if there are no parts on 1-wire, return FALSE
+            if (!touch_reset()) {
+                _last_discrepancy = 0;
+                _last_family_discrepancy = 0;
+                return false;
+            }
+        }
+
+        // If finding alarming devices issue a different command
+        if (alarm_only)
+            write_byte(_SEARCH_ALARM);  // issue the alarming search command
+        else
+            write_byte(_SEARCH);  // issue the search command
+
+        // loop to do the search
+        do {
+            // read a bit and its compliment
+            bit_test = ((uint8_t)read_bit()) << 1;
+            bit_test |= ((uint8_t)read_bit());
+
+            // check for no devices on 1-wire
+            if (bit_test == 3)
+                break;
+            else {
+                // all devices coupled have 0 or 1
+                if (bit_test > 0)
+                    search_direction =
+                      !(bit_test & 0x01);  // bit write value for search
+                else {
+                    // if this discrepancy if before the Last Discrepancy
+                    // on a previous next then pick the same as last time
+                    if (bit_number < _last_discrepancy)
+                        search_direction = ((_serial[serial_byte_number] &
+                                             serial_byte_mask) > 0);
+                    else
+                        // if equal to last pick 1, if not then pick 0
+                        search_direction = (bit_number == _last_discrepancy);
+
+                    // if 0 was picked then record its position in LastZero
+                    if (search_direction == 0) {
+                        last_zero = bit_number;
+
+                        // check for Last discrepancy in family
+                        if (last_zero < 9)
+                            _last_family_discrepancy = last_zero;
+                    }
+                }
+
+                // set or clear the bit in the SerialNum[portnum] byte
+                // serial_byte_number with mask serial_byte_mask
+                if (search_direction == 1)
+                    _serial[serial_byte_number] |= serial_byte_mask;
+                else
+                    _serial[serial_byte_number] &= ~serial_byte_mask;
+
+                // serial number search direction write bit
+                write_bit((bool)search_direction);
+
+                // increment the byte counter bit_number
+                // and shift the mask serial_byte_mask
+                bit_number++;
+                serial_byte_mask <<= 1;
+
+                // if the mask is 0 then go to new SerialNum[portnum] byte
+                // serial_byte_number and reset mask
+                if (serial_byte_mask == 0) {
+                    // The below has been added to accomidate the valid CRC with
+                    // the possible changing serial number values of the
+                    // DS28E04.
+                    if (((_serial[0] & 0x7F) == 0x1C) &&
+                        (serial_byte_number == 1))
+                        _crc_check(0x7F, &lastcrc8);
+                    else
+                        _crc_check(_serial[serial_byte_number],
+                                   &lastcrc8);  // accumulate the CRC
+
+                    serial_byte_number++;
+                    serial_byte_mask = 1;
+                }
+            }
+        } while (serial_byte_number <
+                 8);  // loop until through all SerialNum[portnum] bytes 0-7
+
+        // if the search was successful then
+        if (!((bit_number < 65) || lastcrc8)) {
+            // search successful so set
+            // LastDiscrepancy[portnum],LastDevice[portnum],next_result
+            _last_discrepancy = last_zero;
+            _last_device = (_last_discrepancy == 0);
+            next_result = true;
+        }
+    }
+
+    // if no device found then reset counters so next 'next' will be
+    // like a first
+    if (!next_result || !_serial[0]) {
+        _last_discrepancy = 0;
+        _last_device = false;
+        _last_family_discrepancy = 0;
+        next_result = false;
+    }
+
+    return next_result;
 }
 
-void OneWire::get_serial_number(uint8_t *sn_buffer, bool do_read)
+void OneWire::get_serial_number(uint8_t* sn_buffer, bool do_read)
 {
-	if (do_read)
-		memcpy(sn_buffer, _serial, _SERIAL_LENGTH);
-	else
-		memcpy(_serial, sn_buffer, _SERIAL_LENGTH);
+    if (do_read)
+        memcpy(sn_buffer, _serial, _SERIAL_LENGTH);
+    else
+        memcpy(_serial, sn_buffer, _SERIAL_LENGTH);
 }
 
 void OneWire::_wait(uint16_t time)
 {
-	_timer->set_autoreload_value(time);
-	_timer->enable_counter();
+    _timer.set_autoreload_value(time);
+    _timer.enable_counter();
 
-	while(_timer->get_counter_value() < time);
+    while (_timer.get_counter_value() < time) {}
 
-	_timer->disable_counter();
-	_timer->set_counter_value(0);
+    _timer.disable_counter();
+    _timer.set_counter_value(0);
 }
 
-void OneWire::_crc_check(uint8_t data, uint8_t *crc_byte)
+void OneWire::_crc_check(uint8_t data, uint8_t* crc_byte)
 {
-	uint8_t tmp = *crc_byte;
-
-	for (uint8_t bit_count = 0; bit_count < 8; bit_count++)
-	{
-		if ((data & 0x01) ^ (tmp & 0x01)) {
-			tmp = tmp >> 1;
-			tmp = tmp ^ 0x8c;//0b10001100;
-		}
-		else {
-			tmp = tmp >> 1;
-		}
-
-		data = data >> 1;
-	}
-
-	*crc_byte = tmp;
+    uint8_t tmp = *crc_byte;
+
+    for (uint8_t bit_count = 0; bit_count < 8; bit_count++) {
+        if ((data & 0x01) ^ (tmp & 0x01)) {
+            tmp = tmp >> 1;
+            tmp = tmp ^ 0x8c;  // 0b10001100;
+        }
+        else {
+            tmp = tmp >> 1;
+        }
+
+        data = data >> 1;
+    }
+
+    *crc_byte = tmp;
 }
 
 } /* namespace extra */
diff --git a/extra/one_wire.h b/extra/one_wire.h
index 55dad23..ceeab32 100644
--- a/extra/one_wire.h
+++ b/extra/one_wire.h
@@ -1,9 +1,9 @@
 #ifndef EXTRA_ONE_WIRE_H_
 #define EXTRA_ONE_WIRE_H_
 
-#include <string.h>
 #include "../cm3cpp_gpio.h"
 #include "../cm3cpp_timer.h"
+#include <string.h>
 
 namespace cm3cpp {
 
@@ -13,46 +13,49 @@ namespace timer = cm3cpp::tim;
 
 class OneWire
 {
-public:
-	using Timer = cm3cpp::tim::Timer;
-	using Gpio = cm3cpp::gpio::Gpio;
-
-	OneWire(Gpio::Pinout p, uint8_t tim_number, uint32_t tim_presc);
-	~OneWire() = default;
-
-	uint8_t read_byte(void);
-	void write_byte(uint8_t data);
-	bool read_bit(void);
-	void write_bit(bool bit);
-	bool touch_reset(void);
-	bool search_first(bool do_reset, bool alarm_only);
-	bool search_next(bool do_reset, bool alarm_only);
-	void get_serial_number(uint8_t *sn_buffer, bool do_read);
-
-private:
-	static constexpr uint16_t _SLOT_LENGTH           = 78;
-	static constexpr uint16_t _RESET_PULSE_TIME_US   = 520;
-	static constexpr uint16_t _LOW_PULSE_TIME_US     = 3;
-	static constexpr uint16_t _READ_SAMPLE_TIME_US   = 12;
-	static constexpr uint16_t _READ_SAMPLE_WAIT_US   = (_READ_SAMPLE_TIME_US - _LOW_PULSE_TIME_US);
-	static constexpr uint16_t _END_READ_SLOT_WAIT_US = (_SLOT_LENGTH - _READ_SAMPLE_TIME_US);
-	static constexpr uint16_t _RECOVERY_TIME_US      = 6;
-	static constexpr uint16_t _WRITE_SLOT_WAIT_US    = (_SLOT_LENGTH - _LOW_PULSE_TIME_US);
-	static constexpr uint8_t  _SERIAL_LENGTH         = 8;
-
-	static constexpr uint8_t  _SEARCH                = 0xF0;
-	static constexpr uint8_t  _SEARCH_ALARM          = 0xEC;
-
-	Gpio _pinout;
-	Timer *_timer;
+ public:
+    using Timer = cm3cpp::tim::Timer;
+    using Gpio = cm3cpp::gpio::Gpio;
+
+    OneWire(Gpio::Pinout p, uint8_t tim_number, uint32_t tim_presc);
+    ~OneWire() = default;
+
+    uint8_t read_byte(void);
+    void write_byte(uint8_t data);
+    bool read_bit(void);
+    void write_bit(bool bit);
+    bool touch_reset(void);
+    bool search_first(bool do_reset, bool alarm_only);
+    bool search_next(bool do_reset, bool alarm_only);
+    void get_serial_number(uint8_t* sn_buffer, bool do_read);
+
+ private:
+    static constexpr uint16_t _SLOT_LENGTH = 78;
+    static constexpr uint16_t _RESET_PULSE_TIME_US = 520;
+    static constexpr uint16_t _LOW_PULSE_TIME_US = 3;
+    static constexpr uint16_t _READ_SAMPLE_TIME_US = 12;
+    static constexpr uint16_t _READ_SAMPLE_WAIT_US =
+      (_READ_SAMPLE_TIME_US - _LOW_PULSE_TIME_US);
+    static constexpr uint16_t _END_READ_SLOT_WAIT_US =
+      (_SLOT_LENGTH - _READ_SAMPLE_TIME_US);
+    static constexpr uint16_t _RECOVERY_TIME_US = 6;
+    static constexpr uint16_t _WRITE_SLOT_WAIT_US =
+      (_SLOT_LENGTH - _LOW_PULSE_TIME_US);
+    static constexpr uint8_t _SERIAL_LENGTH = 8;
+
+    static constexpr uint8_t _SEARCH = 0xF0;
+    static constexpr uint8_t _SEARCH_ALARM = 0xEC;
+
+    Gpio _pinout;
+    Timer _timer;
     uint8_t _serial[_SERIAL_LENGTH];
 
     int8_t _last_discrepancy;
     int8_t _last_family_discrepancy;
     bool _last_device;
 
-	void _wait(uint16_t time);
-	void _crc_check(uint8_t data, uint8_t *crc_byte);
+    void _wait(uint16_t time);
+    void _crc_check(uint8_t data, uint8_t* crc_byte);
 };
 
 } /* namespace extra */
diff --git a/irq/cm3cpp_irq.cpp b/irq/cm3cpp_irq.cpp
index d9a390c..1e1dd0d 100644
--- a/irq/cm3cpp_irq.cpp
+++ b/irq/cm3cpp_irq.cpp
@@ -1,14 +1,16 @@
 #include "cm3cpp_irq.h"
 
-#define DEFINE_CALLBACK(cfunc, int_enum)                                            \
-    void cfunc(void) {                                                              \
-        const uint32_t indx = static_cast<uint32_t>(Interrupt::int_enum);           \
-        isr_vector_table[indx]->call();                                             \
+#define DEFINE_CALLBACK(cfunc, int_enum)                                       \
+    void cfunc(void)                                                           \
+    {                                                                          \
+        const uint32_t indx = static_cast<uint32_t>(Interrupt::int_enum);      \
+        isr_vector_table[indx]->call();                                        \
     }
 
 namespace cm3cpp {
 
-struct EmptyInterrupt : public IInterruptable {
+struct EmptyInterrupt : public IInterruptable
+{
     void call() {}
     EmptyInterrupt() = default;
     ~EmptyInterrupt() = default;
@@ -17,19 +19,21 @@ struct EmptyInterrupt : public IInterruptable {
 constexpr uint32_t INTERRUPTS_COUNT = NVIC_IRQ_COUNT;
 static IInterruptable* isr_vector_table[INTERRUPTS_COUNT];
 
-struct InterruptInitializer {
-    InterruptInitializer() {
+struct InterruptInitializer
+{
+    InterruptInitializer()
+    {
         for (uint32_t i = 0; i < INTERRUPTS_COUNT; ++i) {
-            if (isr_vector_table[i] == nullptr)
-              {
+            if (isr_vector_table[i] == nullptr) {
                 /* init an irq table with empty functions for safe */
                 isr_vector_table[i] = &_empty_interrupt;
-              }
+            }
         }
     }
 } _init;
 
-void IInterruptable::register_isr(Interrupt interrupt, IInterruptable* interrupt_owner)
+void IInterruptable::register_isr(Interrupt interrupt,
+                                  IInterruptable* interrupt_owner)
 {
     const uint32_t indx = static_cast<uint32_t>(interrupt);
     isr_vector_table[indx] = interrupt_owner;
@@ -38,183 +42,183 @@ void IInterruptable::register_isr(Interrupt interrupt, IInterruptable* interrupt
 BEGIN_DECLS
 
 #ifdef STM32F2
-DEFINE_CALLBACK(nvic_wwdg_isr,             ISR_NVIC_WWDG)
-DEFINE_CALLBACK(pvd_isr,                   ISR_PVD)
-DEFINE_CALLBACK(tamp_stamp_isr,            ISR_TAMP_STAMP)
-DEFINE_CALLBACK(rtc_wkup_isr,              ISR_RTC_WKUP)
-DEFINE_CALLBACK(flash_isr,                 ISR_FLASH)
-DEFINE_CALLBACK(rcc_isr,                   ISR_RCC)
-DEFINE_CALLBACK(exti0_isr,                 ISR_EXTI0)
-DEFINE_CALLBACK(exti1_isr,                 ISR_EXTI1)
-DEFINE_CALLBACK(exti2_isr,                 ISR_EXTI2)
-DEFINE_CALLBACK(exti3_isr,                 ISR_EXTI3)
-DEFINE_CALLBACK(exti4_isr,                 ISR_EXTI4)
-DEFINE_CALLBACK(dma1_stream0_isr,          ISR_DMA1_STREAM0)
-DEFINE_CALLBACK(dma1_stream1_isr,          ISR_DMA1_STREAM1)
-DEFINE_CALLBACK(dma1_stream2_isr,          ISR_DMA1_STREAM2)
-DEFINE_CALLBACK(dma1_stream3_isr,          ISR_DMA1_STREAM3)
-DEFINE_CALLBACK(dma1_stream4_isr,          ISR_DMA1_STREAM4)
-DEFINE_CALLBACK(dma1_stream5_isr,          ISR_DMA1_STREAM5)
-DEFINE_CALLBACK(dma1_stream6_isr,          ISR_DMA1_STREAM6)
-DEFINE_CALLBACK(adc_isr,                   ISR_ADC)
-DEFINE_CALLBACK(can1_tx_isr,               ISR_CAN1_TX)
-DEFINE_CALLBACK(can1_rx0_isr,              ISR_CAN1_RX0)
-DEFINE_CALLBACK(can1_rx1_isr,              ISR_CAN1_RX1)
-DEFINE_CALLBACK(can1_sce_isr,              ISR_CAN1_SCE)
-DEFINE_CALLBACK(exti9_5_isr,               ISR_EXTI9_5)
-DEFINE_CALLBACK(tim1_brk_tim9_isr,         ISR_TIM1_BRK_TIM9)
-DEFINE_CALLBACK(tim1_up_tim10_isr,         ISR_TIM1_UP_TIM10)
-DEFINE_CALLBACK(tim1_trg_com_tim11_isr,    ISR_TIM1_TRG_COM_TIM11)
-DEFINE_CALLBACK(tim1_cc_isr,               ISR_TIM1_CC)
-DEFINE_CALLBACK(tim2_isr,                  ISR_TIM2)
-DEFINE_CALLBACK(tim3_isr,                  ISR_TIM3)
-DEFINE_CALLBACK(tim4_isr,                  ISR_TIM4)
-DEFINE_CALLBACK(i2c1_ev_isr,               ISR_I2C1_EV)
-DEFINE_CALLBACK(i2c1_er_isr,               ISR_I2C1_ER)
-DEFINE_CALLBACK(i2c2_ev_isr,               ISR_I2C2_EV)
-DEFINE_CALLBACK(i2c2_er_isr,               ISR_I2C2_ER)
-DEFINE_CALLBACK(spi1_isr,                  ISR_SPI1)
-DEFINE_CALLBACK(spi2_isr,                  ISR_SPI2)
-DEFINE_CALLBACK(usart1_isr,                ISR_USART1)
-DEFINE_CALLBACK(usart2_isr,                ISR_USART2)
-DEFINE_CALLBACK(usart3_isr,                ISR_USART3)
-DEFINE_CALLBACK(exti15_10_isr,             ISR_EXTI15_10)
-DEFINE_CALLBACK(rtc_alarm_isr,             ISR_RTC_ALARM)
-DEFINE_CALLBACK(usb_fs_wkup_isr,           ISR_USB_FS_WKUP)
-DEFINE_CALLBACK(tim8_brk_tim12_isr,        ISR_TIM8_BRK_TIM12)
-DEFINE_CALLBACK(tim8_up_tim13_isr,         ISR_TIM8_UP_TIM13)
-DEFINE_CALLBACK(tim8_trg_com_tim14_isr,    ISR_TIM8_TRG_COM_TIM14)
-DEFINE_CALLBACK(tim8_cc_isr,               ISR_TIM8_CC)
-DEFINE_CALLBACK(dma1_stream7_isr,          ISR_DMA1_STREAM7)
-DEFINE_CALLBACK(fsmc_isr,                  ISR_FSMC)
-DEFINE_CALLBACK(sdio_isr,                  ISR_SDIO)
-DEFINE_CALLBACK(tim5_isr,                  ISR_TIM5)
-DEFINE_CALLBACK(spi3_isr,                  ISR_SPI3)
-DEFINE_CALLBACK(uart4_isr,                 ISR_UART4)
-DEFINE_CALLBACK(uart5_isr,                 ISR_UART5)
-DEFINE_CALLBACK(tim6_dac_isr,              ISR_TIM6_DAC)
-DEFINE_CALLBACK(tim7_isr,                  ISR_TIM7)
-DEFINE_CALLBACK(dma2_stream0_isr,          ISR_DMA2_STREAM0)
-DEFINE_CALLBACK(dma2_stream1_isr,          ISR_DMA2_STREAM1)
-DEFINE_CALLBACK(dma2_stream2_isr,          ISR_DMA2_STREAM2)
-DEFINE_CALLBACK(dma2_stream3_isr,          ISR_DMA2_STREAM3)
-DEFINE_CALLBACK(dma2_stream4_isr,          ISR_DMA2_STREAM4)
-DEFINE_CALLBACK(eth_isr,                   ISR_ETH)
-DEFINE_CALLBACK(eth_wkup_isr,              ISR_ETH_WKUP)
-DEFINE_CALLBACK(can2_tx_isr,               ISR_CAN2_TX)
-DEFINE_CALLBACK(can2_rx0_isr,              ISR_CAN2_RX0)
-DEFINE_CALLBACK(can2_rx1_isr,              ISR_CAN2_RX1)
-DEFINE_CALLBACK(can2_sce_isr,              ISR_CAN2_SCE)
-DEFINE_CALLBACK(otg_fs_isr,                ISR_OTG_FS)
-DEFINE_CALLBACK(dma2_stream5_isr,          ISR_DMA2_STREAM5)
-DEFINE_CALLBACK(dma2_stream6_isr,          ISR_DMA2_STREAM6)
-DEFINE_CALLBACK(dma2_stream7_isr,          ISR_DMA2_STREAM7)
-DEFINE_CALLBACK(usart6_isr,                ISR_USART6)
-DEFINE_CALLBACK(i2c3_ev_isr,               ISR_I2C3_EV)
-DEFINE_CALLBACK(i2c3_er_isr,               ISR_I2C3_ER)
-DEFINE_CALLBACK(otg_hs_ep1_out_isr,        ISR_OTG_HS_EP1_OUT)
-DEFINE_CALLBACK(otg_hs_ep1_in_isr,         ISR_OTG_HS_EP1_IN)
-DEFINE_CALLBACK(otg_hs_wkup_isr,           ISR_OTG_HS_WKUP)
-DEFINE_CALLBACK(otg_hs_isr,                ISR_OTG_HS)
-DEFINE_CALLBACK(dcmi_isr,                  ISR_DCMI)
-DEFINE_CALLBACK(cryp_isr,                  ISR_CRYP)
-DEFINE_CALLBACK(hash_rng_isr,              ISR_HASH_RNG)
+DEFINE_CALLBACK(nvic_wwdg_isr, ISR_NVIC_WWDG)
+DEFINE_CALLBACK(pvd_isr, ISR_PVD)
+DEFINE_CALLBACK(tamp_stamp_isr, ISR_TAMP_STAMP)
+DEFINE_CALLBACK(rtc_wkup_isr, ISR_RTC_WKUP)
+DEFINE_CALLBACK(flash_isr, ISR_FLASH)
+DEFINE_CALLBACK(rcc_isr, ISR_RCC)
+DEFINE_CALLBACK(exti0_isr, ISR_EXTI0)
+DEFINE_CALLBACK(exti1_isr, ISR_EXTI1)
+DEFINE_CALLBACK(exti2_isr, ISR_EXTI2)
+DEFINE_CALLBACK(exti3_isr, ISR_EXTI3)
+DEFINE_CALLBACK(exti4_isr, ISR_EXTI4)
+DEFINE_CALLBACK(dma1_stream0_isr, ISR_DMA1_STREAM0)
+DEFINE_CALLBACK(dma1_stream1_isr, ISR_DMA1_STREAM1)
+DEFINE_CALLBACK(dma1_stream2_isr, ISR_DMA1_STREAM2)
+DEFINE_CALLBACK(dma1_stream3_isr, ISR_DMA1_STREAM3)
+DEFINE_CALLBACK(dma1_stream4_isr, ISR_DMA1_STREAM4)
+DEFINE_CALLBACK(dma1_stream5_isr, ISR_DMA1_STREAM5)
+DEFINE_CALLBACK(dma1_stream6_isr, ISR_DMA1_STREAM6)
+DEFINE_CALLBACK(adc_isr, ISR_ADC)
+DEFINE_CALLBACK(can1_tx_isr, ISR_CAN1_TX)
+DEFINE_CALLBACK(can1_rx0_isr, ISR_CAN1_RX0)
+DEFINE_CALLBACK(can1_rx1_isr, ISR_CAN1_RX1)
+DEFINE_CALLBACK(can1_sce_isr, ISR_CAN1_SCE)
+DEFINE_CALLBACK(exti9_5_isr, ISR_EXTI9_5)
+DEFINE_CALLBACK(tim1_brk_tim9_isr, ISR_TIM1_BRK_TIM9)
+DEFINE_CALLBACK(tim1_up_tim10_isr, ISR_TIM1_UP_TIM10)
+DEFINE_CALLBACK(tim1_trg_com_tim11_isr, ISR_TIM1_TRG_COM_TIM11)
+DEFINE_CALLBACK(tim1_cc_isr, ISR_TIM1_CC)
+DEFINE_CALLBACK(tim2_isr, ISR_TIM2)
+DEFINE_CALLBACK(tim3_isr, ISR_TIM3)
+DEFINE_CALLBACK(tim4_isr, ISR_TIM4)
+DEFINE_CALLBACK(i2c1_ev_isr, ISR_I2C1_EV)
+DEFINE_CALLBACK(i2c1_er_isr, ISR_I2C1_ER)
+DEFINE_CALLBACK(i2c2_ev_isr, ISR_I2C2_EV)
+DEFINE_CALLBACK(i2c2_er_isr, ISR_I2C2_ER)
+DEFINE_CALLBACK(spi1_isr, ISR_SPI1)
+DEFINE_CALLBACK(spi2_isr, ISR_SPI2)
+DEFINE_CALLBACK(usart1_isr, ISR_USART1)
+DEFINE_CALLBACK(usart2_isr, ISR_USART2)
+DEFINE_CALLBACK(usart3_isr, ISR_USART3)
+DEFINE_CALLBACK(exti15_10_isr, ISR_EXTI15_10)
+DEFINE_CALLBACK(rtc_alarm_isr, ISR_RTC_ALARM)
+DEFINE_CALLBACK(usb_fs_wkup_isr, ISR_USB_FS_WKUP)
+DEFINE_CALLBACK(tim8_brk_tim12_isr, ISR_TIM8_BRK_TIM12)
+DEFINE_CALLBACK(tim8_up_tim13_isr, ISR_TIM8_UP_TIM13)
+DEFINE_CALLBACK(tim8_trg_com_tim14_isr, ISR_TIM8_TRG_COM_TIM14)
+DEFINE_CALLBACK(tim8_cc_isr, ISR_TIM8_CC)
+DEFINE_CALLBACK(dma1_stream7_isr, ISR_DMA1_STREAM7)
+DEFINE_CALLBACK(fsmc_isr, ISR_FSMC)
+DEFINE_CALLBACK(sdio_isr, ISR_SDIO)
+DEFINE_CALLBACK(tim5_isr, ISR_TIM5)
+DEFINE_CALLBACK(spi3_isr, ISR_SPI3)
+DEFINE_CALLBACK(uart4_isr, ISR_UART4)
+DEFINE_CALLBACK(uart5_isr, ISR_UART5)
+DEFINE_CALLBACK(tim6_dac_isr, ISR_TIM6_DAC)
+DEFINE_CALLBACK(tim7_isr, ISR_TIM7)
+DEFINE_CALLBACK(dma2_stream0_isr, ISR_DMA2_STREAM0)
+DEFINE_CALLBACK(dma2_stream1_isr, ISR_DMA2_STREAM1)
+DEFINE_CALLBACK(dma2_stream2_isr, ISR_DMA2_STREAM2)
+DEFINE_CALLBACK(dma2_stream3_isr, ISR_DMA2_STREAM3)
+DEFINE_CALLBACK(dma2_stream4_isr, ISR_DMA2_STREAM4)
+DEFINE_CALLBACK(eth_isr, ISR_ETH)
+DEFINE_CALLBACK(eth_wkup_isr, ISR_ETH_WKUP)
+DEFINE_CALLBACK(can2_tx_isr, ISR_CAN2_TX)
+DEFINE_CALLBACK(can2_rx0_isr, ISR_CAN2_RX0)
+DEFINE_CALLBACK(can2_rx1_isr, ISR_CAN2_RX1)
+DEFINE_CALLBACK(can2_sce_isr, ISR_CAN2_SCE)
+DEFINE_CALLBACK(otg_fs_isr, ISR_OTG_FS)
+DEFINE_CALLBACK(dma2_stream5_isr, ISR_DMA2_STREAM5)
+DEFINE_CALLBACK(dma2_stream6_isr, ISR_DMA2_STREAM6)
+DEFINE_CALLBACK(dma2_stream7_isr, ISR_DMA2_STREAM7)
+DEFINE_CALLBACK(usart6_isr, ISR_USART6)
+DEFINE_CALLBACK(i2c3_ev_isr, ISR_I2C3_EV)
+DEFINE_CALLBACK(i2c3_er_isr, ISR_I2C3_ER)
+DEFINE_CALLBACK(otg_hs_ep1_out_isr, ISR_OTG_HS_EP1_OUT)
+DEFINE_CALLBACK(otg_hs_ep1_in_isr, ISR_OTG_HS_EP1_IN)
+DEFINE_CALLBACK(otg_hs_wkup_isr, ISR_OTG_HS_WKUP)
+DEFINE_CALLBACK(otg_hs_isr, ISR_OTG_HS)
+DEFINE_CALLBACK(dcmi_isr, ISR_DCMI)
+DEFINE_CALLBACK(cryp_isr, ISR_CRYP)
+DEFINE_CALLBACK(hash_rng_isr, ISR_HASH_RNG)
 #endif
 
 #ifdef STM32F4
-DEFINE_CALLBACK(nvic_wwdg_isr,             ISR_NVIC_WWDG)
-DEFINE_CALLBACK(pvd_isr,                   ISR_PVD)
-DEFINE_CALLBACK(tamp_stamp_isr,            ISR_TAMP_STAMP)
-DEFINE_CALLBACK(rtc_wkup_isr,              ISR_RTC_WKUP)
-DEFINE_CALLBACK(flash_isr,                 ISR_FLASH)
-DEFINE_CALLBACK(rcc_isr,                   ISR_RCC)
-DEFINE_CALLBACK(exti0_isr,                 ISR_EXTI0)
-DEFINE_CALLBACK(exti1_isr,                 ISR_EXTI1)
-DEFINE_CALLBACK(exti2_isr,                 ISR_EXTI2)
-DEFINE_CALLBACK(exti3_isr,                 ISR_EXTI3)
-DEFINE_CALLBACK(exti4_isr,                 ISR_EXTI4)
-DEFINE_CALLBACK(dma1_stream0_isr,          ISR_DMA1_STREAM0)
-DEFINE_CALLBACK(dma1_stream1_isr,          ISR_DMA1_STREAM1)
-DEFINE_CALLBACK(dma1_stream2_isr,          ISR_DMA1_STREAM2)
-DEFINE_CALLBACK(dma1_stream3_isr,          ISR_DMA1_STREAM3)
-DEFINE_CALLBACK(dma1_stream4_isr,          ISR_DMA1_STREAM4)
-DEFINE_CALLBACK(dma1_stream5_isr,          ISR_DMA1_STREAM5)
-DEFINE_CALLBACK(dma1_stream6_isr,          ISR_DMA1_STREAM6)
-DEFINE_CALLBACK(adc_isr,                   ISR_ADC)
-DEFINE_CALLBACK(can1_tx_isr,               ISR_CAN1_TX)
-DEFINE_CALLBACK(can1_rx0_isr,              ISR_CAN1_RX0)
-DEFINE_CALLBACK(can1_rx1_isr,              ISR_CAN1_RX1)
-DEFINE_CALLBACK(can1_sce_isr,              ISR_CAN1_SCE)
-DEFINE_CALLBACK(exti9_5_isr,               ISR_EXTI9_5)
-DEFINE_CALLBACK(tim1_brk_tim9_isr,         ISR_TIM1_BRK_TIM9)
-DEFINE_CALLBACK(tim1_up_tim10_isr,         ISR_TIM1_UP_TIM10)
-DEFINE_CALLBACK(tim1_trg_com_tim11_isr,    ISR_TIM1_TRG_COM_TIM11)
-DEFINE_CALLBACK(tim1_cc_isr,               ISR_TIM1_CC)
-DEFINE_CALLBACK(tim2_isr,                  ISR_TIM2)
-DEFINE_CALLBACK(tim3_isr,                  ISR_TIM3)
-DEFINE_CALLBACK(tim4_isr,                  ISR_TIM4)
-DEFINE_CALLBACK(i2c1_ev_isr,               ISR_I2C1_EV)
-DEFINE_CALLBACK(i2c1_er_isr,               ISR_I2C1_ER)
-DEFINE_CALLBACK(i2c2_ev_isr,               ISR_I2C2_EV)
-DEFINE_CALLBACK(i2c2_er_isr,               ISR_I2C2_ER)
-DEFINE_CALLBACK(spi1_isr,                  ISR_SPI1)
-DEFINE_CALLBACK(spi2_isr,                  ISR_SPI2)
-DEFINE_CALLBACK(usart1_isr,                ISR_USART1)
-DEFINE_CALLBACK(usart2_isr,                ISR_USART2)
-DEFINE_CALLBACK(usart3_isr,                ISR_USART3)
-DEFINE_CALLBACK(exti15_10_isr,             ISR_EXTI15_10)
-DEFINE_CALLBACK(rtc_alarm_isr,             ISR_RTC_ALARM)
-DEFINE_CALLBACK(usb_fs_wkup_isr,           ISR_USB_FS_WKUP)
-DEFINE_CALLBACK(tim8_brk_tim12_isr,        ISR_TIM8_BRK_TIM12)
-DEFINE_CALLBACK(tim8_up_tim13_isr,         ISR_TIM8_UP_TIM13)
-DEFINE_CALLBACK(tim8_trg_com_tim14_isr,    ISR_TIM8_TRG_COM_TIM14)
-DEFINE_CALLBACK(tim8_cc_isr,               ISR_TIM8_CC)
-DEFINE_CALLBACK(dma1_stream7_isr,          ISR_DMA1_STREAM7)
-DEFINE_CALLBACK(fsmc_isr,                  ISR_FSMC)
-DEFINE_CALLBACK(sdio_isr,                  ISR_SDIO)
-DEFINE_CALLBACK(tim5_isr,                  ISR_TIM5)
-DEFINE_CALLBACK(spi3_isr,                  ISR_SPI3)
-DEFINE_CALLBACK(uart4_isr,                 ISR_UART4)
-DEFINE_CALLBACK(uart5_isr,                 ISR_UART5)
-DEFINE_CALLBACK(tim6_dac_isr,              ISR_TIM6_DAC)
-DEFINE_CALLBACK(tim7_isr,                  ISR_TIM7)
-DEFINE_CALLBACK(dma2_stream0_isr,          ISR_DMA2_STREAM0)
-DEFINE_CALLBACK(dma2_stream1_isr,          ISR_DMA2_STREAM1)
-DEFINE_CALLBACK(dma2_stream2_isr,          ISR_DMA2_STREAM2)
-DEFINE_CALLBACK(dma2_stream3_isr,          ISR_DMA2_STREAM3)
-DEFINE_CALLBACK(dma2_stream4_isr,          ISR_DMA2_STREAM4)
-DEFINE_CALLBACK(eth_isr,                   ISR_ETH)
-DEFINE_CALLBACK(eth_wkup_isr,              ISR_ETH_WKUP)
-DEFINE_CALLBACK(can2_tx_isr,               ISR_CAN2_TX)
-DEFINE_CALLBACK(can2_rx0_isr,              ISR_CAN2_RX0)
-DEFINE_CALLBACK(can2_rx1_isr,              ISR_CAN2_RX1)
-DEFINE_CALLBACK(can2_sce_isr,              ISR_CAN2_SCE)
-DEFINE_CALLBACK(otg_fs_isr,                ISR_OTG_FS)
-DEFINE_CALLBACK(dma2_stream5_isr,          ISR_DMA2_STREAM5)
-DEFINE_CALLBACK(dma2_stream6_isr,          ISR_DMA2_STREAM6)
-DEFINE_CALLBACK(dma2_stream7_isr,          ISR_DMA2_STREAM7)
-DEFINE_CALLBACK(usart6_isr,                ISR_USART6)
-DEFINE_CALLBACK(i2c3_ev_isr,               ISR_I2C3_EV)
-DEFINE_CALLBACK(i2c3_er_isr,               ISR_I2C3_ER)
-DEFINE_CALLBACK(otg_hs_ep1_out_isr,        ISR_OTG_HS_EP1_OUT)
-DEFINE_CALLBACK(otg_hs_ep1_in_isr,         ISR_OTG_HS_EP1_IN)
-DEFINE_CALLBACK(otg_hs_wkup_isr,           ISR_OTG_HS_WKUP)
-DEFINE_CALLBACK(otg_hs_isr,                ISR_OTG_HS)
-DEFINE_CALLBACK(dcmi_isr,                  ISR_DCMI)
-DEFINE_CALLBACK(cryp_isr,                  ISR_CRYP)
-DEFINE_CALLBACK(hash_rng_isr,              ISR_HASH_RNG)
-DEFINE_CALLBACK(fpu_isr,                   ISR_FPU)
-DEFINE_CALLBACK(uart7_isr,                 ISR_UART7)
-DEFINE_CALLBACK(uart8_isr,                 ISR_UART8)
-DEFINE_CALLBACK(spi4_isr,                  ISR_SPI4)
-DEFINE_CALLBACK(spi5_isr,                  ISR_SPI5)
-DEFINE_CALLBACK(spi6_isr,                  ISR_SPI6)
-DEFINE_CALLBACK(sai1_isr,                  ISR_SAI1)
-DEFINE_CALLBACK(lcd_tft_isr,               ISR_LCD_TFT)
-DEFINE_CALLBACK(lcd_tft_err_isr,           ISR_LCD_TFT_ERR)
-DEFINE_CALLBACK(dma2d_isr,                 ISR_DMA2D)
+DEFINE_CALLBACK(nvic_wwdg_isr, ISR_NVIC_WWDG)
+DEFINE_CALLBACK(pvd_isr, ISR_PVD)
+DEFINE_CALLBACK(tamp_stamp_isr, ISR_TAMP_STAMP)
+DEFINE_CALLBACK(rtc_wkup_isr, ISR_RTC_WKUP)
+DEFINE_CALLBACK(flash_isr, ISR_FLASH)
+DEFINE_CALLBACK(rcc_isr, ISR_RCC)
+DEFINE_CALLBACK(exti0_isr, ISR_EXTI0)
+DEFINE_CALLBACK(exti1_isr, ISR_EXTI1)
+DEFINE_CALLBACK(exti2_isr, ISR_EXTI2)
+DEFINE_CALLBACK(exti3_isr, ISR_EXTI3)
+DEFINE_CALLBACK(exti4_isr, ISR_EXTI4)
+DEFINE_CALLBACK(dma1_stream0_isr, ISR_DMA1_STREAM0)
+DEFINE_CALLBACK(dma1_stream1_isr, ISR_DMA1_STREAM1)
+DEFINE_CALLBACK(dma1_stream2_isr, ISR_DMA1_STREAM2)
+DEFINE_CALLBACK(dma1_stream3_isr, ISR_DMA1_STREAM3)
+DEFINE_CALLBACK(dma1_stream4_isr, ISR_DMA1_STREAM4)
+DEFINE_CALLBACK(dma1_stream5_isr, ISR_DMA1_STREAM5)
+DEFINE_CALLBACK(dma1_stream6_isr, ISR_DMA1_STREAM6)
+DEFINE_CALLBACK(adc_isr, ISR_ADC)
+DEFINE_CALLBACK(can1_tx_isr, ISR_CAN1_TX)
+DEFINE_CALLBACK(can1_rx0_isr, ISR_CAN1_RX0)
+DEFINE_CALLBACK(can1_rx1_isr, ISR_CAN1_RX1)
+DEFINE_CALLBACK(can1_sce_isr, ISR_CAN1_SCE)
+DEFINE_CALLBACK(exti9_5_isr, ISR_EXTI9_5)
+DEFINE_CALLBACK(tim1_brk_tim9_isr, ISR_TIM1_BRK_TIM9)
+DEFINE_CALLBACK(tim1_up_tim10_isr, ISR_TIM1_UP_TIM10)
+DEFINE_CALLBACK(tim1_trg_com_tim11_isr, ISR_TIM1_TRG_COM_TIM11)
+DEFINE_CALLBACK(tim1_cc_isr, ISR_TIM1_CC)
+DEFINE_CALLBACK(tim2_isr, ISR_TIM2)
+DEFINE_CALLBACK(tim3_isr, ISR_TIM3)
+DEFINE_CALLBACK(tim4_isr, ISR_TIM4)
+DEFINE_CALLBACK(i2c1_ev_isr, ISR_I2C1_EV)
+DEFINE_CALLBACK(i2c1_er_isr, ISR_I2C1_ER)
+DEFINE_CALLBACK(i2c2_ev_isr, ISR_I2C2_EV)
+DEFINE_CALLBACK(i2c2_er_isr, ISR_I2C2_ER)
+DEFINE_CALLBACK(spi1_isr, ISR_SPI1)
+DEFINE_CALLBACK(spi2_isr, ISR_SPI2)
+DEFINE_CALLBACK(usart1_isr, ISR_USART1)
+DEFINE_CALLBACK(usart2_isr, ISR_USART2)
+DEFINE_CALLBACK(usart3_isr, ISR_USART3)
+DEFINE_CALLBACK(exti15_10_isr, ISR_EXTI15_10)
+DEFINE_CALLBACK(rtc_alarm_isr, ISR_RTC_ALARM)
+DEFINE_CALLBACK(usb_fs_wkup_isr, ISR_USB_FS_WKUP)
+DEFINE_CALLBACK(tim8_brk_tim12_isr, ISR_TIM8_BRK_TIM12)
+DEFINE_CALLBACK(tim8_up_tim13_isr, ISR_TIM8_UP_TIM13)
+DEFINE_CALLBACK(tim8_trg_com_tim14_isr, ISR_TIM8_TRG_COM_TIM14)
+DEFINE_CALLBACK(tim8_cc_isr, ISR_TIM8_CC)
+DEFINE_CALLBACK(dma1_stream7_isr, ISR_DMA1_STREAM7)
+DEFINE_CALLBACK(fsmc_isr, ISR_FSMC)
+DEFINE_CALLBACK(sdio_isr, ISR_SDIO)
+DEFINE_CALLBACK(tim5_isr, ISR_TIM5)
+DEFINE_CALLBACK(spi3_isr, ISR_SPI3)
+DEFINE_CALLBACK(uart4_isr, ISR_UART4)
+DEFINE_CALLBACK(uart5_isr, ISR_UART5)
+DEFINE_CALLBACK(tim6_dac_isr, ISR_TIM6_DAC)
+DEFINE_CALLBACK(tim7_isr, ISR_TIM7)
+DEFINE_CALLBACK(dma2_stream0_isr, ISR_DMA2_STREAM0)
+DEFINE_CALLBACK(dma2_stream1_isr, ISR_DMA2_STREAM1)
+DEFINE_CALLBACK(dma2_stream2_isr, ISR_DMA2_STREAM2)
+DEFINE_CALLBACK(dma2_stream3_isr, ISR_DMA2_STREAM3)
+DEFINE_CALLBACK(dma2_stream4_isr, ISR_DMA2_STREAM4)
+DEFINE_CALLBACK(eth_isr, ISR_ETH)
+DEFINE_CALLBACK(eth_wkup_isr, ISR_ETH_WKUP)
+DEFINE_CALLBACK(can2_tx_isr, ISR_CAN2_TX)
+DEFINE_CALLBACK(can2_rx0_isr, ISR_CAN2_RX0)
+DEFINE_CALLBACK(can2_rx1_isr, ISR_CAN2_RX1)
+DEFINE_CALLBACK(can2_sce_isr, ISR_CAN2_SCE)
+DEFINE_CALLBACK(otg_fs_isr, ISR_OTG_FS)
+DEFINE_CALLBACK(dma2_stream5_isr, ISR_DMA2_STREAM5)
+DEFINE_CALLBACK(dma2_stream6_isr, ISR_DMA2_STREAM6)
+DEFINE_CALLBACK(dma2_stream7_isr, ISR_DMA2_STREAM7)
+DEFINE_CALLBACK(usart6_isr, ISR_USART6)
+DEFINE_CALLBACK(i2c3_ev_isr, ISR_I2C3_EV)
+DEFINE_CALLBACK(i2c3_er_isr, ISR_I2C3_ER)
+DEFINE_CALLBACK(otg_hs_ep1_out_isr, ISR_OTG_HS_EP1_OUT)
+DEFINE_CALLBACK(otg_hs_ep1_in_isr, ISR_OTG_HS_EP1_IN)
+DEFINE_CALLBACK(otg_hs_wkup_isr, ISR_OTG_HS_WKUP)
+DEFINE_CALLBACK(otg_hs_isr, ISR_OTG_HS)
+DEFINE_CALLBACK(dcmi_isr, ISR_DCMI)
+DEFINE_CALLBACK(cryp_isr, ISR_CRYP)
+DEFINE_CALLBACK(hash_rng_isr, ISR_HASH_RNG)
+DEFINE_CALLBACK(fpu_isr, ISR_FPU)
+DEFINE_CALLBACK(uart7_isr, ISR_UART7)
+DEFINE_CALLBACK(uart8_isr, ISR_UART8)
+DEFINE_CALLBACK(spi4_isr, ISR_SPI4)
+DEFINE_CALLBACK(spi5_isr, ISR_SPI5)
+DEFINE_CALLBACK(spi6_isr, ISR_SPI6)
+DEFINE_CALLBACK(sai1_isr, ISR_SAI1)
+DEFINE_CALLBACK(lcd_tft_isr, ISR_LCD_TFT)
+DEFINE_CALLBACK(lcd_tft_err_isr, ISR_LCD_TFT_ERR)
+DEFINE_CALLBACK(dma2d_isr, ISR_DMA2D)
 #endif
 
 END_DECLS
 
-} /* namespace hw */
+}  // namespace cm3cpp
diff --git a/irq/cm3cpp_irq.h b/irq/cm3cpp_irq.h
index fdc00a2..1f09bdf 100644
--- a/irq/cm3cpp_irq.h
+++ b/irq/cm3cpp_irq.h
@@ -10,7 +10,8 @@
 namespace cm3cpp {
 
 #ifdef STM32F2
-enum class Interrupt : uint32_t {
+enum class Interrupt : uint32_t
+{
     ISR_NVIC_WWDG = 0,
     ISR_PVD,
     ISR_TAMP_STAMP,
@@ -96,7 +97,8 @@ enum class Interrupt : uint32_t {
 #endif
 
 #ifdef STM32F4
-enum Interrupt : uint32_t {
+enum Interrupt : uint32_t
+{
     ISR_NVIC_WWDG = 0,
     ISR_PVD,
     ISR_TAMP_STAMP,
@@ -193,11 +195,12 @@ enum Interrupt : uint32_t {
 
 class IInterruptable
 {
-public:
+ public:
     IInterruptable() = default;
     virtual ~IInterruptable() = default;
 
-    static void register_isr(Interrupt interrupt, IInterruptable* interrupt_owner);
+    static void register_isr(Interrupt interrupt,
+                             IInterruptable* interrupt_owner);
     virtual void call() = 0;
 };
 
diff --git a/private/assert.h b/private/assert.h
index b0ecf04..e8a8923 100644
--- a/private/assert.h
+++ b/private/assert.h
@@ -4,13 +4,19 @@
 #include <cm3cpp_config.h>
 
 #ifndef CM3CPP_ASSERT
-#define CM3CPP_ASSERT( x ) if( ( x ) ) { while(true) { asm(""); } }
+#define CM3CPP_ASSERT(x)                                                       \
+    if ((x)) {                                                                 \
+        while (true) {                                                         \
+            asm("");                                                           \
+        }                                                                      \
+    }
 #endif
 
 #if CM3CPP_ENABLE_IMPLISIT_DESTRUCTOR_CALLS == 1
 #define CM3CPP_EXPLISIT_DESTRUCTOR(c) ~c() = default;
 #else
-#define CM3CPP_EXPLISIT_DESTRUCTOR(c) ~c() { CM3CPP_ASSERT(false); }
+#define CM3CPP_EXPLISIT_DESTRUCTOR(c)                                          \
+    ~c() { CM3CPP_ASSERT(false); }
 #endif
 
 #endif /* CM3CPP_ASSERT_H_ */
diff --git a/private/pinout.h b/private/pinout.h
index b2af083..6b0c967 100644
--- a/private/pinout.h
+++ b/private/pinout.h
@@ -13,157 +13,157 @@
         0, 0, 0                                                                \
     }
 
-#define PA0										   	PINOUT_CTOR(A, 0)
-#define PA1											PINOUT_CTOR(A, 1)
-#define PA2											PINOUT_CTOR(A, 2)
-#define PA3											PINOUT_CTOR(A, 3)
-#define PA4										    PINOUT_CTOR(A, 4)
-#define PA5											PINOUT_CTOR(A, 5)
-#define PA6											PINOUT_CTOR(A, 6)
-#define PA7											PINOUT_CTOR(A, 7)
-#define PA8											PINOUT_CTOR(A, 8)
-#define PA9											PINOUT_CTOR(A, 9)
-#define PA10										PINOUT_CTOR(A, 10)
-#define PA11										PINOUT_CTOR(A, 11)
-#define PA12										PINOUT_CTOR(A, 12)
-#define PA13										PINOUT_CTOR(A, 13)
-#define PA14										PINOUT_CTOR(A, 14)
-#define PA15										PINOUT_CTOR(A, 15)
+#define PA0 PINOUT_CTOR(A, 0)
+#define PA1 PINOUT_CTOR(A, 1)
+#define PA2 PINOUT_CTOR(A, 2)
+#define PA3 PINOUT_CTOR(A, 3)
+#define PA4 PINOUT_CTOR(A, 4)
+#define PA5 PINOUT_CTOR(A, 5)
+#define PA6 PINOUT_CTOR(A, 6)
+#define PA7 PINOUT_CTOR(A, 7)
+#define PA8 PINOUT_CTOR(A, 8)
+#define PA9 PINOUT_CTOR(A, 9)
+#define PA10 PINOUT_CTOR(A, 10)
+#define PA11 PINOUT_CTOR(A, 11)
+#define PA12 PINOUT_CTOR(A, 12)
+#define PA13 PINOUT_CTOR(A, 13)
+#define PA14 PINOUT_CTOR(A, 14)
+#define PA15 PINOUT_CTOR(A, 15)
 
-#define PB0											PINOUT_CTOR(B, 0)
-#define PB1											PINOUT_CTOR(B, 1)
-#define PB2											PINOUT_CTOR(B, 2)
-#define PB3											PINOUT_CTOR(B, 3)
-#define PB4											PINOUT_CTOR(B, 4)
-#define PB5											PINOUT_CTOR(B, 5)
-#define PB6											PINOUT_CTOR(B, 6)
-#define PB7											PINOUT_CTOR(B, 7)
-#define PB8											PINOUT_CTOR(B, 8)
-#define PB9											PINOUT_CTOR(B, 9)
-#define PB10										PINOUT_CTOR(B, 10)
-#define PB11										PINOUT_CTOR(B, 11)
-#define PB12										PINOUT_CTOR(B, 12)
-#define PB13										PINOUT_CTOR(B, 13)
-#define PB14										PINOUT_CTOR(B, 14)
-#define PB15										PINOUT_CTOR(B, 15)
+#define PB0 PINOUT_CTOR(B, 0)
+#define PB1 PINOUT_CTOR(B, 1)
+#define PB2 PINOUT_CTOR(B, 2)
+#define PB3 PINOUT_CTOR(B, 3)
+#define PB4 PINOUT_CTOR(B, 4)
+#define PB5 PINOUT_CTOR(B, 5)
+#define PB6 PINOUT_CTOR(B, 6)
+#define PB7 PINOUT_CTOR(B, 7)
+#define PB8 PINOUT_CTOR(B, 8)
+#define PB9 PINOUT_CTOR(B, 9)
+#define PB10 PINOUT_CTOR(B, 10)
+#define PB11 PINOUT_CTOR(B, 11)
+#define PB12 PINOUT_CTOR(B, 12)
+#define PB13 PINOUT_CTOR(B, 13)
+#define PB14 PINOUT_CTOR(B, 14)
+#define PB15 PINOUT_CTOR(B, 15)
 
-#define PC0											PINOUT_CTOR(C, 0)
-#define PC1											PINOUT_CTOR(C, 1)
-#define PC2											PINOUT_CTOR(C, 2)
-#define PC3											PINOUT_CTOR(C, 3)
-#define PC4											PINOUT_CTOR(C, 4)
-#define PC5											PINOUT_CTOR(C, 5)
-#define PC6											PINOUT_CTOR(C, 6)
-#define PC7											PINOUT_CTOR(C, 7)
-#define PC8											PINOUT_CTOR(C, 8)
-#define PC9											PINOUT_CTOR(C, 9)
-#define PC10										PINOUT_CTOR(C, 10)
-#define PC11										PINOUT_CTOR(C, 11)
-#define PC12										PINOUT_CTOR(C, 12)
-#define PC13										PINOUT_CTOR(C, 13)
-#define PC14										PINOUT_CTOR(C, 14)
-#define PC15										PINOUT_CTOR(C, 15)
+#define PC0 PINOUT_CTOR(C, 0)
+#define PC1 PINOUT_CTOR(C, 1)
+#define PC2 PINOUT_CTOR(C, 2)
+#define PC3 PINOUT_CTOR(C, 3)
+#define PC4 PINOUT_CTOR(C, 4)
+#define PC5 PINOUT_CTOR(C, 5)
+#define PC6 PINOUT_CTOR(C, 6)
+#define PC7 PINOUT_CTOR(C, 7)
+#define PC8 PINOUT_CTOR(C, 8)
+#define PC9 PINOUT_CTOR(C, 9)
+#define PC10 PINOUT_CTOR(C, 10)
+#define PC11 PINOUT_CTOR(C, 11)
+#define PC12 PINOUT_CTOR(C, 12)
+#define PC13 PINOUT_CTOR(C, 13)
+#define PC14 PINOUT_CTOR(C, 14)
+#define PC15 PINOUT_CTOR(C, 15)
 
-#define PD0											PINOUT_CTOR(D, 0)
-#define PD1											PINOUT_CTOR(D, 1)
-#define PD2											PINOUT_CTOR(D, 2)
-#define PD3											PINOUT_CTOR(D, 3)
-#define PD4											PINOUT_CTOR(D, 4)
-#define PD5											PINOUT_CTOR(D, 5)
-#define PD6											PINOUT_CTOR(D, 6)
-#define PD7											PINOUT_CTOR(D, 7)
-#define PD8											PINOUT_CTOR(D, 8)
-#define PD9											PINOUT_CTOR(D, 9)
-#define PD10										PINOUT_CTOR(D, 10)
-#define PD11										PINOUT_CTOR(D, 11)
-#define PD12										PINOUT_CTOR(D, 12)
-#define PD13										PINOUT_CTOR(D, 13)
-#define PD14										PINOUT_CTOR(D, 14)
-#define PD15										PINOUT_CTOR(D, 15)
+#define PD0 PINOUT_CTOR(D, 0)
+#define PD1 PINOUT_CTOR(D, 1)
+#define PD2 PINOUT_CTOR(D, 2)
+#define PD3 PINOUT_CTOR(D, 3)
+#define PD4 PINOUT_CTOR(D, 4)
+#define PD5 PINOUT_CTOR(D, 5)
+#define PD6 PINOUT_CTOR(D, 6)
+#define PD7 PINOUT_CTOR(D, 7)
+#define PD8 PINOUT_CTOR(D, 8)
+#define PD9 PINOUT_CTOR(D, 9)
+#define PD10 PINOUT_CTOR(D, 10)
+#define PD11 PINOUT_CTOR(D, 11)
+#define PD12 PINOUT_CTOR(D, 12)
+#define PD13 PINOUT_CTOR(D, 13)
+#define PD14 PINOUT_CTOR(D, 14)
+#define PD15 PINOUT_CTOR(D, 15)
 
-#define PE0											PINOUT_CTOR(E, 0)
-#define PE1											PINOUT_CTOR(E, 1)
-#define PE2											PINOUT_CTOR(E, 2)
-#define PE3											PINOUT_CTOR(E, 3)
-#define PE4											PINOUT_CTOR(E, 4)
-#define PE5											PINOUT_CTOR(E, 5)
-#define PE6											PINOUT_CTOR(E, 6)
-#define PE7											PINOUT_CTOR(E, 7)
-#define PE8											PINOUT_CTOR(E, 8)
-#define PE9											PINOUT_CTOR(E, 9)
-#define PE10									    PINOUT_CTOR(E, 10)
-#define PE11										PINOUT_CTOR(E, 11)
-#define PE12										PINOUT_CTOR(E, 12)
-#define PE13										PINOUT_CTOR(E, 13)
-#define PE14										PINOUT_CTOR(E, 14)
-#define PE15										PINOUT_CTOR(E, 15)
+#define PE0 PINOUT_CTOR(E, 0)
+#define PE1 PINOUT_CTOR(E, 1)
+#define PE2 PINOUT_CTOR(E, 2)
+#define PE3 PINOUT_CTOR(E, 3)
+#define PE4 PINOUT_CTOR(E, 4)
+#define PE5 PINOUT_CTOR(E, 5)
+#define PE6 PINOUT_CTOR(E, 6)
+#define PE7 PINOUT_CTOR(E, 7)
+#define PE8 PINOUT_CTOR(E, 8)
+#define PE9 PINOUT_CTOR(E, 9)
+#define PE10 PINOUT_CTOR(E, 10)
+#define PE11 PINOUT_CTOR(E, 11)
+#define PE12 PINOUT_CTOR(E, 12)
+#define PE13 PINOUT_CTOR(E, 13)
+#define PE14 PINOUT_CTOR(E, 14)
+#define PE15 PINOUT_CTOR(E, 15)
 
-#define PF0											PINOUT_CTOR(F, 0)
-#define PF1											PINOUT_CTOR(F, 1)
-#define PF2											PINOUT_CTOR(F, 2)
-#define PF3											PINOUT_CTOR(F, 3)
-#define PF4											PINOUT_CTOR(F, 4)
-#define PF5											PINOUT_CTOR(F, 5)
-#define PF6											PINOUT_CTOR(F, 6)
-#define PF7											PINOUT_CTOR(F, 7)
-#define PF8											PINOUT_CTOR(F, 8)
-#define PF9											PINOUT_CTOR(F, 9)
-#define PF10										PINOUT_CTOR(F, 10)
-#define PF11										PINOUT_CTOR(F, 11)
-#define PF12										PINOUT_CTOR(F, 12)
-#define PF13										PINOUT_CTOR(F, 13)
-#define PF14										PINOUT_CTOR(F, 14)
-#define PF15										PINOUT_CTOR(F, 15)
+#define PF0 PINOUT_CTOR(F, 0)
+#define PF1 PINOUT_CTOR(F, 1)
+#define PF2 PINOUT_CTOR(F, 2)
+#define PF3 PINOUT_CTOR(F, 3)
+#define PF4 PINOUT_CTOR(F, 4)
+#define PF5 PINOUT_CTOR(F, 5)
+#define PF6 PINOUT_CTOR(F, 6)
+#define PF7 PINOUT_CTOR(F, 7)
+#define PF8 PINOUT_CTOR(F, 8)
+#define PF9 PINOUT_CTOR(F, 9)
+#define PF10 PINOUT_CTOR(F, 10)
+#define PF11 PINOUT_CTOR(F, 11)
+#define PF12 PINOUT_CTOR(F, 12)
+#define PF13 PINOUT_CTOR(F, 13)
+#define PF14 PINOUT_CTOR(F, 14)
+#define PF15 PINOUT_CTOR(F, 15)
 
-#define PG0											PINOUT_CTOR(G, 0)
-#define PG1											PINOUT_CTOR(G, 1)
-#define PG2											PINOUT_CTOR(G, 2)
-#define PG3											PINOUT_CTOR(G, 3)
-#define PG4											PINOUT_CTOR(G, 4)
-#define PG5											PINOUT_CTOR(G, 5)
-#define PG6											PINOUT_CTOR(G, 6)
-#define PG7											PINOUT_CTOR(G, 7)
-#define PG8											PINOUT_CTOR(G, 8)
-#define PG9											PINOUT_CTOR(G, 9)
-#define PG10										PINOUT_CTOR(G, 10)
-#define PG11										PINOUT_CTOR(G, 11)
-#define PG12										PINOUT_CTOR(G, 12)
-#define PG13										PINOUT_CTOR(G, 13)
-#define PG14										PINOUT_CTOR(G, 14)
-#define PG15										PINOUT_CTOR(G, 15)
+#define PG0 PINOUT_CTOR(G, 0)
+#define PG1 PINOUT_CTOR(G, 1)
+#define PG2 PINOUT_CTOR(G, 2)
+#define PG3 PINOUT_CTOR(G, 3)
+#define PG4 PINOUT_CTOR(G, 4)
+#define PG5 PINOUT_CTOR(G, 5)
+#define PG6 PINOUT_CTOR(G, 6)
+#define PG7 PINOUT_CTOR(G, 7)
+#define PG8 PINOUT_CTOR(G, 8)
+#define PG9 PINOUT_CTOR(G, 9)
+#define PG10 PINOUT_CTOR(G, 10)
+#define PG11 PINOUT_CTOR(G, 11)
+#define PG12 PINOUT_CTOR(G, 12)
+#define PG13 PINOUT_CTOR(G, 13)
+#define PG14 PINOUT_CTOR(G, 14)
+#define PG15 PINOUT_CTOR(G, 15)
 
-#define PH0		                                    PINOUT_CTOR(H, 0)
-#define PH1		                                    PINOUT_CTOR(H, 1)
-#define PH2		                                    PINOUT_CTOR(H, 2)
-#define PH3		                                    PINOUT_CTOR(H, 3)
-#define PH4		                                    PINOUT_CTOR(H, 4)
-#define PH5		                                    PINOUT_CTOR(H, 5)
-#define PH6											PINOUT_CTOR(H, 6)
-#define PH7											PINOUT_CTOR(H, 7)
-#define PH8											PINOUT_CTOR(H, 8)
-#define PH9											PINOUT_CTOR(H, 9)
-#define PH10										PINOUT_CTOR(H, 10)
-#define PH11										PINOUT_CTOR(H, 11)
-#define PH12										PINOUT_CTOR(H, 12)
-#define PH13										PINOUT_CTOR(H, 13)
-#define PH14										PINOUT_CTOR(H, 14)
-#define PH15										PINOUT_CTOR(H, 15)
+#define PH0 PINOUT_CTOR(H, 0)
+#define PH1 PINOUT_CTOR(H, 1)
+#define PH2 PINOUT_CTOR(H, 2)
+#define PH3 PINOUT_CTOR(H, 3)
+#define PH4 PINOUT_CTOR(H, 4)
+#define PH5 PINOUT_CTOR(H, 5)
+#define PH6 PINOUT_CTOR(H, 6)
+#define PH7 PINOUT_CTOR(H, 7)
+#define PH8 PINOUT_CTOR(H, 8)
+#define PH9 PINOUT_CTOR(H, 9)
+#define PH10 PINOUT_CTOR(H, 10)
+#define PH11 PINOUT_CTOR(H, 11)
+#define PH12 PINOUT_CTOR(H, 12)
+#define PH13 PINOUT_CTOR(H, 13)
+#define PH14 PINOUT_CTOR(H, 14)
+#define PH15 PINOUT_CTOR(H, 15)
 
-#define PI0											PINOUT_CTOR(I, 0)
-#define PI1											PINOUT_CTOR(I, 1)
-#define PI2											PINOUT_CTOR(I, 2)
-#define PI3											PINOUT_CTOR(I, 3)
-#define PI4											PINOUT_CTOR(I, 4)
-#define PI5											PINOUT_CTOR(I, 5)
-#define PI6											PINOUT_CTOR(I, 6)
-#define PI7											PINOUT_CTOR(I, 7)
-#define PI8											PINOUT_CTOR(I, 8)
-#define PI9											PINOUT_CTOR(I, 9)
-#define PI10										PINOUT_CTOR(I, 10)
-#define PI11										PINOUT_CTOR(I, 11)
-#define PI12										PINOUT_CTOR(I, 12)
-#define PI13										PINOUT_CTOR(I, 13)
-#define PI14										PINOUT_CTOR(I, 14)
-#define PI15										PINOUT_CTOR(I, 15)
+#define PI0 PINOUT_CTOR(I, 0)
+#define PI1 PINOUT_CTOR(I, 1)
+#define PI2 PINOUT_CTOR(I, 2)
+#define PI3 PINOUT_CTOR(I, 3)
+#define PI4 PINOUT_CTOR(I, 4)
+#define PI5 PINOUT_CTOR(I, 5)
+#define PI6 PINOUT_CTOR(I, 6)
+#define PI7 PINOUT_CTOR(I, 7)
+#define PI8 PINOUT_CTOR(I, 8)
+#define PI9 PINOUT_CTOR(I, 9)
+#define PI10 PINOUT_CTOR(I, 10)
+#define PI11 PINOUT_CTOR(I, 11)
+#define PI12 PINOUT_CTOR(I, 12)
+#define PI13 PINOUT_CTOR(I, 13)
+#define PI14 PINOUT_CTOR(I, 14)
+#define PI15 PINOUT_CTOR(I, 15)
 
 #endif /* CM3CPP_PINOUT_H_ */
diff --git a/rs485.cpp b/rs485.cpp
index 497ecbb..a38d6ff 100644
--- a/rs485.cpp
+++ b/rs485.cpp
@@ -19,7 +19,7 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/* 
+/*
 RS485 implementation, public interface
 */
 
@@ -27,60 +27,62 @@ RS485 implementation, public interface
 
 namespace cm3cpp {
 
-
-RS485::RS485(Struct rs485, Settings settings,
-			 utils::RoundBuffer rb_in_size, utils::RoundBuffer rb_out_size)
+RS485::RS485(Struct rs485,
+             Settings settings,
+             utils::RoundBuffer rb_in_size,
+             utils::RoundBuffer rb_out_size) :
+  _de(rs485.de)
 {
-	rb_in = new utils::RoundBuffer(rb_in_size);
-	rb_out = new utils::RoundBuffer(rb_out_size);
+    rb_in = new utils::RoundBuffer(rb_in_size);
+    rb_out = new utils::RoundBuffer(rb_out_size);
 
-	if (rs485.rx.pin)
-	{
-		Gpio rx(rs485.rx);
-		rx.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);
-		rx.set_output_options(Gpio::OutputType::PUSH_PULL, Gpio::Speed::MEDIUM_25MHz);
-		rx.set_af(Gpio::AltFuncNumber::AF7);
-	}
+    if (rs485.rx.pin) {
+        Gpio rx(rs485.rx);
+        rx.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);
+        rx.set_output_options(Gpio::OutputType::PUSH_PULL,
+                              Gpio::Speed::MEDIUM_25MHz);
+        rx.set_af(Gpio::AltFuncNumber::AF7);
+    }
 
-	if (rs485.tx.pin)
-	{
-		Gpio tx(rs485.tx);
-		tx.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);
-		tx.set_output_options(Gpio::OutputType::PUSH_PULL, Gpio::Speed::MEDIUM_25MHz);
-		tx.set_af(Gpio::AltFuncNumber::AF7);
-	}
+    if (rs485.tx.pin) {
+        Gpio tx(rs485.tx);
+        tx.mode_setup(Gpio::Mode::ALTERNATE_FUNCTION, Gpio::PullMode::NO_PULL);
+        tx.set_output_options(Gpio::OutputType::PUSH_PULL,
+                              Gpio::Speed::MEDIUM_25MHz);
+        tx.set_af(Gpio::AltFuncNumber::AF7);
+    }
 
-	_de = new Gpio(rs485.de);
-	_de->mode_setup(Gpio::Mode::OUTPUT, Gpio::PullMode::NO_PULL);
-	_de->set_output_options(Gpio::OutputType::PUSH_PULL, Gpio::Speed::MEDIUM_25MHz);
-	_de->clear();
+    _de.mode_setup(Gpio::Mode::OUTPUT, Gpio::PullMode::NO_PULL);
+    _de.set_output_options(Gpio::OutputType::PUSH_PULL,
+                           Gpio::Speed::MEDIUM_25MHz);
+    _de.clear();
 
-	switch (rs485.number)
-	{
-		case 1: _rs485 = USART1;
-				nvic_enable_irq(NVIC_USART1_IRQ);
-				break;
-		case 2: _rs485 = USART2;
-				nvic_enable_irq(NVIC_USART2_IRQ);
-				break;
-		case 3: _rs485 = USART3;
-				nvic_enable_irq(NVIC_USART3_IRQ);
-				break;
-		}
+    switch (rs485.number) {
+        case 1:
+            _rs485 = USART1;
+            nvic_enable_irq(NVIC_USART1_IRQ);
+            break;
+        case 2:
+            _rs485 = USART2;
+            nvic_enable_irq(NVIC_USART2_IRQ);
+            break;
+        case 3:
+            _rs485 = USART3;
+            nvic_enable_irq(NVIC_USART3_IRQ);
+            break;
+    }
 
-		usart_set_baudrate(_rs485, settings.baud_rate);
-		usart_set_databits(_rs485, settings.word_length);
-		usart_set_stopbits(_rs485, settings.stop_bits);
-		usart_set_mode(_rs485, settings.mode);
-		usart_set_parity(_rs485, settings.parity);
-		usart_set_flow_control(_rs485, settings.flow_control);
+    usart_set_baudrate(_rs485, settings.baud_rate);
+    usart_set_databits(_rs485, settings.word_length);
+    usart_set_stopbits(_rs485, settings.stop_bits);
+    usart_set_mode(_rs485, settings.mode);
+    usart_set_parity(_rs485, settings.parity);
+    usart_set_flow_control(_rs485, settings.flow_control);
 
-		if (settings.mode & USART_MODE_RX)
-			usart_enable_rx_interrupt(_rs485);
+    if (settings.mode & USART_MODE_RX)
+        usart_enable_rx_interrupt(_rs485);
 
-		usart_enable(_rs485);
+    usart_enable(_rs485);
 }
 
-
-} // namespace cm3cpp
-
+}  // namespace cm3cpp
diff --git a/rs485.h b/rs485.h
index a7c809b..017bb7d 100644
--- a/rs485.h
+++ b/rs485.h
@@ -19,7 +19,7 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/* 
+/*
 RS485 implementation, public interface
 */
 
@@ -36,114 +36,108 @@ RS485 implementation, public interface
 #include <libopencm3/stm32/f4/nvic.h>
 #endif
 
-#include <cm3cpp_config.h>
-
 #include "cm3cpp_gpio.h"
-#include "utils/round_buffer.h"
 #include "private/assert.h"
-
+#include "utils/round_buffer.h"
+#include <cm3cpp_config.h>
 
 namespace cm3cpp {
 
-
 class RS485
 {
-public:
-	using Gpio = gpio::Gpio;
-
-	struct Settings {
-		uint32_t baud_rate;
-		uint16_t word_length;
-		uint16_t stop_bits;
-		uint16_t parity;
-		uint16_t mode;
-		uint16_t flow_control;
-	};
-
-	struct Struct {
-		uint32_t number;
-		Gpio::Pinout tx;
-		Gpio::Pinout rx;
-		Gpio::Pinout de;
-	};
-
-	utils::RoundBuffer *rb_in;
-	utils::RoundBuffer *rb_out;
-
-	RS485(Struct rs485, Settings settings,
-		  utils::RoundBuffer rb_in_size, utils::RoundBuffer rb_out_size);
-
-	CM3CPP_EXPLISIT_DESTRUCTOR(RS485)
-
-	void usart_enable_tc_interrupt()
-	{
-		USART_CR1(_rs485) |= USART_CR1_TCIE;
-	}
-
-	void usart_disable_tc_interrupt()
-	{
-		USART_CR1(_rs485) &= ~USART_CR1_TCIE;
-	}
-
-	bool interrupt_source_RXNE()
-	{
-		return (((USART_CR1(_rs485) & USART_CR1_RXNEIE) != 0) &&
-				  usart_get_flag(_rs485, USART_SR_RXNE));
-	}
-
-	bool interrupt_source_TXE()
-	{
-		return (((USART_CR1(_rs485) & USART_CR1_TXEIE) != 0) &&
-				  usart_get_flag(_rs485, USART_SR_TXE));
-	}
-
-	bool interrupt_source_TC()
-	{
-		return (((USART_CR1(_rs485) & USART_CR1_TCIE) != 0) &&
-				  usart_get_flag(_rs485, USART_SR_TC));
-	}
-
-	void start_send()
-	{
-		_de->set();
-		usart_enable_tx_interrupt(_rs485);
-	}
-
-	void receive_handler()
-	{
-		if (interrupt_source_RXNE()) {
-			rb_in->push(usart_recv(_rs485));
-		}
-	}
-
-	void transmit_handler()
-	{
-		if (interrupt_source_TXE()) {
-			if (rb_out->get_count()) {
-				usart_send(_rs485, rb_out->pop());
-			}
-			else {
-				usart_disable_tx_interrupt(_rs485);
-				usart_enable_tc_interrupt();
-			}
-		}
-		if (interrupt_source_TC()) {
-			_de->clear();
-			usart_disable_tc_interrupt();
-		}
-	}
-
-	void inirq()
-	{
-		receive_handler();
-		transmit_handler();
-	}
-
-private:
-	uint32_t _rs485;
-	gpio::Gpio* _de;
+ public:
+    using Gpio = gpio::Gpio;
+
+    struct Settings
+    {
+        uint32_t baud_rate;
+        uint16_t word_length;
+        uint16_t stop_bits;
+        uint16_t parity;
+        uint16_t mode;
+        uint16_t flow_control;
+    };
+
+    struct Struct
+    {
+        uint32_t number;
+        Gpio::Pinout tx;
+        Gpio::Pinout rx;
+        Gpio::Pinout de;
+    };
+
+    utils::RoundBuffer* rb_in;
+    utils::RoundBuffer* rb_out;
+
+    RS485(Struct rs485,
+          Settings settings,
+          utils::RoundBuffer rb_in_size,
+          utils::RoundBuffer rb_out_size);
+
+    CM3CPP_EXPLISIT_DESTRUCTOR(RS485)
+
+    void usart_enable_tc_interrupt() { USART_CR1(_rs485) |= USART_CR1_TCIE; }
+
+    void usart_disable_tc_interrupt() { USART_CR1(_rs485) &= ~USART_CR1_TCIE; }
+
+    bool interrupt_source_RXNE()
+    {
+        return (((USART_CR1(_rs485) & USART_CR1_RXNEIE) != 0) &&
+                usart_get_flag(_rs485, USART_SR_RXNE));
+    }
+
+    bool interrupt_source_TXE()
+    {
+        return (((USART_CR1(_rs485) & USART_CR1_TXEIE) != 0) &&
+                usart_get_flag(_rs485, USART_SR_TXE));
+    }
+
+    bool interrupt_source_TC()
+    {
+        return (((USART_CR1(_rs485) & USART_CR1_TCIE) != 0) &&
+                usart_get_flag(_rs485, USART_SR_TC));
+    }
+
+    void start_send()
+    {
+        _de.set();
+        usart_enable_tx_interrupt(_rs485);
+    }
+
+    void receive_handler()
+    {
+        if (interrupt_source_RXNE()) {
+            rb_in->push(usart_recv(_rs485));
+        }
+    }
+
+    void transmit_handler()
+    {
+        if (interrupt_source_TXE()) {
+            if (rb_out->get_count()) {
+                usart_send(_rs485, rb_out->pop());
+            }
+            else {
+                usart_disable_tx_interrupt(_rs485);
+                usart_enable_tc_interrupt();
+            }
+        }
+        if (interrupt_source_TC()) {
+            _de.clear();
+            usart_disable_tc_interrupt();
+        }
+    }
+
+    void inirq()
+    {
+        receive_handler();
+        transmit_handler();
+    }
+
+ private:
+    uint32_t _rs485;
+    gpio::Gpio _de;
 };
 
-
-} // namespace cm3cpp
+}  // namespace cm3cpp
 #endif
diff --git a/utils/round_buffer.cpp b/utils/round_buffer.cpp
index a94b717..e554d9c 100644
--- a/utils/round_buffer.cpp
+++ b/utils/round_buffer.cpp
@@ -20,133 +20,127 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/* 
+/*
 ROUND BUFFER implementation, public interface
 */
 
 #include "round_buffer.h"
 
-
 namespace cm3cpp {
 
 namespace utils {
 
-
 RoundBuffer::RoundBuffer()
 {
-	init(ROUND_BUFFER_DEFAULT_SIZE);
+    init(ROUND_BUFFER_DEFAULT_SIZE);
 }
 
 RoundBuffer::RoundBuffer(uint32_t size)
 {
-	init(size);
+    init(size);
 }
 
-uint32_t RoundBuffer::get(void *buffer, uint32_t index, uint32_t count)
+uint32_t RoundBuffer::get(void* buffer, uint32_t index, uint32_t count)
 {
-	uint32_t cnt = get_count();
-	uint32_t cnt_out = ((count + index) <= cnt) ? (count + index) : cnt;
-	for( uint32_t i = index; i < cnt_out; i++)
-		((uint8_t*)buffer)[i - index] = (*this)[i];
-	return(cnt_out);
+    uint32_t cnt = get_count();
+    uint32_t cnt_out = ((count + index) <= cnt) ? (count + index) : cnt;
+    for (uint32_t i = index; i < cnt_out; i++)
+        ((uint8_t*)buffer)[i - index] = (*this)[i];
+    return (cnt_out);
 }
 
-bool RoundBuffer::push(void *buffer, uint32_t count)
+bool RoundBuffer::push(void* buffer, uint32_t count)
 {
-	bool result = true;
+    bool result = true;
 
-	for(uint32_t i = 0; i < count; i++)
-		result = push(((uint8_t*)buffer)[i]);
-	return result;
+    for (uint32_t i = 0; i < count; i++)
+        result = push(((uint8_t*)buffer)[i]);
+    return result;
 }
 
-bool RoundBuffer::push(RoundBuffer *buffer, uint32_t count, bool withPop)
+bool RoundBuffer::push(RoundBuffer* buffer, uint32_t count, bool withPop)
 {
-	bool result = true;
-	uint32_t max_size = buffer->get_count();
+    bool result = true;
+    uint32_t max_size = buffer->get_count();
 
-	max_size = ((max_size<count) ? max_size : count);
+    max_size = ((max_size < count) ? max_size : count);
 
-	if(max_size > 0)
-    {
-        if(withPop)
-        {
-            for(uint32_t i = 0; i < max_size; i++)
+    if (max_size > 0) {
+        if (withPop) {
+            for (uint32_t i = 0; i < max_size; i++)
                 result = push(buffer->pop());
         }
 
-        else
-        {
-            for(uint32_t i = 0; i < max_size; i++)
+        else {
+            for (uint32_t i = 0; i < max_size; i++)
                 result = push(buffer->operator[](i));
         }
     }
 
-	return result;
+    return result;
 }
 
-uint32_t RoundBuffer::pop(void *buffer, uint32_t count)
+uint32_t RoundBuffer::pop(void* buffer, uint32_t count)
 {
-	uint32_t cnt = get_count();
-	uint32_t cnt_out = (count <= cnt) ? count : cnt;
+    uint32_t cnt = get_count();
+    uint32_t cnt_out = (count <= cnt) ? count : cnt;
 
-	for(uint32_t i = 0; i < cnt_out; i++)
-		((uint8_t*)buffer)[i] = pop();
+    for (uint32_t i = 0; i < cnt_out; i++)
+        ((uint8_t*)buffer)[i] = pop();
 
-	return(cnt_out);
+    return (cnt_out);
 }
 
 uint32_t RoundBuffer::pop(uint32_t count)
 {
-	uint32_t cnt = get_count();
-	uint32_t cnt_out = (count <= cnt) ? count : cnt;
+    uint32_t cnt = get_count();
+    uint32_t cnt_out = (count <= cnt) ? count : cnt;
 
-	for(uint32_t i = 0; i < cnt_out; i++)
-		pop();
+    for (uint32_t i = 0; i < cnt_out; i++)
+        pop();
 
-	return(cnt_out);
+    return (cnt_out);
 }
 
-int RoundBuffer::memcmp(  void *buffer, uint32_t sizebuf)
+int RoundBuffer::memcmp(void* buffer, uint32_t sizebuf)
 {
-	uint8_t *buf = (uint8_t*)buffer;
-	unsigned int cnt = get_count();
-
-	if(!cnt || !sizebuf || (sizebuf > cnt))
-		return(-1);
-
-	uint32_t i = 0;
-	while(i < sizebuf && buf[i] == (*this)[i])
-		i++;
-	if( i == sizebuf )
-		return(0);	//???????
-	return(i+1);
+    uint8_t* buf = (uint8_t*)buffer;
+    unsigned int cnt = get_count();
+
+    if (!cnt || !sizebuf || (sizebuf > cnt))
+        return (-1);
+
+    uint32_t i = 0;
+    while (i < sizebuf && buf[i] == (*this)[i])
+        i++;
+    if (i == sizebuf)
+        return (0);  //???????
+    return (i + 1);
 }
 
-int RoundBuffer::mem_search(  void *buffer, uint32_t sizebuf)
+int RoundBuffer::mem_search(void* buffer, uint32_t sizebuf)
 {
-	uint32_t cnt = get_count();
-	if(cnt < sizebuf)
-		return(-1);
-	uint8_t *pbuf = (uint8_t*)buffer;
-	for(uint32_t i_begin=0; i_begin<=(cnt-sizebuf); i_begin++) {
-		uint32_t i_word;
-		uint8_t byte;
-		for(i_word=0; i_word<sizebuf; i_word++) {
-			byte = (*this)[i_begin + i_word];
-			if(byte != pbuf[i_word]) {
-				if(i_word != 0)
-					i_word = 0;
-				break;
-			}
-		}
-		if( i_word == sizebuf )
-			return( i_begin);
-	}
-	return(-2);
+    uint32_t cnt = get_count();
+    if (cnt < sizebuf)
+        return (-1);
+    uint8_t* pbuf = (uint8_t*)buffer;
+    for (uint32_t i_begin = 0; i_begin <= (cnt - sizebuf); i_begin++) {
+        uint32_t i_word;
+        uint8_t byte;
+        for (i_word = 0; i_word < sizebuf; i_word++) {
+            byte = (*this)[i_begin + i_word];
+            if (byte != pbuf[i_word]) {
+                if (i_word != 0)
+                    i_word = 0;
+                break;
+            }
+        }
+        if (i_word == sizebuf)
+            return (i_begin);
+    }
+    return (-2);
 }
 
-
 }  // namespace utils
 
 }  // namespace cm3cpp
diff --git a/utils/round_buffer.h b/utils/round_buffer.h
index 1d65317..45a87db 100644
--- a/utils/round_buffer.h
+++ b/utils/round_buffer.h
@@ -20,7 +20,7 @@
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
 
-/* 
+/*
 ROUND BUFFER implementation, public interface
 */
 
@@ -39,141 +39,160 @@ namespace utils {
 constexpr uint32_t ROUND_BUFFER_DEFAULT_SIZE = 1000;
 
 /**
-@brief Initializes a new instance of the TplRoundBuffer class
-       that is empty and has the specified initial size.
-@param size The number of bytes that the new TplRoundBuffer can initially store.
-*/
+ * @brief Initializes a new instance of the TplRoundBuffer class
+ *        that is empty and has the specified initial size.
+ * @param size The number of bytes that the new TplRoundBuffer can initially
+ * store.
+ */
 inline void init(uint32_t size);
+
 /**
-@brief Initializes a new instance of the TplRoundBuffer class
-       that internally points to external buffer and has the specified initial size.
-@param buffer External buffer the new TplRoundBuffer should points to.
-@param size The number of bytes that the new TplRoundBuffer can initially store.
-*/
-inline void init(void *buffer, uint32_t size);
+ * @brief Initializes a new instance of the TplRoundBuffer class
+ *        that internally points to external buffer and has the
+ *        specified initial size.
+ * @param buffer External buffer the new TplRoundBuffer should points to.
+ * @param size The number of bytes that the new TplRoundBuffer can initially
+ *        store.
+ */
+inline void init(void* buffer, uint32_t size);
+
 /**
-@brief Removes all bytes from the TplRoundBuffer.
-*/
+ * @brief Removes all bytes from the TplRoundBuffer.
+ */
 inline void clear(void);
+
 /**
-@brief Removes a range of bytes from the top of the TplRoundBuffer.
-@param count The number of bytes to remove.
-@return flase if empty after removing; otherwise, true.
-*/
+ * @brief Removes a range of bytes from the top of the TplRoundBuffer.
+ * @param count The number of bytes to remove.
+ * @return flase if empty after removing; otherwise, true.
+ */
 inline bool remove_range(uint32_t count);
+
 /**
-@brief Gets the number of bytes actually contained in the TplRoundBuffer.
-@return The number of bytes actually contained in the TplRoundBuffer.
-*/
+ * @brief Gets the number of bytes actually contained in the TplRoundBuffer.
+ * @return The number of bytes actually contained in the TplRoundBuffer.
+ */
 inline uint32_t get_count(void);
+
 /**
-@brief Gets two bytes starting from the specified index.
-@param index The zero-based index of the first byte to get.
-@return Two bytes starting from the specified index.
-*/
+ * @brief Gets two bytes starting from the specified index.
+ * @param index The zero-based index of the first byte to get.
+ * @return Two bytes starting from the specified index.
+ */
 inline uint16_t get_word_unsafe(uint32_t index);
+
 /**
-@brief Adds a byte to the end of the TplRoundBuffer.
-@param byte The byte to add to the TplRoundBuffer.
-@return false if overflow; otherwise, true.
-*/
+ * @brief Adds a byte to the end of the TplRoundBuffer.
+ * @param byte The byte to add to the TplRoundBuffer.
+ * @return false if overflow; otherwise, true.
+ */
 inline bool push(uint8_t byte);
+
 /**
-@brief Removes and returns the byte at the beginning of the TplRoundBuffer.
-@return The byte at the beginning of the TplRoundBuffer.
-*/
+ * @brief Removes and returns the byte at the beginning of the TplRoundBuffer.
+ * @return The byte at the beginning of the TplRoundBuffer.
+ */
 inline uint8_t pop(void);
+
 /**
-@brief Removes and returns the byte at the beginning of the TplRoundBuffer.
-@return The byte at the beginning of the TplRoundBuffer.
-*/
+ * @brief Removes and returns the byte at the beginning of the TplRoundBuffer.
+ * @return The byte at the beginning of the TplRoundBuffer.
+ */
 inline uint8_t pop_unsafe(void);
 
 class RoundBuffer
 {
-public:
-	/**
-	@brief Initializes a new instance of the TplRoundBuffer class
-           that is empty and has no initial size.
-	*/
-	RoundBuffer();
-
-	/**
-	@brief Prevent memory leak.
-	*/
-	CM3CPP_EXPLISIT_DESTRUCTOR(RoundBuffer) // prevent memory leak
-
-	/**
-    @brief Initializes a new instance of the TplRoundBuffer class
-	that is empty and has the specified initial size.
-	@param size The number of bytes that the new TplRoundBuffer can initially store.
-	*/
-	RoundBuffer(uint32_t size);
+ public:
+    /**
+     * @brief Initializes a new instance of the TplRoundBuffer class
+     *        that is empty and has no initial size.
+     */
+    RoundBuffer();
+
     /**
-    @brief Gets the byte at the specified index.
-    @param index The zero-based index of the byte to get.
-    @return The byte at the specified index.
-    */
-    uint8_t operator [](uint32_t index)
+     * @brief Prevent memory leak.
+     */
+    CM3CPP_EXPLISIT_DESTRUCTOR(RoundBuffer)  // prevent memory leak
+
+    /**
+     * @brief Initializes a new instance of the TplRoundBuffer class
+     *        that is empty and has the specified initial size.
+     * @param size The number of bytes that the new TplRoundBuffer can
+     *        initially store.
+     */
+    RoundBuffer(uint32_t size);
+
+    /**
+     * @brief Gets the byte at the specified index.
+     * @param index The zero-based index of the byte to get.
+     * @return The byte at the specified index.
+     */
+    uint8_t operator[](uint32_t index)
     {
         uint32_t pos = _head;
         mrb_plus(&pos, index);
 
-        return(_buffer[pos]);
+        return (_buffer[pos]);
     }
-	/**
-	@brief Copies a range of bytes from the TplRoundBuffer to the external buffer.
-	@param resultBuffer The external buffer.
-	@param index The zero-based starting index of the range of bytes to copy.
-	@param count The number of bytes to copy.
-	@return The number of actually copied bytes.
-	*/
-	uint32_t get(void *resultBuffer, uint32_t index, uint32_t count);
-
-	/**
-	@brief Adds a range of bytes from the top of the specified external buffer
-	       to the end of the TplRoundBuffer.
-	@param buffer The external buffer.
-	@param count The number of bytes to add.
-	@return false if overflow; otherwise, true.
-	*/
-    bool push(void *buffer, uint32_t count);
-	/**
-	@brief Adds a range of bytes from the top of the specified TplRoundBuffer
-	       to the end of the current TplRoundBuffer.
-	@param tplRoundBuffer The external TplRoundBuffer.
-	@param count The number of bytes to add.
-	@return false if overflow; otherwise, true.
-	*/
-	bool push(RoundBuffer *buffer, uint32_t count, bool with_pop = true);
-	/**
-	@brief Removes a range of bytes from the beginning of the TplRoundBuffer and adds it
-	       to the specified external buffer.
-	@param resultBuffer The external buffer.
-	@param count The number of bytes to remove.
-	@return The number of actually removed bytes.
-	*/
-	uint32_t pop(void *buffer, uint32_t count);
-	/**
-	@brief Removes a range of bytes from the beginning of the TplRoundBuffer.
-	@param count The number of bytes to remove.
-	@return The number of actually removed bytes.
-	*/
-	uint32_t pop(uint32_t count);
-	/**
-	@brief
-	@param
-	@param
-	@return 0 if ok
-	*/
-	int memcmp(void *buffer, uint32_t sizebuf);
-	/**
-	@brief
-	@param
-	@param
-	@return >=0 - the begin of mem; <0 - negative
-	*/
-	int mem_search(void *buffer, uint32_t sizebuf);
+    /**
+     * @brief Copies a range of bytes from the TplRoundBuffer to the external
+     *        buffer.
+     * @param resultBuffer The external buffer.
+     * @param index The zero-based starting index of the range of bytes to copy.
+     * @param count The number of bytes to copy.
+     * @return The number of actually copied bytes.
+     */
+    uint32_t get(void* resultBuffer, uint32_t index, uint32_t count);
+
+    /**
+     * @brief Adds a range of bytes from the top of the specified external
+     *        buffer to the end of the TplRoundBuffer.
+     * @param buffer The external buffer.
+     * @param count The number of bytes to add.
+     * @return false if overflow; otherwise, true.
+     */
+    bool push(void* buffer, uint32_t count);
+
+    /**
+     * @brief Adds a range of bytes from the top of the specified TplRoundBuffer
+     *        to the end of the current TplRoundBuffer.
+     * @param tplRoundBuffer The external TplRoundBuffer.
+     * @param count The number of bytes to add.
+     * @return false if overflow; otherwise, true.
+     */
+    bool push(RoundBuffer* buffer, uint32_t count, bool with_pop = true);
+
+    /**
+     * @brief Removes a range of bytes from the beginning of the TplRoundBuffer
+     *        and adds it to the specified external buffer.
+     * @param resultBuffer The external buffer.
+     * @param count The number of bytes to remove.
+     * @return The number of actually removed bytes.
+     */
+    uint32_t pop(void* buffer, uint32_t count);
+
+    /**
+     * @brief Removes a range of bytes from the beginning of the TplRoundBuffer.
+     * @param count The number of bytes to remove.
+     * @return The number of actually removed bytes.
+     */
+    uint32_t pop(uint32_t count);
+
+    /**
+     * @brief
+     * @param
+     * @param
+     * @return 0 if ok
+     */
+    int memcmp(void* buffer, uint32_t sizebuf);
+
+    /**
+     * @brief
+     * @param
+     * @param
+     * @return >=0 - the begin of mem; <0 - negative
+     */
+    int mem_search(void* buffer, uint32_t sizebuf);
 
     void init(uint32_t size)
     {
@@ -182,9 +201,9 @@ public:
         clear();
     }
 
-    void init(void *buffer, uint32_t size)
+    void init(void* buffer, uint32_t size)
     {
-    	_buffer = (uint8_t*)buffer;
+        _buffer = (uint8_t*)buffer;
         _size = size;
         clear();
     }
@@ -197,27 +216,26 @@ public:
 
     bool remove_range(uint32_t count)
     {
-        if(count >= get_count())
-        {
+        if (count >= get_count()) {
             clear();
-            return(false);
+            return (false);
         }
         mrb_plus(&_head, count);
-        return(true);
+        return (true);
     }
 
     uint32_t get_count(void)
     {
-        if(_tail >= _head)
-            return(_tail - _head);
-        return(_size - _head + _tail);
+        if (_tail >= _head)
+            return (_tail - _head);
+        return (_size - _head + _tail);
     }
 
     uint16_t get_word_unsafe(uint32_t index)
     {
-        if((index + 1) >= get_count())
-            return(0);
-        return((*this)[index] + ((uint16_t)(*this)[index + 1] << 8));
+        if ((index + 1) >= get_count())
+            return (0);
+        return ((*this)[index] + ((uint16_t)(*this)[index + 1] << 8));
     }
 
     bool push(uint8_t byte)
@@ -225,47 +243,46 @@ public:
         _buffer[_tail] = byte;
         mrb_plus(&_tail, 1);
 
-        if(_tail == _head)
-        {
+        if (_tail == _head) {
             mrb_plus(&_head, 1);
-            return(false);
+            return (false);
         }
 
-        return(true);
+        return (true);
     }
 
     uint8_t pop(void)
     {
-        if(!get_count())
-            return(0);
+        if (!get_count())
+            return (0);
         uint8_t byte = _buffer[_head];
         mrb_plus(&_head, 1);
-        return(byte);
+        return (byte);
     }
 
     uint8_t pop_unsafe(void)
     {
         uint8_t byte = _buffer[_head];
         mrb_plus(&_head, 1);
-        return(byte);
+        return (byte);
     }
 
-private:
-	uint32_t _tail;
-	uint32_t _head ;
-	uint8_t *_buffer;
-	uint32_t _size;
-
-	void mrb_plus(uint32_t *par, int32_t plus)
-	{
-		if(plus<0 && (*par<(uint32_t)-plus))	{
-			*par= *par + _size + plus;
-			return;
-		}
-		*par = *par + plus;
-		if(*par >=	_size)
-			*par -= _size;
-	}
+ private:
+    uint32_t _tail;
+    uint32_t _head;
+    uint8_t* _buffer;
+    uint32_t _size;
+
+    void mrb_plus(uint32_t* par, int32_t plus)
+    {
+        if (plus < 0 && (*par < (uint32_t)-plus)) {
+            *par = *par + _size + plus;
+            return;
+        }
+        *par = *par + plus;
+        if (*par >= _size)
+            *par -= _size;
+    }
 };
 
 }  // namespace utils