diff options
| author | Martin Storsjö <martin@martin.st> | 2019-04-03 14:57:13 +0300 |
|---|---|---|
| committer | Janne Grunau <janne-vlc@jannau.net> | 2019-04-04 21:33:36 +0300 |
| commit | 5d888dde5422d34ff0847ad14352943564f49902 (patch) | |
| tree | b56c37efd9bca0aa830d5897a02cc6ee41628a4b /src/arm/64/util.S | |
| parent | 0d936a1aef07b6b6f950761df9c03c9621f8e206 (diff) | |
arm: Consistently use 8/24 columns indentation for assembly
For cases with indented, nested .if/.macro in asm.S, ident those
by 4 chars.
Some initial assembly files were indented to 4/16 columns, while all
the actual implementation files, starting with src/arm/64/mc.S, have
used 8/24 for indentation.
Diffstat (limited to 'src/arm/64/util.S')
| -rw-r--r-- | src/arm/64/util.S | 74 |
1 files changed, 37 insertions, 37 deletions
diff --git a/src/arm/64/util.S b/src/arm/64/util.S index d7857be..f6f950d 100644 --- a/src/arm/64/util.S +++ b/src/arm/64/util.S @@ -35,57 +35,57 @@ .macro movrel rd, val, offset=0 #if defined(__APPLE__) .if \offset < 0 - adrp \rd, \val@PAGE - add \rd, \rd, \val@PAGEOFF - sub \rd, \rd, -(\offset) + adrp \rd, \val@PAGE + add \rd, \rd, \val@PAGEOFF + sub \rd, \rd, -(\offset) .else - adrp \rd, \val+(\offset)@PAGE - add \rd, \rd, \val+(\offset)@PAGEOFF + adrp \rd, \val+(\offset)@PAGE + add \rd, \rd, \val+(\offset)@PAGEOFF .endif #elif defined(PIC) && defined(_WIN32) .if \offset < 0 - adrp \rd, \val - add \rd, \rd, :lo12:\val - sub \rd, \rd, -(\offset) + adrp \rd, \val + add \rd, \rd, :lo12:\val + sub \rd, \rd, -(\offset) .else - adrp \rd, \val+(\offset) - add \rd, \rd, :lo12:\val+(\offset) + adrp \rd, \val+(\offset) + add \rd, \rd, :lo12:\val+(\offset) .endif #elif defined(PIC) - adrp \rd, \val+(\offset) - add \rd, \rd, :lo12:\val+(\offset) + adrp \rd, \val+(\offset) + add \rd, \rd, :lo12:\val+(\offset) #else - ldr \rd, =\val+\offset + ldr \rd, =\val+\offset #endif .endm .macro transpose_8x8b r0, r1, r2, r3, r4, r5, r6, r7, r8, r9 - trn1 \r8\().8b, \r0\().8b, \r1\().8b - trn2 \r9\().8b, \r0\().8b, \r1\().8b - trn1 \r1\().8b, \r2\().8b, \r3\().8b - trn2 \r3\().8b, \r2\().8b, \r3\().8b - trn1 \r0\().8b, \r4\().8b, \r5\().8b - trn2 \r5\().8b, \r4\().8b, \r5\().8b - trn1 \r2\().8b, \r6\().8b, \r7\().8b - trn2 \r7\().8b, \r6\().8b, \r7\().8b + trn1 \r8\().8b, \r0\().8b, \r1\().8b + trn2 \r9\().8b, \r0\().8b, \r1\().8b + trn1 \r1\().8b, \r2\().8b, \r3\().8b + trn2 \r3\().8b, \r2\().8b, \r3\().8b + trn1 \r0\().8b, \r4\().8b, \r5\().8b + trn2 \r5\().8b, \r4\().8b, \r5\().8b + trn1 \r2\().8b, \r6\().8b, \r7\().8b + trn2 \r7\().8b, \r6\().8b, \r7\().8b - trn1 \r4\().4h, \r0\().4h, \r2\().4h - trn2 \r2\().4h, \r0\().4h, \r2\().4h - trn1 \r6\().4h, \r5\().4h, \r7\().4h - trn2 \r7\().4h, \r5\().4h, \r7\().4h - trn1 \r5\().4h, \r9\().4h, \r3\().4h - trn2 \r9\().4h, \r9\().4h, \r3\().4h - trn1 \r3\().4h, \r8\().4h, \r1\().4h - trn2 \r8\().4h, \r8\().4h, \r1\().4h + trn1 \r4\().4h, \r0\().4h, \r2\().4h + trn2 \r2\().4h, \r0\().4h, \r2\().4h + trn1 \r6\().4h, \r5\().4h, \r7\().4h + trn2 \r7\().4h, \r5\().4h, \r7\().4h + trn1 \r5\().4h, \r9\().4h, \r3\().4h + trn2 \r9\().4h, \r9\().4h, \r3\().4h + trn1 \r3\().4h, \r8\().4h, \r1\().4h + trn2 \r8\().4h, \r8\().4h, \r1\().4h - trn1 \r0\().2s, \r3\().2s, \r4\().2s - trn2 \r4\().2s, \r3\().2s, \r4\().2s - trn1 \r1\().2s, \r5\().2s, \r6\().2s - trn2 \r5\().2s, \r5\().2s, \r6\().2s - trn2 \r6\().2s, \r8\().2s, \r2\().2s - trn1 \r2\().2s, \r8\().2s, \r2\().2s - trn1 \r3\().2s, \r9\().2s, \r7\().2s - trn2 \r7\().2s, \r9\().2s, \r7\().2s + trn1 \r0\().2s, \r3\().2s, \r4\().2s + trn2 \r4\().2s, \r3\().2s, \r4\().2s + trn1 \r1\().2s, \r5\().2s, \r6\().2s + trn2 \r5\().2s, \r5\().2s, \r6\().2s + trn2 \r6\().2s, \r8\().2s, \r2\().2s + trn1 \r2\().2s, \r8\().2s, \r2\().2s + trn1 \r3\().2s, \r9\().2s, \r7\().2s + trn2 \r7\().2s, \r9\().2s, \r7\().2s .endm #endif /* DAV1D_SRC_ARM_64_UTIL_S */ |