From c9c2035355b8e028d1b62992b277b0c376634cf3 Mon Sep 17 00:00:00 2001 From: Rhishikesh Agashe Date: Wed, 7 Oct 2015 13:55:12 -0400 Subject: Fixes compile problems for MIPS Brings MIPS in sync with the ARM/SSE optimizations that added "arch" parameters. Signed-off-by: Jean-Marc Valin --- celt/mips/celt_mipsr1.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'celt/mips/celt_mipsr1.h') diff --git a/celt/mips/celt_mipsr1.h b/celt/mips/celt_mipsr1.h index 7915d596..e85661a6 100644 --- a/celt/mips/celt_mipsr1.h +++ b/celt/mips/celt_mipsr1.h @@ -61,6 +61,8 @@ void comb_filter(opus_val32 *y, opus_val32 *x, int T0, int T1, int N, int i; opus_val32 x0, x1, x2, x3, x4; + (void)arch; + /* printf ("%d %d %f %f\n", T0, T1, g0, g1); */ opus_val16 g00, g01, g02, g10, g11, g12; static const opus_val16 gains[3][3] = { -- cgit v1.2.3