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authorRichard Sandiford <rdsandiford@googlemail.com>2013-08-02 00:40:23 +0400
committerRichard Sandiford <rdsandiford@googlemail.com>2013-08-02 00:40:23 +0400
commit304263c61268420b09530c3827779bff3d2fad2d (patch)
treefe4d6b409968ff64fd5e3a5940e28c06c73fb9e7 /Makefile.tpl
parent5213ca6f1c0696bcf6f719e424167525ae319b99 (diff)
include/opcode/
* mips.h (MIPS16_INSN_WRITE_SP, MIPS16_INSN_READ_31) (MIPS16_INSN_READ_PC, MIPS16_INSN_UNCOND_BRANCH) (MIPS16_INSN_COND_BRANCH): Delete. opcodes/ * mips16-opc.c (UBR, CBR, RD_31, RD_PC): Redefine as INSN2_* flags. (WR_SP): Replace with... (MOD_SP): ...this. (mips16_opcodes): Update accordingly. * mips-dis.c (print_insn_mips16): Likewise. gas/ * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same flags for MIPS16 and non-MIPS16 instructions. (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block. (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too. (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling. (can_swap_branch_p, get_append_method): Use the same flags for MIPS16 and non-MIPS16 instructions. Fix formatting.
Diffstat (limited to 'Makefile.tpl')
0 files changed, 0 insertions, 0 deletions