This commit was manufactured by cvs2svn to create tag 'cgen-cgen-snapshot-20090701

snapshot-20090701'.

Sprout from dje-cgen-play1-branch 2009-06-26 17:19:08 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'dje-cgen-'
Delete:
    include/COPYING
    include/COPYING3
    include/ChangeLog
    include/ChangeLog-9103
    include/MAINTAINERS
    include/alloca-conf.h
    include/ansidecl.h
    include/aout/ChangeLog
    include/aout/adobe.h
    include/aout/aout64.h
    include/aout/ar.h
    include/aout/dynix3.h
    include/aout/encap.h
    include/aout/host.h
    include/aout/hp.h
    include/aout/hp300hpux.h
    include/aout/hppa.h
    include/aout/ranlib.h
    include/aout/reloc.h
    include/aout/stab.def
    include/aout/stab_gnu.h
    include/aout/sun4.h
    include/bfdlink.h
    include/binary-io.h
    include/bout.h
    include/coff/ChangeLog
    include/coff/ChangeLog-9103
    include/coff/alpha.h
    include/coff/apollo.h
    include/coff/arm.h
    include/coff/aux-coff.h
    include/coff/ecoff.h
    include/coff/external.h
    include/coff/go32exe.h
    include/coff/h8300.h
    include/coff/h8500.h
    include/coff/i386.h
    include/coff/i860.h
    include/coff/i960.h
    include/coff/ia64.h
    include/coff/internal.h
    include/coff/m68k.h
    include/coff/m88k.h
    include/coff/maxq.h
    include/coff/mcore.h
    include/coff/mips.h
    include/coff/mipspe.h
    include/coff/or32.h
    include/coff/pe.h
    include/coff/powerpc.h
    include/coff/rs6000.h
    include/coff/rs6k64.h
    include/coff/sh.h
    include/coff/sparc.h
    include/coff/sym.h
    include/coff/symconst.h
    include/coff/ti.h
    include/coff/tic30.h
    include/coff/tic4x.h
    include/coff/tic54x.h
    include/coff/tic80.h
    include/coff/w65.h
    include/coff/we32k.h
    include/coff/x86_64.h
    include/coff/xcoff.h
    include/coff/z80.h
    include/coff/z8k.h
    include/demangle.h
    include/dis-asm.h
    include/dyn-string.h
    include/elf/ChangeLog
    include/elf/ChangeLog-9103
    include/elf/alpha.h
    include/elf/arc.h
    include/elf/arm.h
    include/elf/avr.h
    include/elf/bfin.h
    include/elf/common.h
    include/elf/cr16.h
    include/elf/cr16c.h
    include/elf/cris.h
    include/elf/crx.h
    include/elf/d10v.h
    include/elf/d30v.h
    include/elf/dlx.h
    include/elf/dwarf.h
    include/elf/dwarf2.h
    include/elf/external.h
    include/elf/fr30.h
    include/elf/frv.h
    include/elf/h8.h
    include/elf/hppa.h
    include/elf/i370.h
    include/elf/i386.h
    include/elf/i860.h
    include/elf/i960.h
    include/elf/ia64.h
    include/elf/internal.h
    include/elf/ip2k.h
    include/elf/iq2000.h
    include/elf/lm32.h
    include/elf/m32c.h
    include/elf/m32r.h
    include/elf/m68hc11.h
    include/elf/m68k.h
    include/elf/mcore.h
    include/elf/mep.h
    include/elf/mips.h
    include/elf/mmix.h
    include/elf/mn10200.h
    include/elf/mn10300.h
    include/elf/moxie.h
    include/elf/msp430.h
    include/elf/mt.h
    include/elf/openrisc.h
    include/elf/or32.h
    include/elf/pj.h
    include/elf/ppc.h
    include/elf/ppc64.h
    include/elf/reloc-macros.h
    include/elf/s390.h
    include/elf/score.h
    include/elf/sh.h
    include/elf/sparc.h
    include/elf/spu.h
    include/elf/v850.h
    include/elf/vax.h
    include/elf/vxworks.h
    include/elf/x86-64.h
    include/elf/xc16x.h
    include/elf/xstormy16.h
    include/elf/xtensa.h
    include/fibheap.h
    include/filenames.h
    include/floatformat.h
    include/fnmatch.h
    include/fopen-bin.h
    include/fopen-same.h
    include/fopen-vms.h
    include/gdb/ChangeLog
    include/gdb/callback.h
    include/gdb/fileio.h
    include/gdb/remote-sim.h
    include/gdb/signals.h
    include/gdb/sim-arm.h
    include/gdb/sim-cr16.h
    include/gdb/sim-d10v.h
    include/gdb/sim-frv.h
    include/gdb/sim-h8300.h
    include/gdb/sim-lm32.h
    include/gdb/sim-m32c.h
    include/gdb/sim-ppc.h
    include/gdb/sim-sh.h
    include/gdbm.h
    include/getopt.h
    include/hashtab.h
    include/hp-symtab.h
    include/ieee.h
    include/libiberty.h
    include/md5.h
    include/nlm/ChangeLog
    include/nlm/alpha-ext.h
    include/nlm/common.h
    include/nlm/external.h
    include/nlm/i386-ext.h
    include/nlm/internal.h
    include/nlm/ppc-ext.h
    include/nlm/sparc32-ext.h
    include/oasys.h
    include/objalloc.h
    include/obstack.h
    include/opcode/ChangeLog
    include/opcode/ChangeLog-9103
    include/opcode/alpha.h
    include/opcode/arc.h
    include/opcode/arm.h
    include/opcode/avr.h
    include/opcode/bfin.h
    include/opcode/cgen-bitset.h
    include/opcode/cgen.h
    include/opcode/convex.h
    include/opcode/cr16.h
    include/opcode/cris.h
    include/opcode/crx.h
    include/opcode/d10v.h
    include/opcode/d30v.h
    include/opcode/dlx.h
    include/opcode/h8300.h
    include/opcode/hppa.h
    include/opcode/i370.h
    include/opcode/i386.h
    include/opcode/i860.h
    include/opcode/i960.h
    include/opcode/ia64.h
    include/opcode/m68hc11.h
    include/opcode/m68k.h
    include/opcode/m88k.h
    include/opcode/maxq.h
    include/opcode/mips.h
    include/opcode/mmix.h
    include/opcode/mn10200.h
    include/opcode/mn10300.h
    include/opcode/moxie.h
    include/opcode/msp430.h
    include/opcode/np1.h
    include/opcode/ns32k.h
    include/opcode/or32.h
    include/opcode/pdp11.h
    include/opcode/pj.h
    include/opcode/pn.h
    include/opcode/ppc.h
    include/opcode/pyr.h
    include/opcode/s390.h
    include/opcode/score-datadep.h
    include/opcode/score-inst.h
    include/opcode/sparc.h
    include/opcode/spu-insns.h
    include/opcode/spu.h
    include/opcode/tahoe.h
    include/opcode/tic30.h
    include/opcode/tic4x.h
    include/opcode/tic54x.h
    include/opcode/tic80.h
    include/opcode/v850.h
    include/opcode/vax.h
    include/os9k.h
    include/partition.h
    include/plugin-api.h
    include/progress.h
    include/safe-ctype.h
    include/sha1.h
    include/sort.h
    include/splay-tree.h
    include/symcat.h
    include/xregex.h
    include/xregex2.h
    include/xtensa-config.h
    include/xtensa-isa-internal.h
    include/xtensa-isa.h
    texinfo/texinfo.tex

1 files changed, 0 insertions, 282 deletions

diff --git a/include/opcode/pn.h b/include/opcode/pn.h
deleted file mode 100644
index f8d474f60..000000000
--- a/include/opcode/pn.h
+++ /dev/null
@@ -1,282 +0,0 @@
-/* Print GOULD PN (PowerNode) instructions for GDB, the GNU debugger.
-   Copyright 1986, 1987, 1989, 1991 Free Software Foundation, Inc.
-
-This file is part of GDB.
-
-GDB is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 1, or (at your option)
-any later version.
-
-GDB is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with GDB; see the file COPYING.  If not, write to
-the Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
-
-struct gld_opcode
-{
-  char *name;
-  unsigned long opcode;
-  unsigned long mask;
-  char *args;
-  int length;
-};
-
-/* We store four bytes of opcode for all opcodes because that
-   is the most any of them need.  The actual length of an instruction
-   is always at least 2 bytes, and at most four.  The length of the
-   instruction is based on the opcode.
-
-   The mask component is a mask saying which bits must match
-   particular opcode in order for an instruction to be an instance
-   of that opcode.
-
-   The args component is a string containing characters
-   that are used to format the arguments to the instruction. */
-
-/* Kinds of operands:
-   r  Register in first field
-   R  Register in second field
-   b  Base register in first field
-   B  Base register in second field
-   v  Vector register in first field
-   V  Vector register in first field
-   A  Optional address register (base register)
-   X  Optional index register
-   I  Immediate data (16bits signed)
-   O  Offset field (16bits signed)
-   h  Offset field (15bits signed)
-   d  Offset field (14bits signed)
-   S  Shift count field
-
-   any other characters are printed as is...
-*/
-
-/* The assembler requires that this array be sorted as follows:
-   all instances of the same mnemonic must be consecutive.
-   All instances of the same mnemonic with the same number of operands
-   must be consecutive.
- */
-struct gld_opcode gld_opcodes[] =
-{
-{ "abm",	0xa0080000,	0xfc080000,	"f,xOA,X",	4 },
-{ "abr",	0x18080000,	0xfc0c0000,	"r,f",		2 },
-{ "aci",	0xfc770000,	0xfc7f8000,	"r,I",		4 },
-{ "adfd",	0xe0080002,	0xfc080002,	"r,xOA,X",	4 },
-{ "adfw",	0xe0080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "adi",	0xc8010000,	0xfc7f0000,	"r,I",		4 },
-{ "admb",	0xb8080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "admd",	0xb8000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "admh",	0xb8000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "admw",	0xb8000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "adr",	0x38000000,	0xfc0f0000,	"r,R",		2 },
-{ "adrfd",	0x38090000,	0xfc0f0000,	"r,R",		2 },
-{ "adrfw",	0x38010000,	0xfc0f0000,	"r,R",		2 },
-{ "adrm",	0x38080000,	0xfc0f0000,	"r,R",		2 },
-{ "ai", 	0xfc030000,	0xfc07ffff,	"I",		4 },
-{ "anmb",	0x84080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "anmd",	0x84000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "anmh",	0x84000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "anmw",	0x84000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "anr",	0x04000000,	0xfc0f0000,	"r,R",		2 },
-{ "armb",	0xe8080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "armd",	0xe8000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "armh",	0xe8000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "armw",	0xe8000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "bcf",	0xf0000000,	0xfc080000,	"I,xOA,X",	4 },
-{ "bct",	0xec000000,	0xfc080000,	"I,xOA,X",	4 },
-{ "bei",	0x00060000,	0xffff0000,	"",		2 },
-{ "bft",	0xf0000000,	0xff880000,	"xOA,X",	4 },
-{ "bib",	0xf4000000,	0xfc780000,	"r,xOA",	4 },
-{ "bid",	0xf4600000,	0xfc780000,	"r,xOA",	4 },
-{ "bih",	0xf4200000,	0xfc780000,	"r,xOA",	4 },
-{ "biw",	0xf4400000,	0xfc780000,	"r,xOA",	4 },
-{ "bl", 	0xf8800000,	0xff880000,	"xOA,X",	4 },
-{ "bsub",	0x5c080000,	0xff8f0000,	"",		2 },
-{ "bsubm",	0x28080000,	0xfc080000,	"",		4 },
-{ "bu", 	0xec000000,	0xff880000,	"xOA,X",	4 },
-{ "call",	0x28080000,	0xfc0f0000,	"",		2 },
-{ "callm",	0x5c080000,	0xff880000,	"",		4 },
-{ "camb",	0x90080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "camd",	0x90000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "camh",	0x90000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "camw",	0x90000000,	0xfc080000,	"r.xOA,X",	4 },
-{ "car",	0x10000000,	0xfc0f0000,	"r,R",		2 },
-{ "cd", 	0xfc060000,	0xfc070000,	"r,f",		4 },
-{ "cea",	0x000f0000,	0xffff0000,	"",		2 },
-{ "ci", 	0xc8050000,	0xfc7f0000,	"r,I",		4 },
-{ "cmc",	0x040a0000,	0xfc7f0000,	"r",		2 },
-{ "cmmb",	0x94080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "cmmd",	0x94000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "cmmh",	0x94000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "cmmw",	0x94000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "cmr",	0x14000000,	0xfc0f0000,	"r,R",		2 },
-{ "daci",	0xfc7f0000,	0xfc7f8000,	"r,I",		4 },
-{ "dae",	0x000e0000,	0xffff0000,	"",		2 },
-{ "dai",	0xfc040000,	0xfc07ffff,	"I",		4 },
-{ "dci",	0xfc6f0000,	0xfc7f8000,	"r,I",		4 },
-{ "di", 	0xfc010000,	0xfc07ffff,	"I",		4 },
-{ "dvfd",	0xe4000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "dvfw",	0xe4000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "dvi",	0xc8040000,	0xfc7f0000,	"r,I",		4 },
-{ "dvmb",	0xc4080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "dvmh",	0xc4000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "dvmw",	0xc4000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "dvr",	0x380a0000,	0xfc0f0000,	"r,R",		2 },
-{ "dvrfd",	0x380c0000,	0xfc0f0000,	"r,R",		4 },
-{ "dvrfw",	0x38040000,	0xfc0f0000,	"r,xOA,X",	4 },
-{ "eae",	0x00080000,	0xffff0000,	"",		2 },
-{ "eci",	0xfc670000,	0xfc7f8080,	"r,I",		4 },
-{ "ecwcs",	0xfc4f0000,	0xfc7f8000,	"",		4 },
-{ "ei", 	0xfc000000,	0xfc07ffff,	"I",		4 },
-{ "eomb",	0x8c080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "eomd",	0x8c000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "eomh",	0x8c000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "eomw",	0x8c000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "eor",	0x0c000000,	0xfc0f0000,	"r,R",		2 },
-{ "eorm",	0x0c080000,	0xfc0f0000,	"r,R",		2 },
-{ "es", 	0x00040000,	0xfc7f0000,	"r",		2 },
-{ "exm",	0xa8000000,	0xff880000,	"xOA,X",	4 },
-{ "exr",	0xc8070000,	0xfc7f0000,	"r",		2 },
-{ "exrr",	0xc8070002,	0xfc7f0002,	"r",		2 },
-{ "fixd",	0x380d0000,	0xfc0f0000,	"r,R",		2 },
-{ "fixw",	0x38050000,	0xfc0f0000,	"r,R",		2 },
-{ "fltd",	0x380f0000,	0xfc0f0000,	"r,R",		2 },
-{ "fltw",	0x38070000,	0xfc0f0000,	"r,R",		2 },
-{ "grio",	0xfc3f0000,	0xfc7f8000,	"r,I",		4 },
-{ "halt",	0x00000000,	0xffff0000,	"",		2 },
-{ "hio",	0xfc370000,	0xfc7f8000,	"r,I",		4 },
-{ "jwcs",	0xfa080000,	0xff880000,	"xOA,X",	4 },
-{ "la", 	0x50000000,	0xfc000000,	"r,xOA,X",	4 },
-{ "labr",	0x58080000,	0xfc080000,	"b,xOA,X",	4 },
-{ "lb", 	0xac080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "lcs", 	0x00030000,	0xfc7f0000,	"r",		2 },
-{ "ld", 	0xac000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "lear", 	0x80000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "lf", 	0xcc000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "lfbr", 	0xcc080000,	0xfc080000,	"b,xOA,X",	4 },
-{ "lh", 	0xac000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "li", 	0xc8000000,	0xfc7f0000,	"r,I",		4 },
-{ "lmap",	0x2c070000,	0xfc7f0000,	"r",		2 },
-{ "lmb",	0xb0080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "lmd",	0xb0000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "lmh",	0xb0000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "lmw",	0xb0000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "lnb",	0xb4080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "lnd",	0xb4000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "lnh",	0xb4000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "lnw",	0xb4000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "lpsd",	0xf9800000,	0xff880000,	"r,xOA,X",	4 },
-{ "lpsdcm",	0xfa800000,	0xff880000,	"r,xOA,X",	4 },
-{ "lw", 	0xac000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "lwbr", 	0x5c000000,	0xfc080000,	"b,xOA,X",	4 },
-{ "mpfd",	0xe4080002,	0xfc080002,	"r,xOA,X",	4 },
-{ "mpfw",	0xe4080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "mpi",	0xc8030000,	0xfc7f0000,	"r,I",		4 },
-{ "mpmb",	0xc0080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "mpmh",	0xc0000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "mpmw",	0xc0000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "mpr",	0x38020000,	0xfc0f0000,	"r,R",		2 },
-{ "mprfd",	0x380e0000,	0xfc0f0000,	"r,R",		2 },
-{ "mprfw",	0x38060000,	0xfc0f0000,	"r,R",		2 },
-{ "nop",	0x00020000,	0xffff0000,	"",		2 },
-{ "ormb",	0x88080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "ormd",	0x88000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "ormh",	0x88000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "ormw",	0x88000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "orr",	0x08000000,	0xfc0f0000,	"r,R",		2 },
-{ "orrm",	0x08080000,	0xfc0f0000,	"r,R",		2 },
-{ "rdsts",	0x00090000,	0xfc7f0000,	"r",		2 },
-{ "return",	0x280e0000,	0xfc7f0000,	"",		2 },
-{ "ri", 	0xfc020000,	0xfc07ffff,	"I",		4 },
-{ "rnd",	0x00050000,	0xfc7f0000,	"r",		2 },
-{ "rpswt",	0x040b0000,	0xfc7f0000,	"r",		2 },
-{ "rschnl",	0xfc2f0000,	0xfc7f8000,	"r,I",		4 },
-{ "rsctl",	0xfc470000,	0xfc7f8000,	"r,I",		4 },
-{ "rwcs",	0x000b0000,	0xfc0f0000,	"r,R",		2 },
-{ "sacz",	0x10080000,	0xfc0f0000,	"r,R",		2 },
-{ "sbm",	0x98080000,	0xfc080000,	"f,xOA,X",	4 },
-{ "sbr",	0x18000000,	0xfc0c0000,	"r,f",		4 },
-{ "sea",	0x000d0000,	0xffff0000,	"",		2 },
-{ "setcpu",	0x2c090000,	0xfc7f0000,	"r",		2 },
-{ "sio",	0xfc170000,	0xfc7f8000,	"r,I",		4 },
-{ "sipu",	0x000a0000,	0xffff0000,	"",		2 },
-{ "sla",	0x1c400000,	0xfc600000,	"r,S",		2 },
-{ "slad",	0x20400000,	0xfc600000,	"r,S",		2 },
-{ "slc",	0x24400000,	0xfc600000,	"r,S",		2 },
-{ "sll",	0x1c600000,	0xfc600000,	"r,S",		2 },
-{ "slld",	0x20600000,	0xfc600000,	"r,S",		2 },
-{ "smc",	0x04070000,	0xfc070000,	"",		2 },
-{ "sra",	0x1c000000,	0xfc600000,	"r,S",		2 },
-{ "srad",	0x20000000,	0xfc600000,	"r,S",		2 },
-{ "src",	0x24000000,	0xfc600000,	"r,S",		2 },
-{ "srl",	0x1c200000,	0xfc600000,	"r,S",		2 },
-{ "srld",	0x20200000,	0xfc600000,	"r,S",		2 },
-{ "stb",	0xd4080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "std",	0xd4000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "stf",	0xdc000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "stfbr",	0x54000000,	0xfc080000,	"b,xOA,X",	4 },
-{ "sth",	0xd4000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "stmb",	0xd8080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "stmd",	0xd8000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "stmh",	0xd8000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "stmw",	0xd8000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "stpio",	0xfc270000,	0xfc7f8000,	"r,I",		4 },
-{ "stw",	0xd4000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "stwbr",	0x54000000,	0xfc080000,	"b,xOA,X",	4 },
-{ "suabr",	0x58000000,	0xfc080000,	"b,xOA,X",	4 },
-{ "sufd",	0xe0000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "sufw",	0xe0000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "sui",	0xc8020000,	0xfc7f0000,	"r,I",		4 },
-{ "sumb",	0xbc080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "sumd",	0xbc000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "sumh",	0xbc000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "sumw",	0xbc000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "sur",	0x3c000000,	0xfc0f0000,	"r,R",		2 },
-{ "surfd",	0x380b0000,	0xfc0f0000,	"r,xOA,X",	4 },
-{ "surfw",	0x38030000,	0xfc0f0000,	"r,R",		2 },
-{ "surm",	0x3c080000,	0xfc0f0000,	"r,R",		2 },
-{ "svc",	0xc8060000,	0xffff0000,	"",		4 },
-{ "tbm",	0xa4080000,	0xfc080000,	"f,xOA,X",	4 },
-{ "tbr",	0x180c0000,	0xfc0c0000,	"r,f",		2 },
-{ "tbrr",	0x2c020000,	0xfc0f0000,	"r,B",		2 },
-{ "tccr",	0x28040000,	0xfc7f0000,	"",		2 },
-{ "td", 	0xfc050000,	0xfc070000,	"r,f",		4 },
-{ "tio",	0xfc1f0000,	0xfc7f8000,	"r,I",		4 },
-{ "tmapr",	0x2c0a0000,	0xfc0f0000,	"r,R",		2 },
-{ "tpcbr",	0x280c0000,	0xfc7f0000,	"r",		2 },
-{ "trbr",	0x2c010000,	0xfc0f0000,	"b,R",		2 },
-{ "trc",	0x2c030000,	0xfc0f0000,	"r,R",		2 },
-{ "trcc",	0x28050000,	0xfc7f0000,	"",		2 },
-{ "trcm",	0x2c0b0000,	0xfc0f0000,	"r,R",		2 },
-{ "trn",	0x2c040000,	0xfc0f0000,	"r,R",		2 },
-{ "trnm",	0x2c0c0000,	0xfc0f0000,	"r,R",		2 },
-{ "trr",	0x2c000000,	0xfc0f0000,	"r,R",		2 },
-{ "trrm",	0x2c080000,	0xfc0f0000,	"r,R",		2 },
-{ "trsc",	0x2c0e0000,	0xfc0f0000,	"r,R",		2 },
-{ "trsw",	0x28000000,	0xfc7f0000,	"r",		2 },
-{ "tscr",	0x2c0f0000,	0xfc0f0000,	"r,R",		2 },
-{ "uei",	0x00070000,	0xffff0000,	"",		2 },
-{ "wait",	0x00010000,	0xffff0000,	"",		2 },
-{ "wcwcs",	0xfc5f0000,	0xfc7f8000,	"",		4 },
-{ "wwcs",	0x000c0000,	0xfc0f0000,	"r,R",		2 },
-{ "xcbr",	0x28020000,	0xfc0f0000,	"b,B",		2 },
-{ "xcr",	0x2c050000,	0xfc0f0000,	"r,R",		2 },
-{ "xcrm",	0x2c0d0000,	0xfc0f0000,	"r,R",		2 },
-{ "zbm",	0x9c080000,	0xfc080000,	"f,xOA,X",	4 },
-{ "zbr",	0x18040000,	0xfc0c0000,	"r,f",		2 },
-{ "zmb",	0xf8080000,	0xfc080000,	"r,xOA,X",	4 },
-{ "zmd",	0xf8000002,	0xfc080002,	"r,xOA,X",	4 },
-{ "zmh",	0xf8000001,	0xfc080001,	"r,xOA,X",	4 },
-{ "zmw",	0xf8000000,	0xfc080000,	"r,xOA,X",	4 },
-{ "zr", 	0x0c000000,	0xfc0f0000,	"r",		2 },
-};
-
-int numopcodes = sizeof(gld_opcodes) / sizeof(gld_opcodes[0]);
-
-struct gld_opcode *endop = gld_opcodes + sizeof(gld_opcodes) /
-		sizeof(gld_opcodes[0]);