This commit was manufactured by cvs2svn to create tag 'csl-arm-2004-q3'.csl-arm-2004-q3

Sprout from newlib-csl-20060320-branch 2006-03-21 00:57:35 UTC cvs2svn 'This commit was manufactured by cvs2svn to create branch 'newlib-'
Cherrypick from master 2004-09-30 16:34:36 UTC Nick Clifton <nickc@redhat.com> 'Enable target-libgloss for crx-*-*.':
    COPYING.LIBGLOSS
    COPYING.NEWLIB
    ChangeLog
    MAINTAINERS
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    newlib/libc/sys/linux/iconv/gconv_open.c
    newlib/libc/sys/linux/iconv/gconv_simple.c
    newlib/libc/sys/linux/include/dlfcn.h
    newlib/libc/sys/linux/include/getopt.h
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    newlib/libc/sys/linux/include/time.h
    newlib/libc/sys/linux/include/unistd.h
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    newlib/libc/sys/sysvnecv70/configure
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    newlib/libc/sys/w65/aclocal.m4
    newlib/libc/sys/w65/configure
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    newlib/libm/math/s_infconst.c
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    newlib/libm/math/w_j0.c
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    newlib/libm/mathfp/s_frexp.c
    newlib/libm/mathfp/s_infconst.c
    newlib/libm/mathfp/s_isinf.c
    newlib/libm/mathfp/s_isnan.c
    newlib/libm/mathfp/s_ldexp.c
    newlib/libm/mathfp/s_logarithm.c
    newlib/libm/mathfp/s_mathcnst.c
    newlib/libm/mathfp/s_pow.c
    newlib/libm/mathfp/sf_atangent.c
    newlib/libm/mathfp/sf_frexp.c
    newlib/libm/mathfp/sf_isinf.c
    newlib/libm/mathfp/sf_isnan.c
    newlib/libm/mathfp/sf_pow.c
    newlib/libm/mathfp/w_jn.c
    newlib/newlib.hin
    newlib/stamp-h.in
    newlib/testsuite/include/check.h
    newlib/testsuite/lib/checkoutput.exp
    newlib/testsuite/lib/flags.exp
    newlib/testsuite/lib/newlib.exp
    newlib/testsuite/lib/passfail.exp
    src-release
    symlink-tree
    ylwrap
Cherrypick from cygnus 1999-05-03 07:29:06 UTC Richard Henderson <rth@redhat.com> '19990502 sourceware import':
    COPYING
    COPYING.LIB
    include/aout/hp.h
    include/aout/hppa.h
    include/coff/sym.h
    include/fopen-bin.h
    include/fopen-same.h
    include/fopen-vms.h
    include/gdbm.h
    include/nlm/ppc-ext.h
    include/opcode/mn10200.h
    include/opcode/tahoe.h
    include/opcode/tic30.h
    move-if-change
    setup.com
Delete:
    config/depstand.m4
    config/enable.m4
    config/gxx-include-dir.m4
    config/lead-dot.m4
    config/mh-ppc-aix
    config/stdint.m4
    config/tls.m4
    depcomp
    libgloss/cris/Makefile.in
    libgloss/cris/configure
    libgloss/cris/configure.in
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    libgloss/cris/crti.c
    libgloss/cris/crtn.c
    libgloss/cris/gensyscalls
    libgloss/cris/lcrt0.c
    libgloss/cris/linunistd.h
    libgloss/cris/outbyte.c
    libgloss/cris/setup.S
    libgloss/crx/Makefile.in
    libgloss/crx/_exit.c
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    libgloss/crx/_rename.c
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    libgloss/crx/getpid.c
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    libgloss/crx/time.c
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    libgloss/m32c/Makefile.in
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    libgloss/m32c/chdir.S
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    libgloss/m32c/heaptop.S
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    libgloss/rs6000/sim-getrusage.S
    newlib/acconfig.h
    newlib/libc/include/getopt.h
    newlib/libc/include/inttypes.h
    newlib/libc/include/libgen.h
    newlib/libc/include/machine/_types.h
    newlib/libc/include/stdint.h
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    newlib/libc/machine/cris/setjmp.c
    newlib/libc/machine/cris/sys/errno.h
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    newlib/libc/machine/crx/setjmp.S
    newlib/libc/machine/crx/sys/asm.h
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    newlib/libc/machine/m32c/Makefile.am
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    newlib/libc/machine/mt/Makefile.am
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    newlib/libc/machine/mt/configure.in
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    newlib/libc/machine/z8k/memcmp.S
    newlib/libc/machine/z8k/memcpy.S
    newlib/libc/machine/z8k/memmove.S
    newlib/libc/machine/z8k/memset.S
    newlib/libc/misc/init.c
    newlib/libc/stdio/asiprintf.c
    newlib/libc/stdio/dprintf.c
    newlib/libc/stdio/fiscanf.c
    newlib/libc/stdio/iscanf.c
    newlib/libc/stdio/sccl.c
    newlib/libc/stdio/siscanf.c
    newlib/libc/stdio/sniprintf.c
    newlib/libc/stdio/vasiprintf.c
    newlib/libc/stdio/vdprintf.c
    newlib/libc/stdio/viprintf.c
    newlib/libc/stdio/viscanf.c
    newlib/libc/stdio/vsiprintf.c
    newlib/libc/stdio/vsiscanf.c
    newlib/libc/stdio/vsniprintf.c
    newlib/libc/sys/arm/aeabi_atexit.c
    newlib/libc/sys/arm/sys/param.h
    newlib/libc/sys/linux/bits/initspin.h
    newlib/libc/sys/linux/bits/libc-lock.h
    newlib/libc/sys/linux/bits/pthreadtypes.h
    newlib/libc/sys/linux/bits/typesizes.h
    newlib/libc/sys/linux/dl/dl-local.h
    newlib/libc/sys/linux/getpwent.c
    newlib/libc/sys/linux/include/ltdl.h
    newlib/libc/sys/linux/sys/string.h
    newlib/libc/sys/rdos/Makefile.am
    newlib/libc/sys/rdos/Makefile.in
    newlib/libc/sys/rdos/aclocal.m4
    newlib/libc/sys/rdos/chown.c
    newlib/libc/sys/rdos/close.c
    newlib/libc/sys/rdos/config.h
    newlib/libc/sys/rdos/configure
    newlib/libc/sys/rdos/configure.in
    newlib/libc/sys/rdos/crt0.S
    newlib/libc/sys/rdos/execve.c
    newlib/libc/sys/rdos/fork.c
    newlib/libc/sys/rdos/fstat.c
    newlib/libc/sys/rdos/getenv.c
    newlib/libc/sys/rdos/getpid.c
    newlib/libc/sys/rdos/gettod.c
    newlib/libc/sys/rdos/isatty.c
    newlib/libc/sys/rdos/kill.c
    newlib/libc/sys/rdos/link.c
    newlib/libc/sys/rdos/lseek.c
    newlib/libc/sys/rdos/open.c
    newlib/libc/sys/rdos/rdos.S
    newlib/libc/sys/rdos/rdos.h
    newlib/libc/sys/rdos/rdoshelp.c
    newlib/libc/sys/rdos/read.c
    newlib/libc/sys/rdos/readlink.c
    newlib/libc/sys/rdos/sbrk.c
    newlib/libc/sys/rdos/stat.c
    newlib/libc/sys/rdos/symlink.c
    newlib/libc/sys/rdos/times.c
    newlib/libc/sys/rdos/unlink.c
    newlib/libc/sys/rdos/user.def
    newlib/libc/sys/rdos/wait.c
    newlib/libc/sys/rdos/write.c
    newlib/libc/time/gettzinfo.c
    newlib/libc/time/tzvars.c
    newlib/libc/unix/basename.c
    newlib/libc/unix/dirname.c
    newlib/libm/common/s_infconst.c
    newlib/libm/common/s_isinf.c
    newlib/libm/common/s_isinfd.c
    newlib/libm/common/s_isnan.c
    newlib/libm/common/s_isnand.c
    newlib/libm/common/sf_isinf.c
    newlib/libm/common/sf_isinff.c
    newlib/libm/common/sf_isnan.c
    newlib/libm/common/sf_isnanf.c
    newlib/testsuite/newlib.string/memmove1.c

1 files changed, 166 insertions, 0 deletions

diff --git a/include/opcode/v850.h b/include/opcode/v850.h
new file mode 100644
index 000000000..75689bff6
--- /dev/null
+++ b/include/opcode/v850.h
@@ -0,0 +1,166 @@
+/* v850.h -- Header file for NEC V850 opcode table
+   Copyright 1996, 1997, 2001, 2003 Free Software Foundation, Inc.
+   Written by J.T. Conklin, Cygnus Support
+
+This file is part of GDB, GAS, and the GNU binutils.
+
+GDB, GAS, and the GNU binutils are free software; you can redistribute
+them and/or modify them under the terms of the GNU General Public
+License as published by the Free Software Foundation; either version
+1, or (at your option) any later version.
+
+GDB, GAS, and the GNU binutils are distributed in the hope that they
+will be useful, but WITHOUT ANY WARRANTY; without even the implied
+warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+the GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this file; see the file COPYING.  If not, write to the Free
+Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef V850_H
+#define V850_H
+
+/* The opcode table is an array of struct v850_opcode.  */
+
+struct v850_opcode
+{
+  /* The opcode name.  */
+  const char *name;
+
+  /* The opcode itself.  Those bits which will be filled in with
+     operands are zeroes.  */
+  unsigned long opcode;
+
+  /* The opcode mask.  This is used by the disassembler.  This is a
+     mask containing ones indicating those bits which must match the
+     opcode field, and zeroes indicating those bits which need not
+     match (and are presumably filled in by operands).  */
+  unsigned long mask;
+
+  /* An array of operand codes.  Each code is an index into the
+     operand table.  They appear in the order which the operands must
+     appear in assembly code, and are terminated by a zero.  */
+  unsigned char operands[8];
+
+  /* Which (if any) operand is a memory operand.  */
+  unsigned int memop;
+
+  /* Target processor(s).  A bit field of processors which support
+     this instruction.  Note a bit field is used as some instructions
+     are available on multiple, different processor types, whereas
+     other instructions are only available on one specific type.  */
+  unsigned int processors;
+};
+
+/* Values for the processors field in the v850_opcode structure.  */
+#define PROCESSOR_V850		(1 << 0)		/* Just the V850.  */
+#define PROCESSOR_ALL		-1			/* Any processor.  */
+#define PROCESSOR_V850E		(1 << 1)		/* Just the V850E. */
+#define PROCESSOR_NOT_V850	(~ PROCESSOR_V850)	/* Any processor except the V850.  */
+#define PROCESSOR_V850EA	(1 << 2)		/* Just the V850EA. */
+#define PROCESSOR_V850E1	(1 << 3)		/* Just the V850E1. */
+
+/* The table itself is sorted by major opcode number, and is otherwise
+   in the order in which the disassembler should consider
+   instructions.  */
+extern const struct v850_opcode v850_opcodes[];
+extern const int v850_num_opcodes;
+
+
+/* The operands table is an array of struct v850_operand.  */
+
+struct v850_operand
+{
+  /* The number of bits in the operand.  */
+  /* If this value is -1 then the operand's bits are in a discontinous distribution in the instruction. */
+  int bits;
+
+  /* (bits >= 0):  How far the operand is left shifted in the instruction.  */
+  /* (bits == -1): Bit mask of the bits in the operand.  */
+  int shift;
+
+  /* Insertion function.  This is used by the assembler.  To insert an
+     operand value into an instruction, check this field.
+
+     If it is NULL, execute
+         i |= (op & ((1 << o->bits) - 1)) << o->shift;
+     (i is the instruction which we are filling in, o is a pointer to
+     this structure, and op is the opcode value; this assumes twos
+     complement arithmetic).
+
+     If this field is not NULL, then simply call it with the
+     instruction and the operand value.  It will return the new value
+     of the instruction.  If the ERRMSG argument is not NULL, then if
+     the operand value is illegal, *ERRMSG will be set to a warning
+     string (the operand will be inserted in any case).  If the
+     operand value is legal, *ERRMSG will be unchanged (most operands
+     can accept any value).  */
+  unsigned long (* insert)
+    (unsigned long instruction, long op, const char ** errmsg);
+
+  /* Extraction function.  This is used by the disassembler.  To
+     extract this operand type from an instruction, check this field.
+
+     If it is NULL, compute
+         op = o->bits == -1 ? ((i) & o->shift) : ((i) >> o->shift) & ((1 << o->bits) - 1);
+	 if (o->flags & V850_OPERAND_SIGNED)
+	     op = (op << (32 - o->bits)) >> (32 - o->bits);
+     (i is the instruction, o is a pointer to this structure, and op
+     is the result; this assumes twos complement arithmetic).
+
+     If this field is not NULL, then simply call it with the
+     instruction value.  It will return the value of the operand.  If
+     the INVALID argument is not NULL, *INVALID will be set to
+     non-zero if this operand type can not actually be extracted from
+     this operand (i.e., the instruction does not match).  If the
+     operand is valid, *INVALID will not be changed.  */
+  unsigned long (* extract) (unsigned long instruction, int * invalid);
+
+  /* One bit syntax flags.  */
+  int flags;
+};
+
+/* Elements in the table are retrieved by indexing with values from
+   the operands field of the v850_opcodes table.  */
+
+extern const struct v850_operand v850_operands[];
+
+/* Values defined for the flags field of a struct v850_operand.  */
+
+/* This operand names a general purpose register */
+#define V850_OPERAND_REG	0x01
+
+/* This operand names a system register */
+#define V850_OPERAND_SRG	0x02
+
+/* This operand names a condition code used in the setf instruction */
+#define V850_OPERAND_CC		0x04
+
+/* This operand takes signed values */
+#define V850_OPERAND_SIGNED	0x08
+
+/* This operand is the ep register.  */
+#define V850_OPERAND_EP		0x10
+
+/* This operand is a PC displacement */
+#define V850_OPERAND_DISP	0x20
+
+/* This is a relaxable operand.   Only used for D9->D22 branch relaxing
+   right now.  We may need others in the future (or maybe handle them like
+   promoted operands on the mn10300?)  */
+#define V850_OPERAND_RELAX	0x40
+
+/* The register specified must not be r0 */
+#define V850_NOT_R0	        0x80
+
+/* push/pop type instruction, V850E specific.  */
+#define V850E_PUSH_POP		0x100
+
+/* 16 bit immediate follows instruction, V850E specific.  */
+#define V850E_IMMEDIATE16	0x200
+
+/* 32 bit immediate follows instruction, V850E specific.  */
+#define V850E_IMMEDIATE32	0x400
+
+#endif /* V850_H */